Mercurial > mplayer.hg
annotate cpudetect.h @ 26753:502f04b67653
cosmetics: Remove useless parentheses from return statements.
author | diego |
---|---|
date | Fri, 16 May 2008 00:13:03 +0000 |
parents | 4129c8cfa742 |
children | a02c39208d49 |
rev | line source |
---|---|
26029 | 1 #ifndef MPLAYER_CPUDETECT_H |
2 #define MPLAYER_CPUDETECT_H | |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
3 |
2281 | 4 #define CPUTYPE_I386 3 |
5 #define CPUTYPE_I486 4 | |
6 #define CPUTYPE_I586 5 | |
7 #define CPUTYPE_I686 6 | |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
8 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
9 #ifdef ARCH_X86_64 |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
10 # define REGa rax |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
11 # define REGb rbx |
18391 | 12 # define REGBP rbp |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
13 # define REGSP rsp |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
14 # define REG_a "rax" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
15 # define REG_b "rbx" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
16 # define REG_c "rcx" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
17 # define REG_d "rdx" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
18 # define REG_S "rsi" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
19 # define REG_D "rdi" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
20 # define REG_SP "rsp" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
21 # define REG_BP "rbp" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
22 #else |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
23 # define REGa eax |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
24 # define REGb ebx |
18391 | 25 # define REGBP ebp |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
26 # define REGSP esp |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
27 # define REG_a "eax" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
28 # define REG_b "ebx" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
29 # define REG_c "ecx" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
30 # define REG_d "edx" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
31 # define REG_S "esi" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
32 # define REG_D "edi" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
33 # define REG_SP "esp" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
34 # define REG_BP "ebp" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
35 #endif |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
10885
diff
changeset
|
36 |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
37 typedef struct cpucaps_s { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
38 int cpuType; |
18538
739849dfb699
Retrieve CPU built-in namestring, and if it exists, print it during cpu detection; t it doesn't exist, fallback to the cpu table. Patch by Zuxy Meng
gpoirier
parents:
18391
diff
changeset
|
39 int cpuModel; |
3403 | 40 int cpuStepping; |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
41 int hasMMX; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
42 int hasMMX2; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
43 int has3DNow; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
44 int has3DNowExt; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
45 int hasSSE; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
46 int hasSSE2; |
3146
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2303
diff
changeset
|
47 int isX86; |
8860 | 48 unsigned cl_size; /* size of cache line */ |
9003 | 49 int hasAltiVec; |
10885
685c416f12b5
cpuspeed detection for X86 TSC capable CPUs (also added TSC detection, should best be verified by some people with TSC/nonTSC capable CPUs)
atmos4
parents:
9003
diff
changeset
|
50 int hasTSC; |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
51 } CpuCaps; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
52 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
53 extern CpuCaps gCpuCaps; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
54 |
2301 | 55 void GetCpuCaps(CpuCaps *caps); |
2303 | 56 |
57 /* returned value is malloc()'ed so free() it after use */ | |
2301 | 58 char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]); |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
59 |
26029 | 60 #endif /* MPLAYER_CPUDETECT_H */ |