Mercurial > mplayer.hg
annotate libvo/osd_template.c @ 23819:5d6dbc80b8b7
Remove unused definition.
author | diego |
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date | Sat, 21 Jul 2007 18:33:28 +0000 |
parents | 9d42ff736ea5 |
children | 7a1397677cb3 |
rev | line source |
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326 | 1 // Generic alpha renderers for all YUV modes and RGB depths. |
2846 | 2 // Optimized by Nick and Michael |
3142 | 3 // Code from Michael Niedermayer (michaelni@gmx.at) is under GPL |
326 | 4 |
3142 | 5 #undef PREFETCH |
6 #undef EMMS | |
7 #undef PREFETCHW | |
8 #undef PAVGB | |
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9 |
3142 | 10 #ifdef HAVE_3DNOW |
11 #define PREFETCH "prefetch" | |
12 #define PREFETCHW "prefetchw" | |
13 #define PAVGB "pavgusb" | |
14 #elif defined ( HAVE_MMX2 ) | |
15 #define PREFETCH "prefetchnta" | |
16 #define PREFETCHW "prefetcht0" | |
17 #define PAVGB "pavgb" | |
18 #else | |
19 #define PREFETCH "/nop" | |
20 #define PREFETCHW "/nop" | |
2846 | 21 #endif |
622 | 22 |
3142 | 23 #ifdef HAVE_3DNOW |
24 /* On K6 femms is faster of emms. On K7 femms is directly mapped on emms. */ | |
25 #define EMMS "femms" | |
26 #else | |
27 #define EMMS "emms" | |
28 #endif | |
29 | |
30 static inline void RENAME(vo_draw_alpha_yv12)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){ | |
326 | 31 int y; |
2846 | 32 #if defined(FAST_OSD) && !defined(HAVE_MMX) |
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33 w=w>>1; |
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34 #endif |
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35 #ifdef HAVE_MMX |
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36 asm volatile( |
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37 "pcmpeqb %%mm5, %%mm5\n\t" // F..F |
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38 "movq %%mm5, %%mm4\n\t" |
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39 "movq %%mm5, %%mm7\n\t" |
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40 "psllw $8, %%mm5\n\t" //FF00FF00FF00 |
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41 "psrlw $8, %%mm4\n\t" //00FF00FF00FF |
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42 ::); |
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43 #endif |
326 | 44 for(y=0;y<h;y++){ |
45 register int x; | |
2846 | 46 #ifdef HAVE_MMX |
47 asm volatile( | |
48 PREFETCHW" %0\n\t" | |
49 PREFETCH" %1\n\t" | |
50 PREFETCH" %2\n\t" | |
51 ::"m"(*dstbase),"m"(*srca),"m"(*src):"memory"); | |
52 for(x=0;x<w;x+=8){ | |
53 asm volatile( | |
54 "movl %1, %%eax\n\t" | |
55 "orl 4%1, %%eax\n\t" | |
56 " jz 1f\n\t" | |
57 PREFETCHW" 32%0\n\t" | |
58 PREFETCH" 32%1\n\t" | |
59 PREFETCH" 32%2\n\t" | |
60 "movq %0, %%mm0\n\t" // dstbase | |
61 "movq %%mm0, %%mm1\n\t" | |
62 "pand %%mm4, %%mm0\n\t" //0Y0Y0Y0Y | |
63 "psrlw $8, %%mm1\n\t" //0Y0Y0Y0Y | |
64 "movq %1, %%mm2\n\t" //srca HGFEDCBA | |
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65 "paddb %%mm7, %%mm2\n\t" |
2846 | 66 "movq %%mm2, %%mm3\n\t" |
67 "pand %%mm4, %%mm2\n\t" //0G0E0C0A | |
68 "psrlw $8, %%mm3\n\t" //0H0F0D0B | |
69 "pmullw %%mm2, %%mm0\n\t" | |
70 "pmullw %%mm3, %%mm1\n\t" | |
71 "psrlw $8, %%mm0\n\t" | |
72 "pand %%mm5, %%mm1\n\t" | |
73 "por %%mm1, %%mm0\n\t" | |
74 "paddb %2, %%mm0\n\t" | |
75 "movq %%mm0, %0\n\t" | |
76 "1:\n\t" | |
77 :: "m" (dstbase[x]), "m" (srca[x]), "m" (src[x]) | |
78 : "%eax"); | |
79 } | |
80 #else | |
326 | 81 for(x=0;x<w;x++){ |
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82 #ifdef FAST_OSD |
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83 if(srca[2*x+0]) dstbase[2*x+0]=src[2*x+0]; |
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84 if(srca[2*x+1]) dstbase[2*x+1]=src[2*x+1]; |
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85 #else |
326 | 86 if(srca[x]) dstbase[x]=((dstbase[x]*srca[x])>>8)+src[x]; |
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87 #endif |
326 | 88 } |
2846 | 89 #endif |
326 | 90 src+=srcstride; |
91 srca+=srcstride; | |
92 dstbase+=dststride; | |
93 } | |
2846 | 94 #ifdef HAVE_MMX |
95 asm volatile(EMMS:::"memory"); | |
96 #endif | |
326 | 97 return; |
98 } | |
99 | |
3142 | 100 static inline void RENAME(vo_draw_alpha_yuy2)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){ |
326 | 101 int y; |
2846 | 102 #if defined(FAST_OSD) && !defined(HAVE_MMX) |
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103 w=w>>1; |
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104 #endif |
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moves invariant code (chiefly MMX register initialization) out of loops as well as eliminating some memory accesses within the inner loop.
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105 #ifdef HAVE_MMX |
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106 asm volatile( |
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107 "pxor %%mm7, %%mm7\n\t" |
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108 "pcmpeqb %%mm5, %%mm5\n\t" // F..F |
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109 "movq %%mm5, %%mm6\n\t" |
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110 "movq %%mm5, %%mm4\n\t" |
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111 "psllw $8, %%mm5\n\t" //FF00FF00FF00 |
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112 "psrlw $8, %%mm4\n\t" //00FF00FF00FF |
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113 ::); |
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114 #endif |
326 | 115 for(y=0;y<h;y++){ |
116 register int x; | |
2846 | 117 #ifdef HAVE_MMX |
118 asm volatile( | |
119 PREFETCHW" %0\n\t" | |
120 PREFETCH" %1\n\t" | |
121 PREFETCH" %2\n\t" | |
122 ::"m"(*dstbase),"m"(*srca),"m"(*src)); | |
123 for(x=0;x<w;x+=4){ | |
124 asm volatile( | |
125 "movl %1, %%eax\n\t" | |
126 "orl %%eax, %%eax\n\t" | |
127 " jz 1f\n\t" | |
128 PREFETCHW" 32%0\n\t" | |
129 PREFETCH" 32%1\n\t" | |
130 PREFETCH" 32%2\n\t" | |
131 "movq %0, %%mm0\n\t" // dstbase | |
132 "movq %%mm0, %%mm1\n\t" | |
133 "pand %%mm4, %%mm0\n\t" //0Y0Y0Y0Y | |
134 "movd %%eax, %%mm2\n\t" //srca 0000DCBA | |
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135 "paddb %%mm6, %%mm2\n\t" |
2846 | 136 "punpcklbw %%mm7, %%mm2\n\t" //srca 0D0C0B0A |
137 "pmullw %%mm2, %%mm0\n\t" | |
138 "psrlw $8, %%mm0\n\t" | |
139 "pand %%mm5, %%mm1\n\t" //U0V0U0V0 | |
140 "movd %2, %%mm2\n\t" //src 0000DCBA | |
141 "punpcklbw %%mm7, %%mm2\n\t" //srca 0D0C0B0A | |
142 "por %%mm1, %%mm0\n\t" | |
143 "paddb %%mm2, %%mm0\n\t" | |
144 "movq %%mm0, %0\n\t" | |
145 "1:\n\t" | |
146 :: "m" (dstbase[x*2]), "m" (srca[x]), "m" (src[x]) | |
147 : "%eax"); | |
148 } | |
149 #else | |
326 | 150 for(x=0;x<w;x++){ |
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151 #ifdef FAST_OSD |
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152 if(srca[2*x+0]) dstbase[4*x+0]=src[2*x+0]; |
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153 if(srca[2*x+1]) dstbase[4*x+2]=src[2*x+1]; |
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154 #else |
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155 if(srca[x]) { |
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156 dstbase[2*x]=((dstbase[2*x]*srca[x])>>8)+src[x]; |
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157 dstbase[2*x+1]=((((signed)dstbase[2*x+1]-128)*srca[x])>>8)+128; |
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158 } |
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159 #endif |
326 | 160 } |
2846 | 161 #endif |
162 src+=srcstride; | |
326 | 163 srca+=srcstride; |
164 dstbase+=dststride; | |
165 } | |
2846 | 166 #ifdef HAVE_MMX |
167 asm volatile(EMMS:::"memory"); | |
168 #endif | |
326 | 169 return; |
170 } | |
171 | |
12516 | 172 static inline void RENAME(vo_draw_alpha_uyvy)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){ |
173 int y; | |
174 #if defined(FAST_OSD) | |
175 w=w>>1; | |
176 #endif | |
177 for(y=0;y<h;y++){ | |
178 register int x; | |
179 for(x=0;x<w;x++){ | |
180 #ifdef FAST_OSD | |
181 if(srca[2*x+0]) dstbase[4*x+2]=src[2*x+0]; | |
182 if(srca[2*x+1]) dstbase[4*x+0]=src[2*x+1]; | |
183 #else | |
184 if(srca[x]) { | |
185 dstbase[2*x+1]=((dstbase[2*x+1]*srca[x])>>8)+src[x]; | |
186 dstbase[2*x]=((((signed)dstbase[2*x]-128)*srca[x])>>8)+128; | |
187 } | |
188 #endif | |
189 } | |
190 src+=srcstride; | |
191 srca+=srcstride; | |
192 dstbase+=dststride; | |
193 } | |
194 } | |
195 | |
3142 | 196 static inline void RENAME(vo_draw_alpha_rgb24)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){ |
326 | 197 int y; |
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198 #ifdef HAVE_MMX |
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199 asm volatile( |
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200 "pxor %%mm7, %%mm7\n\t" |
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201 "pcmpeqb %%mm6, %%mm6\n\t" // F..F |
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202 ::); |
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203 #endif |
326 | 204 for(y=0;y<h;y++){ |
205 register unsigned char *dst = dstbase; | |
206 register int x; | |
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207 #if defined(ARCH_X86) && (!defined(ARCH_X86_64) || defined(HAVE_MMX)) |
2839 | 208 #ifdef HAVE_MMX |
209 asm volatile( | |
210 PREFETCHW" %0\n\t" | |
211 PREFETCH" %1\n\t" | |
212 PREFETCH" %2\n\t" | |
213 ::"m"(*dst),"m"(*srca),"m"(*src):"memory"); | |
214 for(x=0;x<w;x+=2){ | |
2843 | 215 if(srca[x] || srca[x+1]) |
2839 | 216 asm volatile( |
217 PREFETCHW" 32%0\n\t" | |
218 PREFETCH" 32%1\n\t" | |
219 PREFETCH" 32%2\n\t" | |
220 "movq %0, %%mm0\n\t" // dstbase | |
221 "movq %%mm0, %%mm1\n\t" | |
222 "movq %%mm0, %%mm5\n\t" | |
223 "punpcklbw %%mm7, %%mm0\n\t" | |
224 "punpckhbw %%mm7, %%mm1\n\t" | |
225 "movd %1, %%mm2\n\t" // srca ABCD0000 | |
226 "paddb %%mm6, %%mm2\n\t" | |
227 "punpcklbw %%mm2, %%mm2\n\t" // srca AABBCCDD | |
228 "punpcklbw %%mm2, %%mm2\n\t" // srca AAAABBBB | |
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229 "psrlq $8, %%mm2\n\t" // srca AAABBBB0 |
2839 | 230 "movq %%mm2, %%mm3\n\t" |
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231 "punpcklbw %%mm7, %%mm2\n\t" // srca 0A0A0A0B |
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232 "punpckhbw %%mm7, %%mm3\n\t" // srca 0B0B0B00 |
2839 | 233 "pmullw %%mm2, %%mm0\n\t" |
234 "pmullw %%mm3, %%mm1\n\t" | |
235 "psrlw $8, %%mm0\n\t" | |
236 "psrlw $8, %%mm1\n\t" | |
237 "packuswb %%mm1, %%mm0\n\t" | |
238 "movd %2, %%mm2 \n\t" // src ABCD0000 | |
239 "punpcklbw %%mm2, %%mm2\n\t" // src AABBCCDD | |
240 "punpcklbw %%mm2, %%mm2\n\t" // src AAAABBBB | |
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241 "psrlq $8, %%mm2\n\t" // src AAABBBB0 |
2839 | 242 "paddb %%mm2, %%mm0\n\t" |
243 "pand %4, %%mm5\n\t" | |
244 "pand %3, %%mm0\n\t" | |
245 "por %%mm0, %%mm5\n\t" | |
246 "movq %%mm5, %0\n\t" | |
247 :: "m" (dst[0]), "m" (srca[x]), "m" (src[x]), "m"(mask24hl), "m"(mask24lh)); | |
248 dst += 6; | |
249 } | |
250 #else /* HAVE_MMX */ | |
251 for(x=0;x<w;x++){ | |
252 if(srca[x]){ | |
253 asm volatile( | |
254 "movzbl (%0), %%ecx\n\t" | |
255 "movzbl 1(%0), %%eax\n\t" | |
256 | |
257 "imull %1, %%ecx\n\t" | |
258 "imull %1, %%eax\n\t" | |
259 | |
5139 | 260 "addl %2, %%ecx\n\t" |
2839 | 261 "addl %2, %%eax\n\t" |
262 | |
263 "movb %%ch, (%0)\n\t" | |
264 "movb %%ah, 1(%0)\n\t" | |
5139 | 265 |
266 "movzbl 2(%0), %%eax\n\t" | |
267 "imull %1, %%eax\n\t" | |
268 "addl %2, %%eax\n\t" | |
269 "movb %%ah, 2(%0)\n\t" | |
2839 | 270 : |
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271 :"D" (dst), |
2839 | 272 "r" ((unsigned)srca[x]), |
273 "r" (((unsigned)src[x])<<8) | |
5139 | 274 :"%eax", "%ecx" |
2839 | 275 ); |
276 } | |
277 dst += 3; | |
278 } | |
5139 | 279 #endif /* !HAVE_MMX */ |
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280 #else /*non x86 arch or x86_64 with MMX disabled */ |
326 | 281 for(x=0;x<w;x++){ |
282 if(srca[x]){ | |
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283 #ifdef FAST_OSD |
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284 dst[0]=dst[1]=dst[2]=src[x]; |
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285 #else |
326 | 286 dst[0]=((dst[0]*srca[x])>>8)+src[x]; |
287 dst[1]=((dst[1]*srca[x])>>8)+src[x]; | |
288 dst[2]=((dst[2]*srca[x])>>8)+src[x]; | |
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289 #endif |
326 | 290 } |
291 dst+=3; // 24bpp | |
292 } | |
2839 | 293 #endif /* arch_x86 */ |
326 | 294 src+=srcstride; |
295 srca+=srcstride; | |
296 dstbase+=dststride; | |
297 } | |
2839 | 298 #ifdef HAVE_MMX |
299 asm volatile(EMMS:::"memory"); | |
300 #endif | |
326 | 301 return; |
302 } | |
303 | |
3142 | 304 static inline void RENAME(vo_draw_alpha_rgb32)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){ |
326 | 305 int y; |
9960 | 306 #ifdef WORDS_BIGENDIAN |
307 dstbase++; | |
308 #endif | |
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309 #ifdef HAVE_MMX |
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310 #ifdef HAVE_3DNOW |
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311 asm volatile( |
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312 "pxor %%mm7, %%mm7\n\t" |
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313 "pcmpeqb %%mm6, %%mm6\n\t" // F..F |
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314 ::); |
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315 #else /* HAVE_3DNOW */ |
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316 asm volatile( |
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317 "pxor %%mm7, %%mm7\n\t" |
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318 "pcmpeqb %%mm5, %%mm5\n\t" // F..F |
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319 "movq %%mm5, %%mm4\n\t" |
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320 "psllw $8, %%mm5\n\t" //FF00FF00FF00 |
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321 "psrlw $8, %%mm4\n\t" //00FF00FF00FF |
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322 ::); |
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323 #endif /* HAVE_3DNOW */ |
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324 #endif /* HAVE_MMX */ |
326 | 325 for(y=0;y<h;y++){ |
326 register int x; | |
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327 #if defined(ARCH_X86) && (!defined(ARCH_X86_64) || defined(HAVE_MMX)) |
2833 | 328 #ifdef HAVE_MMX |
2846 | 329 #ifdef HAVE_3DNOW |
2835 | 330 asm volatile( |
331 PREFETCHW" %0\n\t" | |
332 PREFETCH" %1\n\t" | |
333 PREFETCH" %2\n\t" | |
2839 | 334 ::"m"(*dstbase),"m"(*srca),"m"(*src):"memory"); |
2835 | 335 for(x=0;x<w;x+=2){ |
2843 | 336 if(srca[x] || srca[x+1]) |
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337 asm volatile( |
2835 | 338 PREFETCHW" 32%0\n\t" |
339 PREFETCH" 32%1\n\t" | |
340 PREFETCH" 32%2\n\t" | |
341 "movq %0, %%mm0\n\t" // dstbase | |
342 "movq %%mm0, %%mm1\n\t" | |
343 "punpcklbw %%mm7, %%mm0\n\t" | |
344 "punpckhbw %%mm7, %%mm1\n\t" | |
345 "movd %1, %%mm2\n\t" // srca ABCD0000 | |
346 "paddb %%mm6, %%mm2\n\t" | |
347 "punpcklbw %%mm2, %%mm2\n\t" // srca AABBCCDD | |
348 "punpcklbw %%mm2, %%mm2\n\t" // srca AAAABBBB | |
349 "movq %%mm2, %%mm3\n\t" | |
350 "punpcklbw %%mm7, %%mm2\n\t" // srca 0A0A0A0A | |
351 "punpckhbw %%mm7, %%mm3\n\t" // srca 0B0B0B0B | |
352 "pmullw %%mm2, %%mm0\n\t" | |
353 "pmullw %%mm3, %%mm1\n\t" | |
354 "psrlw $8, %%mm0\n\t" | |
355 "psrlw $8, %%mm1\n\t" | |
356 "packuswb %%mm1, %%mm0\n\t" | |
357 "movd %2, %%mm2 \n\t" // src ABCD0000 | |
358 "punpcklbw %%mm2, %%mm2\n\t" // src AABBCCDD | |
359 "punpcklbw %%mm2, %%mm2\n\t" // src AAAABBBB | |
360 "paddb %%mm2, %%mm0\n\t" | |
361 "movq %%mm0, %0\n\t" | |
362 :: "m" (dstbase[4*x]), "m" (srca[x]), "m" (src[x])); | |
363 } | |
2846 | 364 #else //this is faster for intels crap |
365 asm volatile( | |
366 PREFETCHW" %0\n\t" | |
367 PREFETCH" %1\n\t" | |
368 PREFETCH" %2\n\t" | |
369 ::"m"(*dstbase),"m"(*srca),"m"(*src):"memory"); | |
370 for(x=0;x<w;x+=4){ | |
371 asm volatile( | |
372 "movl %1, %%eax\n\t" | |
373 "orl %%eax, %%eax\n\t" | |
374 " jz 1f\n\t" | |
375 PREFETCHW" 32%0\n\t" | |
376 PREFETCH" 32%1\n\t" | |
377 PREFETCH" 32%2\n\t" | |
378 "movq %0, %%mm0\n\t" // dstbase | |
379 "movq %%mm0, %%mm1\n\t" | |
380 "pand %%mm4, %%mm0\n\t" //0R0B0R0B | |
381 "psrlw $8, %%mm1\n\t" //0?0G0?0G | |
382 "movd %%eax, %%mm2\n\t" //srca 0000DCBA | |
4245 | 383 "paddb "MANGLE(bFF)", %%mm2\n\t" |
2846 | 384 "punpcklbw %%mm2, %%mm2\n\t" //srca DDCCBBAA |
385 "movq %%mm2, %%mm3\n\t" | |
386 "punpcklbw %%mm7, %%mm2\n\t" //srca 0B0B0A0A | |
387 "pmullw %%mm2, %%mm0\n\t" | |
388 "pmullw %%mm2, %%mm1\n\t" | |
389 "psrlw $8, %%mm0\n\t" | |
390 "pand %%mm5, %%mm1\n\t" | |
391 "por %%mm1, %%mm0\n\t" | |
392 "movd %2, %%mm2 \n\t" //src 0000DCBA | |
393 "punpcklbw %%mm2, %%mm2\n\t" //src DDCCBBAA | |
394 "movq %%mm2, %%mm6\n\t" | |
395 "punpcklbw %%mm2, %%mm2\n\t" //src BBBBAAAA | |
396 "paddb %%mm2, %%mm0\n\t" | |
397 "movq %%mm0, %0\n\t" | |
398 | |
399 "movq 8%0, %%mm0\n\t" // dstbase | |
400 "movq %%mm0, %%mm1\n\t" | |
401 "pand %%mm4, %%mm0\n\t" //0R0B0R0B | |
402 "psrlw $8, %%mm1\n\t" //0?0G0?0G | |
403 "punpckhbw %%mm7, %%mm3\n\t" //srca 0D0D0C0C | |
404 "pmullw %%mm3, %%mm0\n\t" | |
405 "pmullw %%mm3, %%mm1\n\t" | |
406 "psrlw $8, %%mm0\n\t" | |
407 "pand %%mm5, %%mm1\n\t" | |
408 "por %%mm1, %%mm0\n\t" | |
409 "punpckhbw %%mm6, %%mm6\n\t" //src DDDDCCCC | |
410 "paddb %%mm6, %%mm0\n\t" | |
411 "movq %%mm0, 8%0\n\t" | |
412 "1:\n\t" | |
413 :: "m" (dstbase[4*x]), "m" (srca[x]), "m" (src[x]) | |
414 : "%eax"); | |
415 } | |
416 #endif | |
2839 | 417 #else /* HAVE_MMX */ |
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418 for(x=0;x<w;x++){ |
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419 if(srca[x]){ |
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420 asm volatile( |
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421 "movzbl (%0), %%ecx\n\t" |
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422 "movzbl 1(%0), %%eax\n\t" |
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423 "movzbl 2(%0), %%edx\n\t" |
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424 |
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425 "imull %1, %%ecx\n\t" |
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426 "imull %1, %%eax\n\t" |
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427 "imull %1, %%edx\n\t" |
2578 | 428 |
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429 "addl %2, %%ecx\n\t" |
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430 "addl %2, %%eax\n\t" |
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431 "addl %2, %%edx\n\t" |
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432 |
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433 "movb %%ch, (%0)\n\t" |
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434 "movb %%ah, 1(%0)\n\t" |
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435 "movb %%dh, 2(%0)\n\t" |
2578 | 436 |
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437 : |
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438 :"r" (&dstbase[4*x]), |
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439 "r" ((unsigned)srca[x]), |
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440 "r" (((unsigned)src[x])<<8) |
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441 :"%eax", "%ecx", "%edx" |
2578 | 442 ); |
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443 } |
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444 } |
2839 | 445 #endif /* HAVE_MMX */ |
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446 #else /*non x86 arch or x86_64 with MMX disabled */ |
326 | 447 for(x=0;x<w;x++){ |
448 if(srca[x]){ | |
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449 #ifdef FAST_OSD |
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450 dstbase[4*x+0]=dstbase[4*x+1]=dstbase[4*x+2]=src[x]; |
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451 #else |
326 | 452 dstbase[4*x+0]=((dstbase[4*x+0]*srca[x])>>8)+src[x]; |
453 dstbase[4*x+1]=((dstbase[4*x+1]*srca[x])>>8)+src[x]; | |
454 dstbase[4*x+2]=((dstbase[4*x+2]*srca[x])>>8)+src[x]; | |
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455 #endif |
326 | 456 } |
457 } | |
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458 #endif /* arch_x86 */ |
326 | 459 src+=srcstride; |
460 srca+=srcstride; | |
461 dstbase+=dststride; | |
462 } | |
2833 | 463 #ifdef HAVE_MMX |
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464 asm volatile(EMMS:::"memory"); |
2578 | 465 #endif |
326 | 466 return; |
467 } |