Mercurial > mplayer.hg
annotate cpudetect.h @ 30201:786d035899d2
mark ffqclp as working in codecs.conf, works on all my samples
author | compn |
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date | Fri, 08 Jan 2010 18:44:34 +0000 |
parents | ce682f8d1f68 |
children | c1a3f1bbba26 |
rev | line source |
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26029 | 1 #ifndef MPLAYER_CPUDETECT_H |
2 #define MPLAYER_CPUDETECT_H | |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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3 |
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Add necessary header for ARCH_X86_64 preprocessor check.
diego
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4 #include "config.h" |
b089d639e810
Add necessary header for ARCH_X86_64 preprocessor check.
diego
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5 |
2281 | 6 #define CPUTYPE_I386 3 |
7 #define CPUTYPE_I486 4 | |
8 #define CPUTYPE_I586 5 | |
9 #define CPUTYPE_I686 6 | |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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10 |
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ce682f8d1f68
Directly include libavutil/x86_cpu.h in cpudetect.h instead of duplicating it
reimar
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11 #include "libavutil/x86_cpu.h" |
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821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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12 |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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13 typedef struct cpucaps_s { |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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14 int cpuType; |
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Retrieve CPU built-in namestring, and if it exists, print it during cpu detection; t it doesn't exist, fallback to the cpu table. Patch by Zuxy Meng
gpoirier
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15 int cpuModel; |
3403 | 16 int cpuStepping; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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17 int hasMMX; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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18 int hasMMX2; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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19 int has3DNow; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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20 int has3DNowExt; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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21 int hasSSE; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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22 int hasSSE2; |
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SSE3 support patch by Zhou Zongyi, zhouzongyi pset.suntec net
diego
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23 int hasSSE3; |
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Add detection of x86 CPU features SSSE3 and SSE4a.
gpoirier
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24 int hasSSSE3; |
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Add detection of x86 CPU features SSSE3 and SSE4a.
gpoirier
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25 int hasSSE4a; |
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non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
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26 int isX86; |
8860 | 27 unsigned cl_size; /* size of cache line */ |
9003 | 28 int hasAltiVec; |
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cpuspeed detection for X86 TSC capable CPUs (also added TSC detection, should best be verified by some people with TSC/nonTSC capable CPUs)
atmos4
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29 int hasTSC; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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30 } CpuCaps; |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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31 |
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cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
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32 extern CpuCaps gCpuCaps; |
72ff2179d396
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arpi
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33 |
2301 | 34 void GetCpuCaps(CpuCaps *caps); |
2303 | 35 |
36 /* returned value is malloc()'ed so free() it after use */ | |
2301 | 37 char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]); |
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38 |
26029 | 39 #endif /* MPLAYER_CPUDETECT_H */ |