1
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1 // YUY2 support (see config.format) added by A'rpi/ESP-team
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2
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3 /*
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4 *
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5 * mga_vid.c
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6 *
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7 * Copyright (C) 1999 Aaron Holtzman
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8 *
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9 * Module skeleton based on gutted agpgart module by Jeff Hartmann
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10 * <slicer@ionet.net>
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11 *
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12 * Matrox MGA G200/G400 YUV Video Interface module Version 0.1.0
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13 *
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14 * BES == Back End Scaler
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15 *
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16 * This software has been released under the terms of the GNU Public
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17 * license. See http://www.gnu.org/copyleft/gpl.html for details.
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18 */
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19
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20 //It's entirely possible this major conflicts with something else
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21 /* mknod /dev/mga_vid c 178 0 */
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22
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23 #include <linux/config.h>
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24 #include <linux/version.h>
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25 #include <linux/module.h>
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26 #include <linux/types.h>
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27 #include <linux/kernel.h>
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28 #include <linux/sched.h>
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29 #include <linux/mm.h>
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30 #include <linux/string.h>
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31 #include <linux/errno.h>
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32 #include <linux/malloc.h>
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33 #include <linux/pci.h>
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34 #include <linux/init.h>
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35
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36 #include "mga_vid.h"
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37
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38 #ifdef CONFIG_MTRR
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39 #include <asm/mtrr.h>
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40 #endif
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41
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42 #include <asm/uaccess.h>
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43 #include <asm/system.h>
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44 #include <asm/io.h>
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45
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46 #define TRUE 1
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47 #define FALSE 0
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48
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49 #define MGA_VID_MAJOR 178
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50
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51 #define MGA_VIDMEM_SIZE mga_ram_size
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52
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53 #ifndef PCI_DEVICE_ID_MATROX_G200_PCI
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54 #define PCI_DEVICE_ID_MATROX_G200_PCI 0x0520
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55 #endif
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56
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57 #ifndef PCI_DEVICE_ID_MATROX_G200_AGP
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58 #define PCI_DEVICE_ID_MATROX_G200_AGP 0x0521
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59 #endif
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60
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61 #ifndef PCI_DEVICE_ID_MATROX_G400
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62 #define PCI_DEVICE_ID_MATROX_G400 0x0525
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63 #endif
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64
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65 MODULE_AUTHOR("Aaron Holtzman <aholtzma@engr.uvic.ca>");
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66
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67
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68 typedef struct bes_registers_s
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69 {
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70 //BES Control
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71 uint32_t besctl;
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72 //BES Global control
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73 uint32_t besglobctl;
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74 //Luma control (brightness and contrast)
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75 uint32_t beslumactl;
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76 //Line pitch
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77 uint32_t bespitch;
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78
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79 //Buffer A-1 Chroma 3 plane org
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80 uint32_t besa1c3org;
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81 //Buffer A-1 Chroma org
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82 uint32_t besa1corg;
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83 //Buffer A-1 Luma org
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84 uint32_t besa1org;
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85
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86 //Buffer A-2 Chroma 3 plane org
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87 uint32_t besa2c3org;
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88 //Buffer A-2 Chroma org
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89 uint32_t besa2corg;
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90 //Buffer A-2 Luma org
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91 uint32_t besa2org;
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92
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93 //Buffer B-1 Chroma 3 plane org
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94 uint32_t besb1c3org;
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95 //Buffer B-1 Chroma org
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96 uint32_t besb1corg;
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97 //Buffer B-1 Luma org
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98 uint32_t besb1org;
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99
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100 //Buffer B-2 Chroma 3 plane org
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101 uint32_t besb2c3org;
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102 //Buffer B-2 Chroma org
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103 uint32_t besb2corg;
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104 //Buffer B-2 Luma org
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105 uint32_t besb2org;
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106
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107 //BES Horizontal coord
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108 uint32_t beshcoord;
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109 //BES Horizontal inverse scaling [5.14]
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110 uint32_t beshiscal;
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111 //BES Horizontal source start [10.14] (for scaling)
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112 uint32_t beshsrcst;
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113 //BES Horizontal source ending [10.14] (for scaling)
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114 uint32_t beshsrcend;
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115 //BES Horizontal source last
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116 uint32_t beshsrclst;
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117
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118
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119 //BES Vertical coord
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120 uint32_t besvcoord;
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121 //BES Vertical inverse scaling [5.14]
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122 uint32_t besviscal;
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123 //BES Field 1 vertical source last position
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124 uint32_t besv1srclst;
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125 //BES Field 1 weight start
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126 uint32_t besv1wght;
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127 //BES Field 2 vertical source last position
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128 uint32_t besv2srclst;
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129 //BES Field 2 weight start
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130 uint32_t besv2wght;
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131
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132 } bes_registers_t;
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133
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134 static bes_registers_t regs;
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135 static uint32_t mga_vid_in_use = 0;
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136 static uint32_t is_g400 = 0;
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137 static uint32_t vid_src_ready = 0;
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138 static uint32_t vid_overlay_on = 0;
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139
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140 static uint8_t *mga_mmio_base = 0;
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141 static uint32_t mga_mem_base = 0;
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142 static uint32_t mga_src_base = 0;
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143
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144 static uint32_t mga_ram_size = 0;
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145
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146 static struct pci_dev *pci_dev;
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147
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148 static mga_vid_config_t mga_config;
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149
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150
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151 //All register offsets are converted to word aligned offsets (32 bit)
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152 //because we want all our register accesses to be 32 bits
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153 #define VCOUNT 0x1e20
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154
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155 #define PALWTADD 0x3c00 // Index register for X_DATAREG port
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156 #define X_DATAREG 0x3c0a
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157
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158 #define XMULCTRL 0x19
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159 #define BPP_8 0x00
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160 #define BPP_15 0x01
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161 #define BPP_16 0x02
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162 #define BPP_24 0x03
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163 #define BPP_32_DIR 0x04
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164 #define BPP_32_PAL 0x07
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165
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166 #define XCOLMSK 0x40
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167 #define X_COLKEY 0x42
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168 #define XKEYOPMODE 0x51
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169 #define XCOLMSK0RED 0x52
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170 #define XCOLMSK0GREEN 0x53
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171 #define XCOLMSK0BLUE 0x54
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172 #define XCOLKEY0RED 0x55
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173 #define XCOLKEY0GREEN 0x56
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174 #define XCOLKEY0BLUE 0x57
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175
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176 // Backend Scaler registers
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177 #define BESCTL 0x3d20
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178 #define BESGLOBCTL 0x3dc0
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179 #define BESLUMACTL 0x3d40
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180 #define BESPITCH 0x3d24
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181 #define BESA1C3ORG 0x3d60
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182 #define BESA1CORG 0x3d10
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183 #define BESA1ORG 0x3d00
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184 #define BESA2C3ORG 0x3d64
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185 #define BESA2CORG 0x3d14
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186 #define BESA2ORG 0x3d04
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187 #define BESB1C3ORG 0x3d68
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188 #define BESB1CORG 0x3d18
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189 #define BESB1ORG 0x3d08
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190 #define BESB2C3ORG 0x3d6C
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191 #define BESB2CORG 0x3d1C
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192 #define BESB2ORG 0x3d0C
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193 #define BESHCOORD 0x3d28
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194 #define BESHISCAL 0x3d30
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195 #define BESHSRCEND 0x3d3C
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196 #define BESHSRCLST 0x3d50
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197 #define BESHSRCST 0x3d38
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198 #define BESV1WGHT 0x3d48
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199 #define BESV2WGHT 0x3d4c
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200 #define BESV1SRCLST 0x3d54
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201 #define BESV2SRCLST 0x3d58
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202 #define BESVISCAL 0x3d34
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203 #define BESVCOORD 0x3d2c
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204 #define BESSTATUS 0x3dc4
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205
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206
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207 static void mga_vid_frame_sel(int frame)
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208 {
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209 //we don't need the vcount protection as we're only hitting
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210 //one register (and it doesn't seem to be double buffered)
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211 regs.besctl = (regs.besctl & ~0x07000000) + (frame << 25);
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212 writel( regs.besctl, mga_mmio_base + BESCTL );
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213 }
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214
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215
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216 static void mga_vid_write_regs(void)
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217 {
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218 //Make sure internal registers don't get updated until we're done
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219 writel( (readl(mga_mmio_base + VCOUNT)-1)<<16,
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220 mga_mmio_base + BESGLOBCTL);
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221
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222 // color or coordinate keying
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223 writeb( XKEYOPMODE, mga_mmio_base + PALWTADD);
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224 writeb( mga_config.colkey_on, mga_mmio_base + X_DATAREG);
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225 if ( mga_config.colkey_on )
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226 {
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227 uint32_t r=0, g=0, b=0;
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228
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229 writeb( XMULCTRL, mga_mmio_base + PALWTADD);
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230 switch (readb (mga_mmio_base + X_DATAREG))
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231 {
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232 case BPP_8:
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233 /* Need to look up the color index, just using
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234 color 0 for now. */
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235 break;
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236
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237 case BPP_15:
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238 r = mga_config.colkey_red >> 3;
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239 g = mga_config.colkey_green >> 3;
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240 b = mga_config.colkey_blue >> 3;
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241 break;
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242
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243 case BPP_16:
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244 r = mga_config.colkey_red >> 3;
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245 g = mga_config.colkey_green >> 2;
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246 b = mga_config.colkey_blue >> 3;
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247 break;
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248
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249 case BPP_24:
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250 case BPP_32_DIR:
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251 case BPP_32_PAL:
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252 r = mga_config.colkey_red;
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253 g = mga_config.colkey_green;
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254 b = mga_config.colkey_blue;
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255 break;
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256 }
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257
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258 // Disable color keying on alpha channel
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259 writeb( XCOLMSK, mga_mmio_base + PALWTADD);
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260 writeb( 0x00, mga_mmio_base + X_DATAREG);
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261 writeb( X_COLKEY, mga_mmio_base + PALWTADD);
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262 writeb( 0x00, mga_mmio_base + X_DATAREG);
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263
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264 // Set up color key registers
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265 writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD);
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266 writeb( r, mga_mmio_base + X_DATAREG);
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267 writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD);
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268 writeb( g, mga_mmio_base + X_DATAREG);
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269 writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD);
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270 writeb( b, mga_mmio_base + X_DATAREG);
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271
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272 // Set up color key mask registers
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273 writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD);
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274 writeb( 0xff, mga_mmio_base + X_DATAREG);
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275 writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD);
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276 writeb( 0xff, mga_mmio_base + X_DATAREG);
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277 writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD);
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278 writeb( 0xff, mga_mmio_base + X_DATAREG);
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279 }
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280
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281 // Backend Scaler
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282 writel( regs.besctl, mga_mmio_base + BESCTL);
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283 if(is_g400)
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284 writel( regs.beslumactl, mga_mmio_base + BESLUMACTL);
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285 writel( regs.bespitch, mga_mmio_base + BESPITCH);
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286
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287 writel( regs.besa1org, mga_mmio_base + BESA1ORG);
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288 writel( regs.besa1corg, mga_mmio_base + BESA1CORG);
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289 writel( regs.besb1org, mga_mmio_base + BESB1ORG);
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290 writel( regs.besb1corg, mga_mmio_base + BESB1CORG);
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291 if(is_g400)
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292 {
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293 writel( regs.besa1c3org, mga_mmio_base + BESA1C3ORG);
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294 writel( regs.besb1c3org, mga_mmio_base + BESB1C3ORG);
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295 }
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296
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297 writel( regs.beshcoord, mga_mmio_base + BESHCOORD);
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298 writel( regs.beshiscal, mga_mmio_base + BESHISCAL);
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299 writel( regs.beshsrcst, mga_mmio_base + BESHSRCST);
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300 writel( regs.beshsrcend, mga_mmio_base + BESHSRCEND);
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301 writel( regs.beshsrclst, mga_mmio_base + BESHSRCLST);
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302
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303 writel( regs.besvcoord, mga_mmio_base + BESVCOORD);
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304 writel( regs.besviscal, mga_mmio_base + BESVISCAL);
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305 writel( regs.besv1srclst, mga_mmio_base + BESV1SRCLST);
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306 writel( regs.besv1wght, mga_mmio_base + BESV1WGHT);
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307
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308 //update the registers somewhere between 1 and 2 frames from now.
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309 writel( regs.besglobctl + ((readl(mga_mmio_base + VCOUNT)+2)<<16),
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310 mga_mmio_base + BESGLOBCTL);
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311
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312 printk("mga_vid: wrote BES registers\n");
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313 printk("mga_vid: BESCTL = 0x%08x\n",
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314 readl(mga_mmio_base + BESCTL));
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315 printk("mga_vid: BESGLOBCTL = 0x%08x\n",
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316 readl(mga_mmio_base + BESGLOBCTL));
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317 printk("mga_vid: BESSTATUS= 0x%08x\n",
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318 readl(mga_mmio_base + BESSTATUS));
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319 }
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320
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321 static int mga_vid_set_config(mga_vid_config_t *config)
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322 {
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323 int x, y, sw, sh, dw, dh;
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324 int besleft, bestop, ifactor, ofsleft, ofstop, baseadrofs, weight, weights;
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325 int frame_size;
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326 x = config->x_org;
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327 y = config->y_org;
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328 sw = config->src_width;
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329 sh = config->src_height;
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330 dw = config->dest_width;
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331 dh = config->dest_height;
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332
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333 printk("mga_vid: Setting up a %dx%d+%d+%d video window (src %dx%d) format %X\n",
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334 dw, dh, x, y, sw, sh, config->format);
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335
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336 //FIXME check that window is valid and inside desktop
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337
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338 //FIXME figure out a better way to allocate memory on card
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339 //allocate 2 megs
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340 //mga_src_base = mga_mem_base + (MGA_VIDMEM_SIZE-2) * 0x100000;
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341 mga_src_base = (MGA_VIDMEM_SIZE-2) * 0x100000;
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342
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343
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344 //Setup the BES registers for a three plane 4:2:0 video source
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345
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346 switch(config->format){
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347 case MGA_VID_FORMAT_YV12:
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348 regs.besctl = 1 // BES enabled
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349 + (0<<6) // even start polarity
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350 + (1<<10) // x filtering enabled
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351 + (1<<11) // y filtering enabled
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352 + (1<<16) // chroma upsampling
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353 + (1<<17) // 4:2:0 mode
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354 + (1<<18); // dither enabled
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355
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356 if(is_g400)
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357 {
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358 //zoom disabled, zoom filter disabled, 420 3 plane format, proc amp
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359 //disabled, rgb mode disabled
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360 regs.besglobctl = (1<<5);
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361 }
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362 else
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363 {
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364 //zoom disabled, zoom filter disabled, Cb samples in 0246, Cr
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365 //in 1357, BES register update on besvcnt
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366 regs.besglobctl = 0;
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367 }
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368 break;
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369
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370 case MGA_VID_FORMAT_YUY2:
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371 regs.besctl = 1 // BES enabled
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372 + (0<<6) // even start polarity
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373 + (1<<10) // x filtering enabled
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374 + (1<<11) // y filtering enabled
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375 + (1<<16) // chroma upsampling
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376 + (0<<17) // 4:2:2 mode
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377 + (1<<18); // dither enabled
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378
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379 regs.besglobctl = 0; // YUY2 format selected
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380 break;
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381 default:
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382 return -1;
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383 }
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384
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385
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386 //Disable contrast and brightness control
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387 regs.besglobctl = (1<<5) + (1<<7);
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388 regs.beslumactl = (0x7f << 16) + (0x80<<0);
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389 regs.beslumactl = 0x80<<0;
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390
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391 //Setup destination window boundaries
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392 besleft = x > 0 ? x : 0;
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393 bestop = y > 0 ? y : 0;
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394 regs.beshcoord = (besleft<<16) + (x + dw-1);
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395 regs.besvcoord = (bestop<<16) + (y + dh-1);
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396
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397 //Setup source dimensions
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398 regs.beshsrclst = (sw - 1) << 16;
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399 regs.bespitch = (sw + 31) & ~31 ;
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400
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401 //Setup horizontal scaling
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402 ifactor = ((sw-1)<<14)/(dw-1);
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403 ofsleft = besleft - x;
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404
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405 regs.beshiscal = ifactor<<2;
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406 regs.beshsrcst = (ofsleft*ifactor)<<2;
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407 regs.beshsrcend = regs.beshsrcst + (((dw - ofsleft - 1) * ifactor) << 2);
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408
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409 //Setup vertical scaling
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410 ifactor = ((sh-1)<<14)/(dh-1);
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411 ofstop = bestop - y;
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412
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413 regs.besviscal = ifactor<<2;
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414
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415 baseadrofs = ((ofstop*regs.besviscal)>>16)*regs.bespitch;
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416 frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2;
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417 regs.besa1org = (uint32_t) mga_src_base + baseadrofs;
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418 regs.besb1org = (uint32_t) mga_src_base + baseadrofs + frame_size;
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419
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420 if (is_g400)
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421 baseadrofs = (((ofstop*regs.besviscal)/4)>>16)*regs.bespitch;
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422 else
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423 baseadrofs = (((ofstop*regs.besviscal)/2)>>16)*regs.bespitch;
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424
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425 regs.besa1corg = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ;
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426 regs.besb1corg = (uint32_t) mga_src_base + baseadrofs + frame_size + regs.bespitch * sh;
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427 regs.besa1c3org = regs.besa1corg + ((regs.bespitch * sh) / 4);
|
|
428 regs.besb1c3org = regs.besb1corg + ((regs.bespitch * sh) / 4);
|
|
429
|
|
430 weight = ofstop * (regs.besviscal >> 2);
|
|
431 weights = weight < 0 ? 1 : 0;
|
|
432 regs.besv1wght = (weights << 16) + ((weight & 0x3FFF) << 2);
|
|
433 regs.besv1srclst = sh - 1 - (((ofstop * regs.besviscal) >> 16) & 0x03FF);
|
|
434
|
|
435 mga_vid_write_regs();
|
|
436 return 0;
|
|
437 }
|
|
438
|
|
439
|
|
440 static int mga_vid_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
|
441 {
|
|
442 int frame;
|
|
443
|
|
444 switch(cmd)
|
|
445 {
|
|
446 case MGA_VID_CONFIG:
|
|
447 //FIXME remove
|
|
448 printk("vcount = %d\n",readl(mga_mmio_base + VCOUNT));
|
|
449 printk("mga_mmio_base = %p\n",mga_mmio_base);
|
|
450 printk("mga_mem_base = %08lx\n",mga_mem_base);
|
|
451 //FIXME remove
|
|
452
|
|
453 printk("mga_vid: Received configuration\n");
|
|
454
|
|
455 if(copy_from_user(&mga_config,(mga_vid_config_t*) arg,sizeof(mga_vid_config_t)))
|
|
456 {
|
|
457 printk("mga_vid: failed copy from userspace\n");
|
|
458 return(-EFAULT);
|
|
459 }
|
|
460 if (is_g400)
|
|
461 mga_config.card_type = MGA_G400;
|
|
462 else
|
|
463 mga_config.card_type = MGA_G200;
|
|
464
|
|
465 mga_config.ram_size = mga_ram_size;
|
|
466
|
|
467 if (copy_to_user((mga_vid_config_t *) arg, &mga_config, sizeof(mga_vid_config_t)))
|
|
468 {
|
|
469 printk("mga_vid: failed copy to userspace\n");
|
|
470 return(-EFAULT);
|
|
471 }
|
|
472 return mga_vid_set_config(&mga_config);
|
|
473 break;
|
|
474
|
|
475 case MGA_VID_ON:
|
|
476 printk("mga_vid: Video ON\n");
|
|
477 vid_src_ready = 1;
|
|
478 if(vid_overlay_on)
|
|
479 {
|
|
480 regs.besctl |= 1;
|
|
481 mga_vid_write_regs();
|
|
482 }
|
|
483 break;
|
|
484
|
|
485 case MGA_VID_OFF:
|
|
486 printk("mga_vid: Video OFF\n");
|
|
487 vid_src_ready = 0;
|
|
488 regs.besctl &= ~1;
|
|
489 mga_vid_write_regs();
|
|
490 break;
|
|
491
|
|
492 case MGA_VID_FSEL:
|
|
493 if(copy_from_user(&frame,(int *) arg,sizeof(int)))
|
|
494 {
|
|
495 printk("mga_vid: FSEL failed copy from userspace\n");
|
|
496 return(-EFAULT);
|
|
497 }
|
|
498
|
|
499 mga_vid_frame_sel(frame);
|
|
500 break;
|
|
501
|
|
502 default:
|
|
503 printk("mga_vid: Invalid ioctl\n");
|
|
504 return (-EINVAL);
|
|
505 }
|
|
506
|
|
507 return 0;
|
|
508 }
|
|
509
|
|
510
|
|
511 static int mga_vid_find_card(void)
|
|
512 {
|
|
513 struct pci_dev *dev = NULL;
|
|
514 unsigned int card_option, temp;
|
|
515
|
|
516 if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, NULL)))
|
|
517 {
|
|
518 is_g400 = 1;
|
|
519 printk("mga_vid: Found MGA G400\n");
|
|
520 }
|
|
521 else if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, NULL)))
|
|
522 {
|
|
523 is_g400 = 0;
|
|
524 printk("mga_vid: Found MGA G200 AGP\n");
|
|
525 }
|
|
526 else if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, NULL)))
|
|
527 {
|
|
528 is_g400 = 0;
|
|
529 printk("mga_vid: Found MGA G200 PCI\n");
|
|
530 }
|
|
531 else
|
|
532 {
|
|
533 printk("mga_vid: No supported cards found\n");
|
|
534 return FALSE;
|
|
535 }
|
|
536
|
|
537 pci_dev = dev;
|
|
538
|
|
539 #if LINUX_VERSION_CODE >= 0x020300
|
|
540 mga_mmio_base = ioremap_nocache(dev->resource[1].start,0x4000);
|
|
541 mga_mem_base = dev->resource[0].start;
|
|
542 #else
|
|
543 mga_mmio_base = ioremap_nocache(dev->base_address[1] & PCI_BASE_ADDRESS_MEM_MASK,0x4000);
|
|
544 mga_mem_base = dev->base_address[0] & PCI_BASE_ADDRESS_MEM_MASK;
|
|
545 #endif
|
|
546 printk("mga_vid: MMIO at 0x%p\n", mga_mmio_base);
|
|
547 printk("mga_vid: Frame Buffer at 0x%08lX\n", mga_mem_base);
|
|
548
|
|
549 pci_read_config_dword(dev, 0x40, &card_option);
|
|
550 printk("OPTION word: 0x%08x\n", card_option);
|
|
551
|
|
552 temp = (card_option >> 10) & 0x17;
|
|
553
|
|
554 if (is_g400)
|
|
555 {
|
|
556 switch(temp)
|
|
557 {
|
|
558 default:
|
|
559 mga_ram_size = 16;
|
|
560 }
|
|
561 }
|
|
562 else
|
|
563 {
|
|
564 // a g200
|
|
565 switch(temp)
|
|
566 {
|
|
567 default:
|
|
568 mga_ram_size = 8;
|
|
569 }
|
|
570 }
|
|
571
|
|
572 printk("mga_vid: RAMSIZE seems to be %d MB\n", (unsigned int) mga_ram_size);
|
|
573
|
|
574 return TRUE;
|
|
575 }
|
|
576
|
|
577
|
|
578 static ssize_t mga_vid_read(struct file *file, char *buf, size_t count, loff_t *ppos)
|
|
579 {
|
|
580 return -EINVAL;
|
|
581 }
|
|
582
|
|
583 static ssize_t mga_vid_write(struct file *file, const char *buf, size_t count, loff_t *ppos)
|
|
584 {
|
|
585 return -EINVAL;
|
|
586 }
|
|
587
|
|
588 static int mga_vid_mmap(struct file *file, struct vm_area_struct *vma)
|
|
589 {
|
|
590
|
|
591 printk("mga_vid: mapping video memory into userspace\n");
|
|
592 if(remap_page_range(vma->vm_start, mga_mem_base + (MGA_VIDMEM_SIZE-2) * 0x100000,
|
|
593 vma->vm_end - vma->vm_start, vma->vm_page_prot))
|
|
594 {
|
|
595 printk("mga_vid: error mapping video memory\n");
|
|
596 return(-EAGAIN);
|
|
597 }
|
|
598
|
|
599 return(0);
|
|
600 }
|
|
601
|
|
602 static int mga_vid_release(struct inode *inode, struct file *file)
|
|
603 {
|
|
604 //Close the window just in case
|
|
605 vid_src_ready = 0;
|
|
606 regs.besctl &= ~1;
|
|
607 mga_vid_write_regs();
|
|
608 mga_vid_in_use = 0;
|
|
609
|
|
610 //FIXME put back in!
|
|
611 //MOD_DEC_USE_COUNT;
|
|
612 return 0;
|
|
613 }
|
|
614
|
|
615 static long long mga_vid_lseek(struct file *file, long long offset, int origin)
|
|
616 {
|
|
617 return -ESPIPE;
|
|
618 }
|
|
619
|
|
620 static int mga_vid_open(struct inode *inode, struct file *file)
|
|
621 {
|
|
622 int minor = MINOR(inode->i_rdev);
|
|
623
|
|
624 if(minor != 0)
|
|
625 return(-ENXIO);
|
|
626
|
|
627 if(mga_vid_in_use == 1)
|
|
628 return(-EBUSY);
|
|
629
|
|
630 mga_vid_in_use = 1;
|
|
631 //FIXME turn me back on!
|
|
632 //MOD_INC_USE_COUNT;
|
|
633 return(0);
|
|
634 }
|
|
635
|
|
636 #if LINUX_VERSION_CODE >= 0x020400
|
|
637 static struct file_operations mga_vid_fops =
|
|
638 {
|
|
639 llseek: mga_vid_lseek,
|
|
640 read: mga_vid_read,
|
|
641 write: mga_vid_write,
|
|
642 ioctl: mga_vid_ioctl,
|
|
643 mmap: mga_vid_mmap,
|
|
644 open: mga_vid_open,
|
|
645 release: mga_vid_release
|
|
646 };
|
|
647 #else
|
|
648 static struct file_operations mga_vid_fops =
|
|
649 {
|
|
650 mga_vid_lseek,
|
|
651 mga_vid_read,
|
|
652 mga_vid_write,
|
|
653 NULL,
|
|
654 NULL,
|
|
655 mga_vid_ioctl,
|
|
656 mga_vid_mmap,
|
|
657 mga_vid_open,
|
|
658 NULL,
|
|
659 mga_vid_release
|
|
660 };
|
|
661 #endif
|
|
662
|
|
663
|
|
664 /*
|
|
665 * Main Initialization Function
|
|
666 */
|
|
667
|
|
668
|
|
669 static int mga_vid_initialize(void)
|
|
670 {
|
|
671 mga_vid_in_use = 0;
|
|
672
|
|
673 printk( "Matrox MGA G200/G400 YUV Video interface v0.01 (c) Aaron Holtzman \n");
|
|
674 if(register_chrdev(MGA_VID_MAJOR, "mga_vid", &mga_vid_fops))
|
|
675 {
|
|
676 printk("mga_vid: unable to get major: %d\n", MGA_VID_MAJOR);
|
|
677 return -EIO;
|
|
678 }
|
|
679
|
|
680 if (!mga_vid_find_card())
|
|
681 {
|
|
682 printk("mga_vid: no supported devices found\n");
|
|
683 unregister_chrdev(MGA_VID_MAJOR, "mga_vid");
|
|
684 return -EINVAL;
|
|
685 }
|
|
686
|
|
687 return(0);
|
|
688 }
|
|
689
|
|
690 int init_module(void)
|
|
691 {
|
|
692 return mga_vid_initialize();
|
|
693 }
|
|
694
|
|
695 void cleanup_module(void)
|
|
696 {
|
|
697 if(mga_mmio_base)
|
|
698 iounmap(mga_mmio_base);
|
|
699
|
|
700 //FIXME turn off BES
|
|
701 printk("mga_vid: Cleaning up module\n");
|
|
702 unregister_chrdev(MGA_VID_MAJOR, "mga_vid");
|
|
703 }
|
|
704
|