Mercurial > mplayer.hg
annotate vidix/drivers/pm3_vid.c @ 11169:9a100ec9135f
gamma weight patch by (Alexander Stege <mplayer at legale-software dot com>)
author | michael |
---|---|
date | Sat, 18 Oct 2003 23:02:30 +0000 |
parents | 6e35326c742f |
children | 972d1998bde9 |
rev | line source |
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1 /** |
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2 Driver for 3DLabs GLINT R3 and Permedia3 chips. |
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3 |
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4 Copyright (C) 2002 Måns Rullgård |
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5 |
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6 This program is free software; you can redistribute it and/or modify |
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7 it under the terms of the GNU General Public License as published by |
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8 the Free Software Foundation; either version 2 of the License, or |
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9 (at your option) any later version. |
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10 |
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11 This program is distributed in the hope that it will be useful, |
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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14 GNU General Public License for more details. |
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15 |
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16 You should have received a copy of the GNU General Public License |
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17 along with this program; if not, write to the Free Software |
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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19 **/ |
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20 |
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21 #include <errno.h> |
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22 #include <stdio.h> |
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23 #include <stdlib.h> |
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24 #include <string.h> |
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25 #include <inttypes.h> |
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26 #include <unistd.h> |
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27 |
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28 #include "../vidix.h" |
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29 #include "../fourcc.h" |
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30 #include "../../libdha/libdha.h" |
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31 #include "../../libdha/pci_ids.h" |
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32 #include "../../libdha/pci_names.h" |
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33 #include "../../config.h" |
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34 |
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35 #include "pm3_regs.h" |
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36 |
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37 #if 0 |
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38 #define TRACE_ENTER() fprintf(stderr, "%s: enter\n", __FUNCTION__) |
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39 #define TRACE_EXIT() fprintf(stderr, "%s: exit\n", __FUNCTION__) |
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40 #else |
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41 #define TRACE_ENTER() |
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42 #define TRACE_EXIT() |
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43 #endif |
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44 |
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45 pciinfo_t pci_info; |
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46 |
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47 void *pm3_reg_base; |
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48 void *pm3_mem; |
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49 |
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50 static vidix_capability_t pm3_cap = |
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51 { |
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52 "3DLabs GLINT R3/Permedia3 driver", |
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53 "Måns Rullgård <mru@users.sf.net>", |
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54 TYPE_OUTPUT, |
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55 { 0, 0, 0, 0 }, |
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56 2048, |
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57 2048, |
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58 4, |
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59 4, |
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60 -1, |
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61 FLAG_UPSCALER|FLAG_DOWNSCALER, |
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62 VENDOR_3DLABS, |
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63 -1, |
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64 { 0, 0, 0, 0 } |
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65 }; |
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66 |
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67 |
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68 unsigned int vixGetVersion(void) |
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69 { |
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70 return(VIDIX_VERSION); |
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71 } |
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72 |
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73 static unsigned short pm3_card_ids[] = |
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74 { |
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75 DEVICE_3DLABS_GLINT_R3 |
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76 }; |
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77 |
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78 static int find_chip(unsigned chip_id) |
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79 { |
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80 unsigned i; |
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81 for(i = 0;i < sizeof(pm3_card_ids)/sizeof(unsigned short);i++) |
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82 { |
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83 if(chip_id == pm3_card_ids[i]) return i; |
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84 } |
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85 return -1; |
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86 } |
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87 |
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88 int vixProbe(int verbose, int force) |
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89 { |
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90 pciinfo_t lst[MAX_PCI_DEVICES]; |
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91 unsigned i,num_pci; |
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92 int err; |
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93 |
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94 err = pci_scan(lst,&num_pci); |
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95 if(err) |
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96 { |
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97 printf("[pm3] Error occured during pci scan: %s\n",strerror(err)); |
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98 return err; |
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99 } |
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100 else |
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101 { |
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102 err = ENXIO; |
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103 for(i=0; i < num_pci; i++) |
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104 { |
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105 if(lst[i].vendor == VENDOR_3DLABS) |
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106 { |
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107 int idx; |
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108 const char *dname; |
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109 idx = find_chip(lst[i].device); |
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110 if(idx == -1) |
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111 continue; |
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112 dname = pci_device_name(VENDOR_3DLABS, lst[i].device); |
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113 dname = dname ? dname : "Unknown chip"; |
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114 printf("[pm3] Found chip: %s\n", dname); |
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115 if ((lst[i].command & PCI_COMMAND_IO) == 0) |
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116 { |
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117 printf("[pm3] Device is disabled, ignoring\n"); |
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118 continue; |
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119 } |
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120 pm3_cap.device_id = lst[i].device; |
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121 err = 0; |
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122 memcpy(&pci_info, &lst[i], sizeof(pciinfo_t)); |
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123 break; |
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124 } |
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125 } |
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126 } |
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127 if(err && verbose) printf("[pm3] Can't find chip\n"); |
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128 return err; |
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129 } |
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130 |
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131 #define PRINT_REG(reg) \ |
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132 { \ |
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133 long _foo = READ_REG(reg); \ |
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134 printf("[pm3] " #reg " (%x) = %#lx (%li)\n", reg, _foo, _foo); \ |
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135 } |
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136 |
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137 int vixInit(void) |
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138 { |
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139 pm3_reg_base = map_phys_mem(pci_info.base0, 0x20000); |
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140 pm3_mem = map_phys_mem(pci_info.base2, 0x2000000); |
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141 return 0; |
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142 } |
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143 |
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144 void vixDestroy(void) |
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145 { |
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146 unmap_phys_mem(pm3_reg_base, 0x20000); |
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147 unmap_phys_mem(pm3_mem, 0x2000000); |
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148 } |
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149 |
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150 int vixGetCapability(vidix_capability_t *to) |
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151 { |
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152 memcpy(to, &pm3_cap, sizeof(vidix_capability_t)); |
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153 return 0; |
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154 } |
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155 |
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156 static int is_supported_fourcc(uint32_t fourcc) |
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157 { |
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158 switch(fourcc){ |
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159 case IMGFMT_YUY2: |
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160 case IMGFMT_UYVY: |
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161 return 1; |
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162 default: |
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163 return 0; |
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164 } |
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165 } |
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166 |
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167 int vixQueryFourcc(vidix_fourcc_t *to) |
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168 { |
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169 if(is_supported_fourcc(to->fourcc)) |
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170 { |
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171 to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP | |
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172 VID_DEPTH_4BPP | VID_DEPTH_8BPP | |
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173 VID_DEPTH_12BPP| VID_DEPTH_15BPP| |
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174 VID_DEPTH_16BPP| VID_DEPTH_24BPP| |
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175 VID_DEPTH_32BPP; |
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176 to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY; |
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177 return 0; |
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178 } |
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179 else to->depth = to->flags = 0; |
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180 return ENOSYS; |
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181 } |
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182 |
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183 #define FORMAT_RGB8888 PM3VideoOverlayMode_COLORFORMAT_RGB8888 |
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184 #define FORMAT_RGB4444 PM3VideoOverlayMode_COLORFORMAT_RGB4444 |
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185 #define FORMAT_RGB5551 PM3VideoOverlayMode_COLORFORMAT_RGB5551 |
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186 #define FORMAT_RGB565 PM3VideoOverlayMode_COLORFORMAT_RGB565 |
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187 #define FORMAT_RGB332 PM3VideoOverlayMode_COLORFORMAT_RGB332 |
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188 #define FORMAT_BGR8888 PM3VideoOverlayMode_COLORFORMAT_BGR8888 |
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189 #define FORMAT_BGR4444 PM3VideoOverlayMode_COLORFORMAT_BGR4444 |
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190 #define FORMAT_BGR5551 PM3VideoOverlayMode_COLORFORMAT_BGR5551 |
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191 #define FORMAT_BGR565 PM3VideoOverlayMode_COLORFORMAT_BGR565 |
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192 #define FORMAT_BGR332 PM3VideoOverlayMode_COLORFORMAT_BGR332 |
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193 #define FORMAT_CI8 PM3VideoOverlayMode_COLORFORMAT_CI8 |
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194 #define FORMAT_VUY444 PM3VideoOverlayMode_COLORFORMAT_VUY444 |
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195 #define FORMAT_YUV444 PM3VideoOverlayMode_COLORFORMAT_YUV444 |
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196 #define FORMAT_VUY422 PM3VideoOverlayMode_COLORFORMAT_VUY422 |
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197 #define FORMAT_YUV422 PM3VideoOverlayMode_COLORFORMAT_YUV422 |
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198 |
11000 | 199 /* Notice, have to check that we don't overflow the deltas here ... */ |
6254
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200 static void |
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201 compute_scale_factor( |
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202 short* src_w, short* dst_w, |
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203 unsigned int* shrink_delta, unsigned int* zoom_delta) |
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204 { |
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205 /* NOTE: If we don't return reasonable values here then the video |
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206 * unit can potential shut off and won't display an image until re-enabled. |
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207 * Seems as though the zoom_delta is o.k, and I've not had the problem. |
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208 * The 'shrink_delta' is prone to this the most - FIXME ! */ |
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|
209 |
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|
210 if (*src_w >= *dst_w) { |
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211 *src_w &= ~0x3; |
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212 *dst_w &= ~0x3; |
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213 *shrink_delta = (((*src_w << 16) / *dst_w) + 0x0f) & 0x0ffffff0; |
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214 *zoom_delta = 1<<16; |
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|
215 if ( ((*shrink_delta * *dst_w) >> 16) & 0x03 ) |
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216 *shrink_delta += 0x10; |
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|
217 } else { |
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218 *src_w &= ~0x3; |
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219 *dst_w &= ~0x3; |
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220 *zoom_delta = (((*src_w << 16) / *dst_w) + 0x0f) & 0x0001fff0; |
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221 *shrink_delta = 1<<16; |
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222 if ( ((*zoom_delta * *dst_w) >> 16) & 0x03 ) |
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223 *zoom_delta += 0x10; |
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|
224 } |
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|
225 } |
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|
226 |
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|
227 static int frames[VID_PLAY_MAXFRAMES]; |
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|
228 |
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229 static long overlay_mode, overlay_control; |
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|
230 |
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231 int vixConfigPlayback(vidix_playback_t *info) |
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232 { |
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233 int shrink, zoom; |
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234 short src_w, drw_w; |
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235 short src_h, drw_h; |
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236 long base0; |
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237 int pitch; |
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|
238 int format; |
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|
239 unsigned int i; |
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|
240 |
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241 TRACE_ENTER(); |
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242 |
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243 if(!is_supported_fourcc(info->fourcc)) |
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244 return -1; |
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|
245 |
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246 switch(info->fourcc){ |
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247 case IMGFMT_YUY2: |
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248 format = FORMAT_YUV422; |
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249 break; |
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250 case IMGFMT_UYVY: |
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251 format = FORMAT_VUY422; |
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252 break; |
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|
253 default: |
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254 return -1; |
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|
255 } |
034b12194350
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|
256 |
034b12194350
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257 src_w = info->src.w; |
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258 src_h = info->src.h; |
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|
259 |
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|
260 drw_w = info->dest.w; |
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261 drw_h = info->dest.h; |
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|
262 |
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|
263 pitch = src_w; |
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|
264 |
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|
265 /* Assume we have 16 MB to play with */ |
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266 info->num_frames = 0x1000000 / (pitch * src_h * 2); |
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267 if(info->num_frames > VID_PLAY_MAXFRAMES) |
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268 info->num_frames = VID_PLAY_MAXFRAMES; |
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|
269 |
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|
270 /* Start at 16 MB. Let's hope it's not in use. */ |
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271 base0 = 0x1000000; |
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272 info->dga_addr = pm3_mem + base0; |
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273 |
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|
274 info->dest.pitch.y = 2; |
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275 info->dest.pitch.u = 0; |
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276 info->dest.pitch.v = 0; |
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277 info->offset.y = 0; |
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|
278 info->offset.v = 0; |
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279 info->offset.u = 0; |
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280 info->frame_size = pitch * src_h * 2; |
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281 for(i = 0; i < info->num_frames; i++){ |
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282 info->offsets[i] = info->frame_size * i; |
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283 frames[i] = (base0 + info->offsets[i]) >> 1; |
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|
284 } |
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|
285 |
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|
286 compute_scale_factor(&src_w, &drw_w, &shrink, &zoom); |
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|
287 |
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|
288 WRITE_REG(PM3VideoOverlayBase0, base0 >> 1); |
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|
289 WRITE_REG(PM3VideoOverlayStride, PM3VideoOverlayStride_STRIDE(pitch)); |
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|
290 WRITE_REG(PM3VideoOverlayWidth, PM3VideoOverlayWidth_WIDTH(src_w)); |
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|
291 WRITE_REG(PM3VideoOverlayHeight, PM3VideoOverlayHeight_HEIGHT(src_h)); |
034b12194350
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|
292 WRITE_REG(PM3VideoOverlayOrigin, 0); |
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|
293 |
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|
294 /* Scale the source to the destinationsize */ |
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|
295 if (src_h == drw_h) { |
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|
296 WRITE_REG(PM3VideoOverlayYDelta, PM3VideoOverlayYDelta_NONE); |
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|
297 } else { |
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|
298 WRITE_REG(PM3VideoOverlayYDelta, |
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|
299 PM3VideoOverlayYDelta_DELTA(src_h, drw_h)); |
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|
300 } |
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|
301 if (src_w == drw_w) { |
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|
302 WRITE_REG(PM3VideoOverlayShrinkXDelta, 1<<16); |
034b12194350
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|
303 WRITE_REG(PM3VideoOverlayZoomXDelta, 1<<16); |
034b12194350
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|
304 } else { |
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|
305 WRITE_REG(PM3VideoOverlayShrinkXDelta, shrink); |
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|
306 WRITE_REG(PM3VideoOverlayZoomXDelta, zoom); |
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|
307 } |
034b12194350
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|
308 WRITE_REG(PM3VideoOverlayIndex, 0); |
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|
309 |
034b12194350
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|
310 /* Now set the ramdac video overlay region and mode */ |
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|
311 RAMDAC_SET_REG(PM3RD_VideoOverlayXStartLow, (info->dest.x & 0xff)); |
034b12194350
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|
312 RAMDAC_SET_REG(PM3RD_VideoOverlayXStartHigh, (info->dest.x & 0xf00)>>8); |
034b12194350
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|
313 RAMDAC_SET_REG(PM3RD_VideoOverlayXEndLow, (info->dest.x+drw_w) & 0xff); |
034b12194350
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|
314 RAMDAC_SET_REG(PM3RD_VideoOverlayXEndHigh, |
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|
315 ((info->dest.x+drw_w) & 0xf00)>>8); |
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|
316 RAMDAC_SET_REG(PM3RD_VideoOverlayYStartLow, (info->dest.y & 0xff)); |
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|
317 RAMDAC_SET_REG(PM3RD_VideoOverlayYStartHigh, (info->dest.y & 0xf00)>>8); |
034b12194350
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|
318 RAMDAC_SET_REG(PM3RD_VideoOverlayYEndLow, (info->dest.y+drw_h) & 0xff); |
034b12194350
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|
319 RAMDAC_SET_REG(PM3RD_VideoOverlayYEndHigh, |
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|
320 ((info->dest.y+drw_h) & 0xf00)>>8); |
034b12194350
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|
321 |
034b12194350
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|
322 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyR, 0xff); |
034b12194350
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|
323 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, 0x00); |
034b12194350
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|
324 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyB, 0xff); |
034b12194350
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|
325 |
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|
326 overlay_mode = |
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parents:
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|
327 1 << 5 | |
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parents:
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|
328 format | |
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|
329 PM3VideoOverlayMode_FILTER_FULL | |
034b12194350
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parents:
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|
330 PM3VideoOverlayMode_BUFFERSYNC_MANUAL | |
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|
331 PM3VideoOverlayMode_FLIP_VIDEO; |
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parents:
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|
332 |
034b12194350
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parents:
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changeset
|
333 overlay_control = |
034b12194350
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parents:
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|
334 PM3RD_VideoOverlayControl_KEY_COLOR | |
034b12194350
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parents:
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changeset
|
335 PM3RD_VideoOverlayControl_MODE_MAINKEY | |
034b12194350
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parents:
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|
336 PM3RD_VideoOverlayControl_DIRECTCOLOR_ENABLED; |
034b12194350
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parents:
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changeset
|
337 |
034b12194350
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parents:
diff
changeset
|
338 TRACE_EXIT(); |
034b12194350
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parents:
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changeset
|
339 return 0; |
034b12194350
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parents:
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changeset
|
340 } |
034b12194350
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parents:
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changeset
|
341 |
034b12194350
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arpi
parents:
diff
changeset
|
342 int vixPlaybackOn(void) |
034b12194350
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parents:
diff
changeset
|
343 { |
034b12194350
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parents:
diff
changeset
|
344 TRACE_ENTER(); |
034b12194350
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parents:
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changeset
|
345 |
034b12194350
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parents:
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changeset
|
346 WRITE_REG(PM3VideoOverlayMode, |
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parents:
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changeset
|
347 overlay_mode | PM3VideoOverlayMode_ENABLE); |
034b12194350
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parents:
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|
348 RAMDAC_SET_REG(PM3RD_VideoOverlayControl, |
034b12194350
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parents:
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changeset
|
349 overlay_control | PM3RD_VideoOverlayControl_ENABLE); |
034b12194350
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parents:
diff
changeset
|
350 WRITE_REG(PM3VideoOverlayUpdate, |
034b12194350
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parents:
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changeset
|
351 PM3VideoOverlayUpdate_ENABLE); |
034b12194350
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parents:
diff
changeset
|
352 |
034b12194350
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parents:
diff
changeset
|
353 TRACE_EXIT(); |
034b12194350
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parents:
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changeset
|
354 return 0; |
034b12194350
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parents:
diff
changeset
|
355 } |
034b12194350
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parents:
diff
changeset
|
356 |
034b12194350
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arpi
parents:
diff
changeset
|
357 int vixPlaybackOff(void) |
034b12194350
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parents:
diff
changeset
|
358 { |
034b12194350
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parents:
diff
changeset
|
359 RAMDAC_SET_REG(PM3RD_VideoOverlayControl, |
034b12194350
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parents:
diff
changeset
|
360 PM3RD_VideoOverlayControl_DISABLE); |
034b12194350
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parents:
diff
changeset
|
361 WRITE_REG(PM3VideoOverlayMode, |
034b12194350
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arpi
parents:
diff
changeset
|
362 PM3VideoOverlayMode_DISABLE); |
034b12194350
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parents:
diff
changeset
|
363 |
034b12194350
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parents:
diff
changeset
|
364 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyR, 0x01); |
034b12194350
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parents:
diff
changeset
|
365 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, 0x01); |
034b12194350
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parents:
diff
changeset
|
366 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyB, 0xfe); |
034b12194350
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arpi
parents:
diff
changeset
|
367 |
034b12194350
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parents:
diff
changeset
|
368 return 0; |
034b12194350
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parents:
diff
changeset
|
369 } |
034b12194350
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parents:
diff
changeset
|
370 |
034b12194350
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arpi
parents:
diff
changeset
|
371 int vixPlaybackFrameSelect(unsigned int frame) |
034b12194350
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arpi
parents:
diff
changeset
|
372 { |
034b12194350
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parents:
diff
changeset
|
373 WRITE_REG(PM3VideoOverlayBase0, frames[frame]); |
034b12194350
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parents:
diff
changeset
|
374 return 0; |
034b12194350
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parents:
diff
changeset
|
375 } |