Mercurial > mplayer.hg
annotate vidix/drivers/sis_regs.h @ 11169:9a100ec9135f
gamma weight patch by (Alexander Stege <mplayer at legale-software dot com>)
author | michael |
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date | Sat, 18 Oct 2003 23:02:30 +0000 |
parents | 3bac281db5a1 |
children | 401b440a6d76 |
rev | line source |
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11038
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
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1 /** |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
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2 SiS register definitions and access macros. |
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3 From SiS X11 driver. |
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4 |
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5 Copyright 2001-2003 by Thomas Winischhofer, Vienna, Austria. |
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6 |
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7 This program is free software; you can redistribute it and/or modify |
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8 it under the terms of the GNU General Public License as published by |
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9 the Free Software Foundation; either version 2 of the License, or |
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10 (at your option) any later version. |
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11 |
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12 This program is distributed in the hope that it will be useful, |
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13 but WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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15 GNU General Public License for more details. |
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16 |
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17 You should have received a copy of the GNU General Public License |
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18 along with this program; if not, write to the Free Software |
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19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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20 |
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21 **/ |
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22 |
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23 #ifndef VIDIX_SIS_REGS_H |
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24 #define VIDIX_SIS_REGS_H |
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25 |
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26 #define inSISREG(base) INPORT8(base) |
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27 #define outSISREG(base,val) OUTPORT8(base, val) |
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28 #define orSISREG(base,val) do { \ |
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29 unsigned char __Temp = INPORT8(base); \ |
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30 outSISREG(base, __Temp | (val)); \ |
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31 } while (0) |
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32 #define andSISREG(base,val) do { \ |
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33 unsigned char __Temp = INPORT8(base); \ |
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34 outSISREG(base, __Temp & (val)); \ |
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35 } while (0) |
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36 |
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37 #define inSISIDXREG(base,idx,var) do { \ |
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38 OUTPORT8(base, idx); var=INPORT8((base)+1); \ |
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39 } while (0) |
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40 #define outSISIDXREG(base,idx,val) do { \ |
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41 OUTPORT8(base, idx); OUTPORT8((base)+1, val); \ |
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42 } while (0) |
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43 #define orSISIDXREG(base,idx,val) do { \ |
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44 unsigned char __Temp; \ |
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45 OUTPORT8(base, idx); \ |
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46 __Temp = INPORT8((base)+1)|(val); \ |
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47 outSISIDXREG(base,idx,__Temp); \ |
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48 } while (0) |
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49 #define andSISIDXREG(base,idx,and) do { \ |
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50 unsigned char __Temp; \ |
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51 OUTPORT8(base, idx); \ |
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52 __Temp = INPORT8((base)+1)&(and); \ |
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53 outSISIDXREG(base,idx,__Temp); \ |
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54 } while (0) |
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55 #define setSISIDXREG(base,idx,and,or) do { \ |
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56 unsigned char __Temp; \ |
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57 OUTPORT8(base, idx); \ |
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58 __Temp = (INPORT8((base)+1)&(and))|(or); \ |
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59 outSISIDXREG(base,idx,__Temp); \ |
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60 } while (0) |
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61 |
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62 #define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l)) |
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63 #define GENMASK(mask) BITMASK(1?mask,0?mask) |
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64 |
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65 #define GETBITS(var,mask) (((var) & GENMASK(mask)) >> (0?mask)) |
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66 #define SETBITS(val,mask) ((val) << (0?mask)) |
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67 #define SETBIT(n) (1<<(n)) |
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68 |
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69 #define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to)) |
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70 #define SETVARBITS(var,val,from,to) (((var)&(~(GENMASK(to)))) | \ |
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71 GETBITSTR(val,from,to)) |
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72 #define GETVAR8(var) ((var)&0xFF) |
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73 #define SETVAR8(var,val) (var) = GETVAR8(val) |
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74 |
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75 /* #define VGA_RELIO_BASE 0x380 */ |
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76 |
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77 #define AROFFSET 0x40 /* VGA_ATTR_INDEX - VGA_RELIO_BASE */ |
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78 #define ARROFFSET 0x41 /* VGA_ATTR_DATA_R - VGA_RELIO_BASE */ |
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79 #define GROFFSET 0x4e /* VGA_GRAPH_INDEX - VGA_RELIO_BASE */ |
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80 #define SROFFSET 0x44 /* VGA_SEQ_INDEX - VGA_RELIO_BASE */ |
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81 #define CROFFSET 0x54 /* VGA_CRTC_INDEX_OFFSET + VGA_IOBASE_COLOR - VGA_RELIO_BASE */ |
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82 #define MISCROFFSET 0x4c /* VGA_MISC_OUT_R - VGA_RELIO_BASE */ |
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83 #define MISCWOFFSET 0x42 /* VGA_MISC_OUT_W - VGA_RELIO_BASE */ |
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84 #define INPUTSTATOFFSET 0x5A |
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85 #define PART1OFFSET 0x04 |
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86 #define PART2OFFSET 0x10 |
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87 #define PART3OFFSET 0x12 |
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88 #define PART4OFFSET 0x14 |
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89 #define PART5OFFSET 0x16 |
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90 #define VIDEOOFFSET 0x02 |
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91 #define COLREGOFFSET 0x48 |
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92 |
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93 #define SIS_IOBASE sis_iobase /* var defined in sis_vid.c */ |
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94 #define SISAR SIS_IOBASE + AROFFSET |
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95 #define SISARR SIS_IOBASE + ARROFFSET |
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96 #define SISGR SIS_IOBASE + GROFFSET |
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97 #define SISSR SIS_IOBASE + SROFFSET |
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98 #define SISCR SIS_IOBASE + CROFFSET |
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99 #define SISMISCR SIS_IOBASE + MISCROFFSET |
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100 #define SISMISCW SIS_IOBASE + MISCWOFFSET |
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101 #define SISINPSTAT SIS_IOBASE + INPUTSTATOFFSET |
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102 #define SISPART1 SIS_IOBASE + PART1OFFSET |
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103 #define SISPART2 SIS_IOBASE + PART2OFFSET |
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104 #define SISPART3 SIS_IOBASE + PART3OFFSET |
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105 #define SISPART4 SIS_IOBASE + PART4OFFSET |
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106 #define SISPART5 SIS_IOBASE + PART5OFFSET |
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107 #define SISVID SIS_IOBASE + VIDEOOFFSET |
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108 #define SISCOLIDX SIS_IOBASE + COLREGOFFSET |
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109 #define SISCOLDATA SIS_IOBASE + COLREGOFFSET + 1 |
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110 #define SISCOL2IDX SISPART5 |
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111 #define SISCOL2DATA SISPART5 + 1 |
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112 |
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113 |
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114 #define vc_index_offset 0x00 /* Video capture - unused */ |
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115 #define vc_data_offset 0x01 |
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116 #define vi_index_offset VIDEOOFFSET |
3bac281db5a1
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117 #define vi_data_offset (VIDEOOFFSET + 1) |
3bac281db5a1
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118 #define crt2_index_offset PART1OFFSET |
3bac281db5a1
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119 #define crt2_port_offset (PART1OFFSET + 1) |
3bac281db5a1
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120 #define sr_index_offset SROFFSET |
3bac281db5a1
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121 #define sr_data_offset (SROFFSET + 1) |
3bac281db5a1
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122 #define cr_index_offset CROFFSET |
3bac281db5a1
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123 #define cr_data_offset (CROFFSET + 1) |
3bac281db5a1
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124 #define input_stat INPUTSTATOFFSET |
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125 |
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126 /* For old chipsets (5597/5598, 6326, 530/620) ------------ */ |
3bac281db5a1
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127 /* SR (3C4) */ |
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128 #define BankReg 0x06 |
3bac281db5a1
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129 #define ClockReg 0x07 |
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130 #define CPUThreshold 0x08 |
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131 #define CRTThreshold 0x09 |
3bac281db5a1
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132 #define CRTCOff 0x0A |
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133 #define DualBanks 0x0B |
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134 #define MMIOEnable 0x0B |
3bac281db5a1
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135 #define RAMSize 0x0C |
3bac281db5a1
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136 #define Mode64 0x0C |
3bac281db5a1
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137 #define ExtConfStatus1 0x0E |
3bac281db5a1
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138 #define ClockBase 0x13 |
3bac281db5a1
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139 #define LinearAdd0 0x20 |
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140 #define LinearAdd1 0x21 |
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141 #define GraphEng 0x27 |
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142 #define MemClock0 0x28 |
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143 #define MemClock1 0x29 |
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144 #define XR2A 0x2A |
3bac281db5a1
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145 #define XR2B 0x2B |
3bac281db5a1
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146 #define TurboQueueBase 0x2C |
3bac281db5a1
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147 #define FBSize 0x2F |
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148 #define ExtMiscCont5 0x34 |
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149 #define ExtMiscCont9 0x3C |
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150 |
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151 /* 3x4 */ |
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152 #define Offset 0x13 |
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153 |
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154 /* SiS Registers for 300, 540, 630, 730, 315, 550, 650, 740 */ |
3bac281db5a1
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155 |
3bac281db5a1
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156 /* VGA standard register */ |
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157 #define Index_SR_Graphic_Mode 0x06 |
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158 #define Index_SR_RAMDAC_Ctrl 0x07 |
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159 #define Index_SR_Threshold_Ctrl1 0x08 |
3bac281db5a1
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160 #define Index_SR_Threshold_Ctrl2 0x09 |
3bac281db5a1
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161 #define Index_SR_Misc_Ctrl 0x0F |
3bac281db5a1
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162 #define Index_SR_DDC 0x11 |
3bac281db5a1
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163 #define Index_SR_Feature_Connector_Ctrl 0x12 |
3bac281db5a1
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164 #define Index_SR_DRAM_Sizing 0x14 |
3bac281db5a1
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165 #define Index_SR_DRAM_State_Machine_Ctrl 0x15 |
3bac281db5a1
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166 #define Index_SR_AGP_PCI_State_Machine 0x21 |
3bac281db5a1
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167 #define Index_SR_Internal_MCLK0 0x28 |
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168 #define Index_SR_Internal_MCLK1 0x29 |
3bac281db5a1
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169 #define Index_SR_Internal_DCLK1 0x2B |
3bac281db5a1
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170 #define Index_SR_Internal_DCLK2 0x2C |
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171 #define Index_SR_Internal_DCLK3 0x2D |
3bac281db5a1
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172 #define Index_SR_Ext_Clock_Sel 0x32 |
3bac281db5a1
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173 #define Index_SR_Int_Status 0x34 |
3bac281db5a1
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174 #define Index_SR_Int_Enable 0x35 |
3bac281db5a1
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175 #define Index_SR_Int_Reset 0x36 |
3bac281db5a1
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176 #define Index_SR_Power_On_Trap 0x38 |
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177 #define Index_SR_Power_On_Trap2 0x39 |
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178 #define Index_SR_Power_On_Trap3 0x3A |
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179 |
3bac281db5a1
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180 /* video registers (300/630/730/315/550/650/740 only) */ |
3bac281db5a1
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181 #define Index_VI_Passwd 0x00 |
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182 |
3bac281db5a1
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parents:
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|
183 /* Video overlay horizontal start/end, unit=screen pixels */ |
3bac281db5a1
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184 #define Index_VI_Win_Hor_Disp_Start_Low 0x01 |
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185 #define Index_VI_Win_Hor_Disp_End_Low 0x02 |
3bac281db5a1
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186 #define Index_VI_Win_Hor_Over 0x03 /* Overflow */ |
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187 |
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parents:
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|
188 /* Video overlay vertical start/end, unit=screen pixels */ |
3bac281db5a1
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189 #define Index_VI_Win_Ver_Disp_Start_Low 0x04 |
3bac281db5a1
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alex
parents:
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190 #define Index_VI_Win_Ver_Disp_End_Low 0x05 |
3bac281db5a1
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alex
parents:
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191 #define Index_VI_Win_Ver_Over 0x06 /* Overflow */ |
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192 |
3bac281db5a1
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parents:
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193 /* Y Plane (4:2:0) or YUV (4:2:2) buffer start address, unit=word */ |
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parents:
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194 #define Index_VI_Disp_Y_Buf_Start_Low 0x07 |
3bac281db5a1
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alex
parents:
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195 #define Index_VI_Disp_Y_Buf_Start_Middle 0x08 |
3bac281db5a1
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parents:
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196 #define Index_VI_Disp_Y_Buf_Start_High 0x09 |
3bac281db5a1
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197 |
3bac281db5a1
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parents:
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198 /* U Plane (4:2:0) buffer start address, unit=word */ |
3bac281db5a1
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parents:
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199 #define Index_VI_U_Buf_Start_Low 0x0A |
3bac281db5a1
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200 #define Index_VI_U_Buf_Start_Middle 0x0B |
3bac281db5a1
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parents:
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201 #define Index_VI_U_Buf_Start_High 0x0C |
3bac281db5a1
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202 |
3bac281db5a1
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alex
parents:
diff
changeset
|
203 /* V Plane (4:2:0) buffer start address, unit=word */ |
3bac281db5a1
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alex
parents:
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|
204 #define Index_VI_V_Buf_Start_Low 0x0D |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
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|
205 #define Index_VI_V_Buf_Start_Middle 0x0E |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
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|
206 #define Index_VI_V_Buf_Start_High 0x0F |
3bac281db5a1
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alex
parents:
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|
207 |
3bac281db5a1
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alex
parents:
diff
changeset
|
208 /* Pitch for Y, UV Planes, unit=word */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
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|
209 #define Index_VI_Disp_Y_Buf_Pitch_Low 0x10 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
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210 #define Index_VI_Disp_UV_Buf_Pitch_Low 0x11 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
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changeset
|
211 #define Index_VI_Disp_Y_UV_Buf_Pitch_Middle 0x12 |
3bac281db5a1
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parents:
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212 |
3bac281db5a1
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alex
parents:
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changeset
|
213 /* What is this ? */ |
3bac281db5a1
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alex
parents:
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changeset
|
214 #define Index_VI_Disp_Y_Buf_Preset_Low 0x13 |
3bac281db5a1
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alex
parents:
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|
215 #define Index_VI_Disp_Y_Buf_Preset_Middle 0x14 |
3bac281db5a1
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alex
parents:
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|
216 |
3bac281db5a1
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alex
parents:
diff
changeset
|
217 #define Index_VI_UV_Buf_Preset_Low 0x15 |
3bac281db5a1
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alex
parents:
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218 #define Index_VI_UV_Buf_Preset_Middle 0x16 |
3bac281db5a1
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parents:
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219 #define Index_VI_Disp_Y_UV_Buf_Preset_High 0x17 |
3bac281db5a1
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parents:
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|
220 |
3bac281db5a1
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alex
parents:
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|
221 /* Scaling control registers */ |
3bac281db5a1
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alex
parents:
diff
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|
222 #define Index_VI_Hor_Post_Up_Scale_Low 0x18 |
3bac281db5a1
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alex
parents:
diff
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|
223 #define Index_VI_Hor_Post_Up_Scale_High 0x19 |
3bac281db5a1
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alex
parents:
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224 #define Index_VI_Ver_Up_Scale_Low 0x1A |
3bac281db5a1
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alex
parents:
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|
225 #define Index_VI_Ver_Up_Scale_High 0x1B |
3bac281db5a1
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alex
parents:
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|
226 #define Index_VI_Scale_Control 0x1C |
3bac281db5a1
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alex
parents:
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|
227 |
3bac281db5a1
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alex
parents:
diff
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|
228 /* Playback line buffer control */ |
3bac281db5a1
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alex
parents:
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229 #define Index_VI_Play_Threshold_Low 0x1D |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
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|
230 #define Index_VI_Play_Threshold_High 0x1E |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
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|
231 #define Index_VI_Line_Buffer_Size 0x1F |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
232 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
233 /* Destination color key */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
234 #define Index_VI_Overlay_ColorKey_Red_Min 0x20 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
235 #define Index_VI_Overlay_ColorKey_Green_Min 0x21 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
236 #define Index_VI_Overlay_ColorKey_Blue_Min 0x22 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
237 #define Index_VI_Overlay_ColorKey_Red_Max 0x23 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
238 #define Index_VI_Overlay_ColorKey_Green_Max 0x24 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
239 #define Index_VI_Overlay_ColorKey_Blue_Max 0x25 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
240 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
241 /* Source color key, YUV color space */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
242 #define Index_VI_Overlay_ChromaKey_Red_Y_Min 0x26 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
243 #define Index_VI_Overlay_ChromaKey_Green_U_Min 0x27 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
244 #define Index_VI_Overlay_ChromaKey_Blue_V_Min 0x28 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
245 #define Index_VI_Overlay_ChromaKey_Red_Y_Max 0x29 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
246 #define Index_VI_Overlay_ChromaKey_Green_U_Max 0x2A |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
247 #define Index_VI_Overlay_ChromaKey_Blue_V_Max 0x2B |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
248 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
249 /* Contrast enhancement and brightness control */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
250 #define Index_VI_Contrast_Factor 0x2C /* obviously unused/undefined */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
251 #define Index_VI_Brightness 0x2D |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
252 #define Index_VI_Contrast_Enh_Ctrl 0x2E |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
253 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
254 #define Index_VI_Key_Overlay_OP 0x2F |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
255 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
256 #define Index_VI_Control_Misc0 0x30 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
257 #define Index_VI_Control_Misc1 0x31 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
258 #define Index_VI_Control_Misc2 0x32 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
259 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
260 /* TW: Subpicture registers */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
261 #define Index_VI_SubPict_Buf_Start_Low 0x33 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
262 #define Index_VI_SubPict_Buf_Start_Middle 0x34 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
263 #define Index_VI_SubPict_Buf_Start_High 0x35 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
264 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
265 /* TW: What is this ? */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
266 #define Index_VI_SubPict_Buf_Preset_Low 0x36 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
267 #define Index_VI_SubPict_Buf_Preset_Middle 0x37 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
268 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
269 /* TW: Subpicture pitch, unit=16 bytes */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
270 #define Index_VI_SubPict_Buf_Pitch 0x38 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
271 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
272 /* TW: Subpicture scaling control */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
273 #define Index_VI_SubPict_Hor_Scale_Low 0x39 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
274 #define Index_VI_SubPict_Hor_Scale_High 0x3A |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
275 #define Index_VI_SubPict_Vert_Scale_Low 0x3B |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
276 #define Index_VI_SubPict_Vert_Scale_High 0x3C |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
277 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
278 #define Index_VI_SubPict_Scale_Control 0x3D |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
279 /* (0x40 = enable/disable subpicture) */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
280 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
281 /* TW: Subpicture line buffer control */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
282 #define Index_VI_SubPict_Threshold 0x3E |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
283 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
284 /* TW: What is this? */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
285 #define Index_VI_FIFO_Max 0x3F |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
286 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
287 /* TW: Subpicture palette; 16 colors, total 32 bytes address space */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
288 #define Index_VI_SubPict_Pal_Base_Low 0x40 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
289 #define Index_VI_SubPict_Pal_Base_High 0x41 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
290 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
291 /* I wish I knew how to use these ... */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
292 #define Index_MPEG_Read_Ctrl0 0x60 /* MPEG auto flip */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
293 #define Index_MPEG_Read_Ctrl1 0x61 /* MPEG auto flip */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
294 #define Index_MPEG_Read_Ctrl2 0x62 /* MPEG auto flip */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
295 #define Index_MPEG_Read_Ctrl3 0x63 /* MPEG auto flip */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
296 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
297 /* TW: MPEG AutoFlip scale */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
298 #define Index_MPEG_Ver_Up_Scale_Low 0x64 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
299 #define Index_MPEG_Ver_Up_Scale_High 0x65 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
300 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
301 #define Index_MPEG_Y_Buf_Preset_Low 0x66 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
302 #define Index_MPEG_Y_Buf_Preset_Middle 0x67 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
303 #define Index_MPEG_UV_Buf_Preset_Low 0x68 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
304 #define Index_MPEG_UV_Buf_Preset_Middle 0x69 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
305 #define Index_MPEG_Y_UV_Buf_Preset_High 0x6A |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
306 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
307 /* TW: The following registers only exist on the 310/325 series */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
308 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
309 /* TW: Bit 16:24 of Y_U_V buf start address (?) */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
310 #define Index_VI_Y_Buf_Start_Over 0x6B |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
311 #define Index_VI_U_Buf_Start_Over 0x6C |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
312 #define Index_VI_V_Buf_Start_Over 0x6D |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
313 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
314 #define Index_VI_Disp_Y_Buf_Pitch_High 0x6E |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
315 #define Index_VI_Disp_UV_Buf_Pitch_High 0x6F |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
316 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
317 /* Hue and saturation */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
318 #define Index_VI_Hue 0x70 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
319 #define Index_VI_Saturation 0x71 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
320 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
321 #define Index_VI_SubPict_Start_Over 0x72 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
322 #define Index_VI_SubPict_Buf_Pitch_High 0x73 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
323 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
324 #define Index_VI_Control_Misc3 0x74 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
325 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
326 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
327 /* TW: Bits (and helpers) for Index_VI_Control_Misc0 */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
328 #define VI_Misc0_Enable_Overlay 0x02 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
329 #define VI_Misc0_420_Plane_Enable 0x04 /* Select Plane or Packed mode */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
330 #define VI_Misc0_422_Enable 0x20 /* Select 422 or 411 mode */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
331 #define VI_Misc0_Fmt_YVU420P 0x0C /* YUV420 Planar (I420, YV12) */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
332 #define VI_Misc0_Fmt_YUYV 0x28 /* YUYV Packed (YUY2) */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
333 #define VI_Misc0_Fmt_UYVY 0x08 /* (UYVY) */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
334 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
335 /* TW: Bits for Index_VI_Control_Misc1 */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
336 /* #define VI_Misc1_? 0x01 */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
337 #define VI_Misc1_BOB_Enable 0x02 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
338 #define VI_Misc1_Line_Merge 0x04 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
339 #define VI_Misc1_Field_Mode 0x08 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
340 /* #define VI_Misc1_? 0x10 */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
341 #define VI_Misc1_Non_Interleave 0x20 /* 300 series only? */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
342 #define VI_Misc1_Buf_Addr_Lock 0x20 /* 310 series only? */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
343 /* #define VI_Misc1_? 0x40 */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
344 /* #define VI_Misc1_? 0x80 */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
345 |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
changeset
|
346 /* TW: Bits for Index_VI_Control_Misc2 */ |
3bac281db5a1
SiS 650/651/740/etc driver by Jake Page <jake@CS.Stanford.EDU>
alex
parents:
diff
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347 #define VI_Misc2_Select_Video2 0x01 |
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348 #define VI_Misc2_Video2_On_Top 0x02 |
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349 /* #define VI_Misc2_? 0x04 */ |
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350 #define VI_Misc2_Vertical_Interpol 0x08 |
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351 #define VI_Misc2_Dual_Line_Merge 0x10 |
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352 #define VI_Misc2_All_Line_Merge 0x20 /* 310 series only? */ |
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353 #define VI_Misc2_Auto_Flip_Enable 0x40 /* 300 series only? */ |
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354 #define VI_Misc2_Video_Reg_Write_Enable 0x80 /* 310 series only? */ |
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355 |
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356 /* TW: Bits for Index_VI_Control_Misc3 */ |
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357 #define VI_Misc3_Submit_Video_1 0x01 /* AKA "address ready" */ |
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358 #define VI_Misc3_Submit_Video_2 0x02 /* AKA "address ready" */ |
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359 #define VI_Misc3_Submit_SubPict 0x04 /* AKA "address ready" */ |
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360 |
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361 /* TW: Values for Index_VI_Key_Overlay_OP (0x2F) */ |
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362 #define VI_ROP_Never 0x00 |
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363 #define VI_ROP_DestKey 0x03 |
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364 #define VI_ROP_Always 0x0F |
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365 |
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366 /* |
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367 * CRT_2 function control register --------------------------------- |
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368 */ |
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369 #define Index_CRT2_FC_CONTROL 0x00 |
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370 #define Index_CRT2_FC_SCREEN_HIGH 0x04 |
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371 #define Index_CRT2_FC_SCREEN_MID 0x05 |
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372 #define Index_CRT2_FC_SCREEN_LOW 0x06 |
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373 #define Index_CRT2_FC_ENABLE_WRITE 0x24 |
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374 #define Index_CRT2_FC_VR 0x25 |
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375 #define Index_CRT2_FC_VCount 0x27 |
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376 #define Index_CRT2_FC_VCount1 0x28 |
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377 |
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378 #define Index_310_CRT2_FC_VR 0x30 /* d[1] = vertical retrace */ |
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379 #define Index_310_CRT2_FC_RT 0x33 /* d[7] = retrace in progress */ |
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380 |
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381 /* video attributes - these should probably be configurable on the fly |
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382 * so users with different desktop sizes can keep |
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383 * captured data off the desktop |
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384 */ |
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385 #define _VINWID 704 |
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386 #define _VINHGT _VINHGT_NTSC |
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387 #define _VINHGT_NTSC 240 |
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388 #define _VINHGT_PAL 290 |
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389 #define _VIN_WINDOW (704 * 291 * 2) |
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390 #define _VBI_WINDOW (704 * 64 * 2) |
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391 |
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392 #define _VIN_FIELD_EVEN 1 |
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393 #define _VIN_FIELD_ODD 2 |
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394 #define _VIN_FIELD_BOTH 4 |
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395 |
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396 |
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397 /* i2c registers (TW; not on 300/310/325 series) */ |
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398 #define X_INDEXREG 0x14 |
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399 #define X_PORTREG 0x15 |
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400 #define X_DATA 0x0f |
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401 #define I2C_SCL 0x00 |
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402 #define I2C_SDA 0x01 |
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403 #define I2C_DELAY 10 |
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404 |
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405 /* mmio registers for video */ |
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406 #define REG_PRIM_CRT_COUNTER 0x8514 |
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407 |
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408 /* TW: MPEG MMIO registers (630 and later) ----------------------------*/ |
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409 |
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410 /* Not public (yet?) */ |
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411 |
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412 #endif /* VIDIX_SIS_REGS_H */ |