annotate postproc/swscale_template.c @ 14561:a226d301eec1

Handle missing palettes in the info part of VobSubs in Matroska files correctly by giving mplayer a NULL pointer. This way it will use a default palette instead of black only. Patch by Csillag Kristof (fenwick () freemail ! hu)
author mosu
date Fri, 21 Jan 2005 18:25:44 +0000
parents 31cb219364a4
children 1fab95e4513c
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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1 /*
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2 Copyright (C) 2001-2003 Michael Niedermayer <michaelni@gmx.at>
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3
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67c56df76a44 copyright(swscaler) = GPL
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4 This program is free software; you can redistribute it and/or modify
67c56df76a44 copyright(swscaler) = GPL
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5 it under the terms of the GNU General Public License as published by
67c56df76a44 copyright(swscaler) = GPL
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6 the Free Software Foundation; either version 2 of the License, or
67c56df76a44 copyright(swscaler) = GPL
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7 (at your option) any later version.
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8
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67c56df76a44 copyright(swscaler) = GPL
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9 This program is distributed in the hope that it will be useful,
67c56df76a44 copyright(swscaler) = GPL
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10 but WITHOUT ANY WARRANTY; without even the implied warranty of
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11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
67c56df76a44 copyright(swscaler) = GPL
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12 GNU General Public License for more details.
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13
67c56df76a44 copyright(swscaler) = GPL
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14 You should have received a copy of the GNU General Public License
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15 along with this program; if not, write to the Free Software
67c56df76a44 copyright(swscaler) = GPL
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16 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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17 */
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18
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19 #undef REAL_MOVNTQ
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20 #undef MOVNTQ
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21 #undef PAVGB
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22 #undef PREFETCH
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23 #undef PREFETCHW
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24 #undef EMMS
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25 #undef SFENCE
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26
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27 #ifdef HAVE_3DNOW
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28 /* On K6 femms is faster of emms. On K7 femms is directly mapped on emms. */
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29 #define EMMS "femms"
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30 #else
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31 #define EMMS "emms"
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32 #endif
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33
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34 #ifdef HAVE_3DNOW
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35 #define PREFETCH "prefetch"
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36 #define PREFETCHW "prefetchw"
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37 #elif defined ( HAVE_MMX2 )
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38 #define PREFETCH "prefetchnta"
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39 #define PREFETCHW "prefetcht0"
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40 #else
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41 #define PREFETCH "/nop"
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42 #define PREFETCHW "/nop"
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43 #endif
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44
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45 #ifdef HAVE_MMX2
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46 #define SFENCE "sfence"
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47 #else
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48 #define SFENCE "/nop"
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49 #endif
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50
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51 #ifdef HAVE_MMX2
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52 #define PAVGB(a,b) "pavgb " #a ", " #b " \n\t"
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53 #elif defined (HAVE_3DNOW)
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54 #define PAVGB(a,b) "pavgusb " #a ", " #b " \n\t"
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55 #endif
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56
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57 #ifdef HAVE_MMX2
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58 #define REAL_MOVNTQ(a,b) "movntq " #a ", " #b " \n\t"
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59 #else
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60 #define REAL_MOVNTQ(a,b) "movq " #a ", " #b " \n\t"
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61 #endif
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62 #define MOVNTQ(a,b) REAL_MOVNTQ(a,b)
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63
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64 #ifdef HAVE_ALTIVEC
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65 #include "swscale_altivec_template.c"
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66 #endif
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67
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68 #define YSCALEYUV2YV12X(x, offset) \
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69 "xor %%"REG_a", %%"REG_a" \n\t"\
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70 "movq "VROUNDER_OFFSET"(%0), %%mm3\n\t"\
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71 "movq %%mm3, %%mm4 \n\t"\
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72 "lea " offset "(%0), %%"REG_d" \n\t"\
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73 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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74 ".balign 16 \n\t" /* FIXME Unroll? */\
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75 "1: \n\t"\
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76 "movq 8(%%"REG_d"), %%mm0 \n\t" /* filterCoeff */\
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77 "movq " #x "(%%"REG_S", %%"REG_a", 2), %%mm2\n\t" /* srcData */\
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78 "movq 8+" #x "(%%"REG_S", %%"REG_a", 2), %%mm5\n\t" /* srcData */\
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79 "add $16, %%"REG_d" \n\t"\
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80 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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81 "test %%"REG_S", %%"REG_S" \n\t"\
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82 "pmulhw %%mm0, %%mm2 \n\t"\
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83 "pmulhw %%mm0, %%mm5 \n\t"\
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84 "paddw %%mm2, %%mm3 \n\t"\
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85 "paddw %%mm5, %%mm4 \n\t"\
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86 " jnz 1b \n\t"\
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87 "psraw $3, %%mm3 \n\t"\
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88 "psraw $3, %%mm4 \n\t"\
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89 "packuswb %%mm4, %%mm3 \n\t"\
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90 MOVNTQ(%%mm3, (%1, %%REGa))\
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91 "add $8, %%"REG_a" \n\t"\
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92 "cmp %2, %%"REG_a" \n\t"\
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93 "movq "VROUNDER_OFFSET"(%0), %%mm3\n\t"\
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94 "movq %%mm3, %%mm4 \n\t"\
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95 "lea " offset "(%0), %%"REG_d" \n\t"\
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96 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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97 "jb 1b \n\t"
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98
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99 #define YSCALEYUV2YV121 \
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100 "mov %2, %%"REG_a" \n\t"\
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101 ".balign 16 \n\t" /* FIXME Unroll? */\
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102 "1: \n\t"\
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103 "movq (%0, %%"REG_a", 2), %%mm0 \n\t"\
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104 "movq 8(%0, %%"REG_a", 2), %%mm1\n\t"\
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105 "psraw $7, %%mm0 \n\t"\
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106 "psraw $7, %%mm1 \n\t"\
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107 "packuswb %%mm1, %%mm0 \n\t"\
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108 MOVNTQ(%%mm0, (%1, %%REGa))\
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109 "add $8, %%"REG_a" \n\t"\
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110 "jnc 1b \n\t"
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111
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112 /*
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113 :: "m" (-lumFilterSize), "m" (-chrFilterSize),
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114 "m" (lumMmxFilter+lumFilterSize*4), "m" (chrMmxFilter+chrFilterSize*4),
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115 "r" (dest), "m" (dstW),
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116 "m" (lumSrc+lumFilterSize), "m" (chrSrc+chrFilterSize)
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117 : "%eax", "%ebx", "%ecx", "%edx", "%esi"
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118 */
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119 #define YSCALEYUV2PACKEDX \
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120 "xor %%"REG_a", %%"REG_a" \n\t"\
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121 ".balign 16 \n\t"\
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122 "nop \n\t"\
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123 "1: \n\t"\
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124 "lea "CHR_MMX_FILTER_OFFSET"(%0), %%"REG_d"\n\t"\
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125 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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126 "movq "VROUNDER_OFFSET"(%0), %%mm3\n\t"\
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127 "movq %%mm3, %%mm4 \n\t"\
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128 ".balign 16 \n\t"\
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129 "2: \n\t"\
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130 "movq 8(%%"REG_d"), %%mm0 \n\t" /* filterCoeff */\
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131 "movq (%%"REG_S", %%"REG_a"), %%mm2 \n\t" /* UsrcData */\
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132 "movq 4096(%%"REG_S", %%"REG_a"), %%mm5 \n\t" /* VsrcData */\
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133 "add $16, %%"REG_d" \n\t"\
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134 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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135 "pmulhw %%mm0, %%mm2 \n\t"\
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136 "pmulhw %%mm0, %%mm5 \n\t"\
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137 "paddw %%mm2, %%mm3 \n\t"\
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138 "paddw %%mm5, %%mm4 \n\t"\
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139 "test %%"REG_S", %%"REG_S" \n\t"\
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140 " jnz 2b \n\t"\
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141 \
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142 "lea "LUM_MMX_FILTER_OFFSET"(%0), %%"REG_d"\n\t"\
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143 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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144 "movq "VROUNDER_OFFSET"(%0), %%mm1\n\t"\
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145 "movq %%mm1, %%mm7 \n\t"\
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146 ".balign 16 \n\t"\
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147 "2: \n\t"\
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148 "movq 8(%%"REG_d"), %%mm0 \n\t" /* filterCoeff */\
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149 "movq (%%"REG_S", %%"REG_a", 2), %%mm2 \n\t" /* Y1srcData */\
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150 "movq 8(%%"REG_S", %%"REG_a", 2), %%mm5 \n\t" /* Y2srcData */\
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151 "add $16, %%"REG_d" \n\t"\
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152 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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153 "pmulhw %%mm0, %%mm2 \n\t"\
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154 "pmulhw %%mm0, %%mm5 \n\t"\
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155 "paddw %%mm2, %%mm1 \n\t"\
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156 "paddw %%mm5, %%mm7 \n\t"\
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diff changeset
157 "test %%"REG_S", %%"REG_S" \n\t"\
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
158 " jnz 2b \n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
159
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
160
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
161 #define YSCALEYUV2RGBX \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
162 YSCALEYUV2PACKEDX\
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
163 "psubw "U_OFFSET"(%0), %%mm3 \n\t" /* (U-128)8*/\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
164 "psubw "V_OFFSET"(%0), %%mm4 \n\t" /* (V-128)8*/\
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
165 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
166 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
167 "pmulhw "UG_COEFF"(%0), %%mm3 \n\t"\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
168 "pmulhw "VG_COEFF"(%0), %%mm4 \n\t"\
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
169 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
170 "pmulhw "UB_COEFF"(%0), %%mm2 \n\t"\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
171 "pmulhw "VR_COEFF"(%0), %%mm5 \n\t"\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
172 "psubw "Y_OFFSET"(%0), %%mm1 \n\t" /* 8(Y-16)*/\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
173 "psubw "Y_OFFSET"(%0), %%mm7 \n\t" /* 8(Y-16)*/\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
174 "pmulhw "Y_COEFF"(%0), %%mm1 \n\t"\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
175 "pmulhw "Y_COEFF"(%0), %%mm7 \n\t"\
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
176 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
177 "paddw %%mm3, %%mm4 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
178 "movq %%mm2, %%mm0 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
179 "movq %%mm5, %%mm6 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
180 "movq %%mm4, %%mm3 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
181 "punpcklwd %%mm2, %%mm2 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
182 "punpcklwd %%mm5, %%mm5 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
183 "punpcklwd %%mm4, %%mm4 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
184 "paddw %%mm1, %%mm2 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
185 "paddw %%mm1, %%mm5 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
186 "paddw %%mm1, %%mm4 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
187 "punpckhwd %%mm0, %%mm0 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
188 "punpckhwd %%mm6, %%mm6 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
189 "punpckhwd %%mm3, %%mm3 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
190 "paddw %%mm7, %%mm0 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
191 "paddw %%mm7, %%mm6 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
192 "paddw %%mm7, %%mm3 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
193 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
194 "packuswb %%mm0, %%mm2 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
195 "packuswb %%mm6, %%mm5 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
196 "packuswb %%mm3, %%mm4 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
197 "pxor %%mm7, %%mm7 \n\t"
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
198 #if 0
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
199 #define FULL_YSCALEYUV2RGB \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
200 "pxor %%mm7, %%mm7 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
201 "movd %6, %%mm6 \n\t" /*yalpha1*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
202 "punpcklwd %%mm6, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
203 "punpcklwd %%mm6, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
204 "movd %7, %%mm5 \n\t" /*uvalpha1*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
205 "punpcklwd %%mm5, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
206 "punpcklwd %%mm5, %%mm5 \n\t"\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
207 "xor %%"REG_a", %%"REG_a" \n\t"\
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
208 ".balign 16 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
209 "1: \n\t"\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
210 "movq (%0, %%"REG_a", 2), %%mm0 \n\t" /*buf0[eax]*/\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
211 "movq (%1, %%"REG_a", 2), %%mm1 \n\t" /*buf1[eax]*/\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
212 "movq (%2, %%"REG_a",2), %%mm2 \n\t" /* uvbuf0[eax]*/\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
213 "movq (%3, %%"REG_a",2), %%mm3 \n\t" /* uvbuf1[eax]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
214 "psubw %%mm1, %%mm0 \n\t" /* buf0[eax] - buf1[eax]*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
215 "psubw %%mm3, %%mm2 \n\t" /* uvbuf0[eax] - uvbuf1[eax]*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
216 "pmulhw %%mm6, %%mm0 \n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
217 "pmulhw %%mm5, %%mm2 \n\t" /* (uvbuf0[eax] - uvbuf1[eax])uvalpha1>>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
218 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
219 "movq 4096(%2, %%"REG_a",2), %%mm4 \n\t" /* uvbuf0[eax+2048]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
220 "psraw $4, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
221 "paddw %%mm0, %%mm1 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
222 "movq 4096(%3, %%"REG_a",2), %%mm0 \n\t" /* uvbuf1[eax+2048]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
223 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax]uvalpha1 - uvbuf1[eax](1-uvalpha1)*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
224 "psubw %%mm0, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048]*/\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
225 "psubw "MANGLE(w80)", %%mm1 \n\t" /* 8(Y-16)*/\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
226 "psubw "MANGLE(w400)", %%mm3 \n\t" /* 8(U-128)*/\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
227 "pmulhw "MANGLE(yCoeff)", %%mm1 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
228 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
229 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
230 "pmulhw %%mm5, %%mm4 \n\t" /* (uvbuf0[eax+2048] - uvbuf1[eax+2048])uvalpha1>>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
231 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
232 "pmulhw "MANGLE(ubCoeff)", %%mm3\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
233 "psraw $4, %%mm0 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
234 "pmulhw "MANGLE(ugCoeff)", %%mm2\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
235 "paddw %%mm4, %%mm0 \n\t" /* uvbuf0[eax+2048]uvalpha1 - uvbuf1[eax+2048](1-uvalpha1)*/\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
236 "psubw "MANGLE(w400)", %%mm0 \n\t" /* (V-128)8*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
237 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
238 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
239 "movq %%mm0, %%mm4 \n\t" /* (V-128)8*/\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
240 "pmulhw "MANGLE(vrCoeff)", %%mm0\n\t"\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
241 "pmulhw "MANGLE(vgCoeff)", %%mm4\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
242 "paddw %%mm1, %%mm3 \n\t" /* B*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
243 "paddw %%mm1, %%mm0 \n\t" /* R*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
244 "packuswb %%mm3, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
245 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
246 "packuswb %%mm0, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
247 "paddw %%mm4, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
248 "paddw %%mm2, %%mm1 \n\t" /* G*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
249 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
250 "packuswb %%mm1, %%mm1 \n\t"
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
251 #endif
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
252
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
253 #define REAL_YSCALEYUV2PACKED(index, c) \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
254 "movq "CHR_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
255 "movq "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm1\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
256 "psraw $3, %%mm0 \n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
257 "psraw $3, %%mm1 \n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
258 "movq %%mm0, "CHR_MMX_FILTER_OFFSET"+8("#c")\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
259 "movq %%mm1, "LUM_MMX_FILTER_OFFSET"+8("#c")\n\t"\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
260 "xor "#index", "#index" \n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
261 ".balign 16 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
262 "1: \n\t"\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
263 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
264 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
265 "movq 4096(%2, "#index"), %%mm5 \n\t" /* uvbuf0[eax+2048]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
266 "movq 4096(%3, "#index"), %%mm4 \n\t" /* uvbuf1[eax+2048]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
267 "psubw %%mm3, %%mm2 \n\t" /* uvbuf0[eax] - uvbuf1[eax]*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
268 "psubw %%mm4, %%mm5 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048]*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
269 "movq "CHR_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
270 "pmulhw %%mm0, %%mm2 \n\t" /* (uvbuf0[eax] - uvbuf1[eax])uvalpha1>>16*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
271 "pmulhw %%mm0, %%mm5 \n\t" /* (uvbuf0[eax+2048] - uvbuf1[eax+2048])uvalpha1>>16*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
272 "psraw $7, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
273 "psraw $7, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
274 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax]uvalpha1 - uvbuf1[eax](1-uvalpha1)*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
275 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048]uvalpha1 - uvbuf1[eax+2048](1-uvalpha1)*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
276 "movq (%0, "#index", 2), %%mm0 \n\t" /*buf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
277 "movq (%1, "#index", 2), %%mm1 \n\t" /*buf1[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
278 "movq 8(%0, "#index", 2), %%mm6 \n\t" /*buf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
279 "movq 8(%1, "#index", 2), %%mm7 \n\t" /*buf1[eax]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
280 "psubw %%mm1, %%mm0 \n\t" /* buf0[eax] - buf1[eax]*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
281 "psubw %%mm7, %%mm6 \n\t" /* buf0[eax] - buf1[eax]*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
282 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
283 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm6\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
284 "psraw $7, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
285 "psraw $7, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
286 "paddw %%mm0, %%mm1 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
287 "paddw %%mm6, %%mm7 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
288
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
289 #define YSCALEYUV2PACKED(index, c) REAL_YSCALEYUV2PACKED(index, c)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
290
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
291 #define REAL_YSCALEYUV2RGB(index, c) \
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
292 "xor "#index", "#index" \n\t"\
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
293 ".balign 16 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
294 "1: \n\t"\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
295 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
296 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
297 "movq 4096(%2, "#index"), %%mm5\n\t" /* uvbuf0[eax+2048]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
298 "movq 4096(%3, "#index"), %%mm4\n\t" /* uvbuf1[eax+2048]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
299 "psubw %%mm3, %%mm2 \n\t" /* uvbuf0[eax] - uvbuf1[eax]*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
300 "psubw %%mm4, %%mm5 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048]*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
301 "movq "CHR_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
302 "pmulhw %%mm0, %%mm2 \n\t" /* (uvbuf0[eax] - uvbuf1[eax])uvalpha1>>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
303 "pmulhw %%mm0, %%mm5 \n\t" /* (uvbuf0[eax+2048] - uvbuf1[eax+2048])uvalpha1>>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
304 "psraw $4, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
305 "psraw $4, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
306 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax]uvalpha1 - uvbuf1[eax](1-uvalpha1)*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
307 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048]uvalpha1 - uvbuf1[eax+2048](1-uvalpha1)*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
308 "psubw "U_OFFSET"("#c"), %%mm3 \n\t" /* (U-128)8*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
309 "psubw "V_OFFSET"("#c"), %%mm4 \n\t" /* (V-128)8*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
310 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
311 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
312 "pmulhw "UG_COEFF"("#c"), %%mm3\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
313 "pmulhw "VG_COEFF"("#c"), %%mm4\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
314 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
315 "movq (%0, "#index", 2), %%mm0 \n\t" /*buf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
316 "movq (%1, "#index", 2), %%mm1 \n\t" /*buf1[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
317 "movq 8(%0, "#index", 2), %%mm6\n\t" /*buf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
318 "movq 8(%1, "#index", 2), %%mm7\n\t" /*buf1[eax]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
319 "psubw %%mm1, %%mm0 \n\t" /* buf0[eax] - buf1[eax]*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
320 "psubw %%mm7, %%mm6 \n\t" /* buf0[eax] - buf1[eax]*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
321 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
322 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm6\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
323 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
324 "psraw $4, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
325 "paddw %%mm0, %%mm1 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
326 "paddw %%mm6, %%mm7 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
327 "pmulhw "UB_COEFF"("#c"), %%mm2\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
328 "pmulhw "VR_COEFF"("#c"), %%mm5\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
329 "psubw "Y_OFFSET"("#c"), %%mm1 \n\t" /* 8(Y-16)*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
330 "psubw "Y_OFFSET"("#c"), %%mm7 \n\t" /* 8(Y-16)*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
331 "pmulhw "Y_COEFF"("#c"), %%mm1 \n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
332 "pmulhw "Y_COEFF"("#c"), %%mm7 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
333 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
334 "paddw %%mm3, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
335 "movq %%mm2, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
336 "movq %%mm5, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
337 "movq %%mm4, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
338 "punpcklwd %%mm2, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
339 "punpcklwd %%mm5, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
340 "punpcklwd %%mm4, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
341 "paddw %%mm1, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
342 "paddw %%mm1, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
343 "paddw %%mm1, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
344 "punpckhwd %%mm0, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
345 "punpckhwd %%mm6, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
346 "punpckhwd %%mm3, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
347 "paddw %%mm7, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
348 "paddw %%mm7, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
349 "paddw %%mm7, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
350 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
351 "packuswb %%mm0, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
352 "packuswb %%mm6, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
353 "packuswb %%mm3, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
354 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
355 #define YSCALEYUV2RGB(index, c) REAL_YSCALEYUV2RGB(index, c)
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
356
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
357 #define REAL_YSCALEYUV2PACKED1(index, c) \
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
358 "xor "#index", "#index" \n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
359 ".balign 16 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
360 "1: \n\t"\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
361 "movq (%2, "#index"), %%mm3 \n\t" /* uvbuf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
362 "movq 4096(%2, "#index"), %%mm4 \n\t" /* uvbuf0[eax+2048]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
363 "psraw $7, %%mm3 \n\t" \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
364 "psraw $7, %%mm4 \n\t" \
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
365 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
366 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
367 "psraw $7, %%mm1 \n\t" \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
368 "psraw $7, %%mm7 \n\t" \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
369
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
370 #define YSCALEYUV2PACKED1(index, c) REAL_YSCALEYUV2PACKED1(index, c)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
371
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
372 #define REAL_YSCALEYUV2RGB1(index, c) \
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
373 "xor "#index", "#index" \n\t"\
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
374 ".balign 16 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
375 "1: \n\t"\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
376 "movq (%2, "#index"), %%mm3 \n\t" /* uvbuf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
377 "movq 4096(%2, "#index"), %%mm4 \n\t" /* uvbuf0[eax+2048]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
378 "psraw $4, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
379 "psraw $4, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
380 "psubw "U_OFFSET"("#c"), %%mm3 \n\t" /* (U-128)8*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
381 "psubw "V_OFFSET"("#c"), %%mm4 \n\t" /* (V-128)8*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
382 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
383 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
384 "pmulhw "UG_COEFF"("#c"), %%mm3\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
385 "pmulhw "VG_COEFF"("#c"), %%mm4\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
386 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
387 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
388 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
389 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
390 "psraw $4, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
391 "pmulhw "UB_COEFF"("#c"), %%mm2\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
392 "pmulhw "VR_COEFF"("#c"), %%mm5\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
393 "psubw "Y_OFFSET"("#c"), %%mm1 \n\t" /* 8(Y-16)*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
394 "psubw "Y_OFFSET"("#c"), %%mm7 \n\t" /* 8(Y-16)*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
395 "pmulhw "Y_COEFF"("#c"), %%mm1 \n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
396 "pmulhw "Y_COEFF"("#c"), %%mm7 \n\t"\
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
397 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
398 "paddw %%mm3, %%mm4 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
399 "movq %%mm2, %%mm0 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
400 "movq %%mm5, %%mm6 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
401 "movq %%mm4, %%mm3 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
402 "punpcklwd %%mm2, %%mm2 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
403 "punpcklwd %%mm5, %%mm5 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
404 "punpcklwd %%mm4, %%mm4 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
405 "paddw %%mm1, %%mm2 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
406 "paddw %%mm1, %%mm5 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
407 "paddw %%mm1, %%mm4 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
408 "punpckhwd %%mm0, %%mm0 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
409 "punpckhwd %%mm6, %%mm6 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
410 "punpckhwd %%mm3, %%mm3 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
411 "paddw %%mm7, %%mm0 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
412 "paddw %%mm7, %%mm6 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
413 "paddw %%mm7, %%mm3 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
414 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
415 "packuswb %%mm0, %%mm2 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
416 "packuswb %%mm6, %%mm5 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
417 "packuswb %%mm3, %%mm4 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
418 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
419 #define YSCALEYUV2RGB1(index, c) REAL_YSCALEYUV2RGB1(index, c)
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
420
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
421 #define REAL_YSCALEYUV2PACKED1b(index, c) \
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
422 "xor "#index", "#index" \n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
423 ".balign 16 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
424 "1: \n\t"\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
425 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
426 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
427 "movq 4096(%2, "#index"), %%mm5 \n\t" /* uvbuf0[eax+2048]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
428 "movq 4096(%3, "#index"), %%mm4 \n\t" /* uvbuf1[eax+2048]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
429 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax] + uvbuf1[eax]*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
430 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048] + uvbuf1[eax+2048]*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
431 "psrlw $8, %%mm3 \n\t" \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
432 "psrlw $8, %%mm4 \n\t" \
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
433 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
434 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
435 "psraw $7, %%mm1 \n\t" \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
436 "psraw $7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
437 #define YSCALEYUV2PACKED1b(index, c) REAL_YSCALEYUV2PACKED1b(index, c)
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
438
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
439 // do vertical chrominance interpolation
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
440 #define REAL_YSCALEYUV2RGB1b(index, c) \
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
441 "xor "#index", "#index" \n\t"\
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
442 ".balign 16 \n\t"\
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
443 "1: \n\t"\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
444 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
445 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
446 "movq 4096(%2, "#index"), %%mm5 \n\t" /* uvbuf0[eax+2048]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
447 "movq 4096(%3, "#index"), %%mm4 \n\t" /* uvbuf1[eax+2048]*/\
2576
437ed06579d8 c optimizations
michael
parents: 2575
diff changeset
448 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax] + uvbuf1[eax]*/\
437ed06579d8 c optimizations
michael
parents: 2575
diff changeset
449 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048] + uvbuf1[eax+2048]*/\
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
450 "psrlw $5, %%mm3 \n\t" /*FIXME might overflow*/\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
451 "psrlw $5, %%mm4 \n\t" /*FIXME might overflow*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
452 "psubw "U_OFFSET"("#c"), %%mm3 \n\t" /* (U-128)8*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
453 "psubw "V_OFFSET"("#c"), %%mm4 \n\t" /* (V-128)8*/\
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
454 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
455 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
456 "pmulhw "UG_COEFF"("#c"), %%mm3\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
457 "pmulhw "VG_COEFF"("#c"), %%mm4\n\t"\
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
458 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
459 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
460 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
461 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
462 "psraw $4, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
463 "pmulhw "UB_COEFF"("#c"), %%mm2\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
464 "pmulhw "VR_COEFF"("#c"), %%mm5\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
465 "psubw "Y_OFFSET"("#c"), %%mm1 \n\t" /* 8(Y-16)*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
466 "psubw "Y_OFFSET"("#c"), %%mm7 \n\t" /* 8(Y-16)*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
467 "pmulhw "Y_COEFF"("#c"), %%mm1 \n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
468 "pmulhw "Y_COEFF"("#c"), %%mm7 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
469 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
470 "paddw %%mm3, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
471 "movq %%mm2, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
472 "movq %%mm5, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
473 "movq %%mm4, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
474 "punpcklwd %%mm2, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
475 "punpcklwd %%mm5, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
476 "punpcklwd %%mm4, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
477 "paddw %%mm1, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
478 "paddw %%mm1, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
479 "paddw %%mm1, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
480 "punpckhwd %%mm0, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
481 "punpckhwd %%mm6, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
482 "punpckhwd %%mm3, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
483 "paddw %%mm7, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
484 "paddw %%mm7, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
485 "paddw %%mm7, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
486 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
487 "packuswb %%mm0, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
488 "packuswb %%mm6, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
489 "packuswb %%mm3, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
490 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
491 #define YSCALEYUV2RGB1b(index, c) REAL_YSCALEYUV2RGB1b(index, c)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
492
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
493 #define REAL_WRITEBGR32(dst, dstw, index) \
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
494 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
495 "movq %%mm2, %%mm1 \n\t" /* B */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
496 "movq %%mm5, %%mm6 \n\t" /* R */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
497 "punpcklbw %%mm4, %%mm2 \n\t" /* GBGBGBGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
498 "punpcklbw %%mm7, %%mm5 \n\t" /* 0R0R0R0R 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
499 "punpckhbw %%mm4, %%mm1 \n\t" /* GBGBGBGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
500 "punpckhbw %%mm7, %%mm6 \n\t" /* 0R0R0R0R 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
501 "movq %%mm2, %%mm0 \n\t" /* GBGBGBGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
502 "movq %%mm1, %%mm3 \n\t" /* GBGBGBGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
503 "punpcklwd %%mm5, %%mm0 \n\t" /* 0RGB0RGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
504 "punpckhwd %%mm5, %%mm2 \n\t" /* 0RGB0RGB 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
505 "punpcklwd %%mm6, %%mm1 \n\t" /* 0RGB0RGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
506 "punpckhwd %%mm6, %%mm3 \n\t" /* 0RGB0RGB 3 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
507 \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
508 MOVNTQ(%%mm0, (dst, index, 4))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
509 MOVNTQ(%%mm2, 8(dst, index, 4))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
510 MOVNTQ(%%mm1, 16(dst, index, 4))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
511 MOVNTQ(%%mm3, 24(dst, index, 4))\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
512 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
513 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
514 "cmp "#dstw", "#index" \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
515 " jb 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
516 #define WRITEBGR32(dst, dstw, index) REAL_WRITEBGR32(dst, dstw, index)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
517
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
518 #define REAL_WRITEBGR16(dst, dstw, index) \
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
519 "pand "MANGLE(bF8)", %%mm2 \n\t" /* B */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
520 "pand "MANGLE(bFC)", %%mm4 \n\t" /* G */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
521 "pand "MANGLE(bF8)", %%mm5 \n\t" /* R */\
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
522 "psrlq $3, %%mm2 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
523 \
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
524 "movq %%mm2, %%mm1 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
525 "movq %%mm4, %%mm3 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
526 \
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
527 "punpcklbw %%mm7, %%mm3 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
528 "punpcklbw %%mm5, %%mm2 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
529 "punpckhbw %%mm7, %%mm4 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
530 "punpckhbw %%mm5, %%mm1 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
531 \
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
532 "psllq $3, %%mm3 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
533 "psllq $3, %%mm4 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
534 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
535 "por %%mm3, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
536 "por %%mm4, %%mm1 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
537 \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
538 MOVNTQ(%%mm2, (dst, index, 2))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
539 MOVNTQ(%%mm1, 8(dst, index, 2))\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
540 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
541 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
542 "cmp "#dstw", "#index" \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
543 " jb 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
544 #define WRITEBGR16(dst, dstw, index) REAL_WRITEBGR16(dst, dstw, index)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
545
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
546 #define REAL_WRITEBGR15(dst, dstw, index) \
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
547 "pand "MANGLE(bF8)", %%mm2 \n\t" /* B */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
548 "pand "MANGLE(bF8)", %%mm4 \n\t" /* G */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
549 "pand "MANGLE(bF8)", %%mm5 \n\t" /* R */\
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
550 "psrlq $3, %%mm2 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
551 "psrlq $1, %%mm5 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
552 \
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
553 "movq %%mm2, %%mm1 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
554 "movq %%mm4, %%mm3 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
555 \
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
556 "punpcklbw %%mm7, %%mm3 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
557 "punpcklbw %%mm5, %%mm2 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
558 "punpckhbw %%mm7, %%mm4 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
559 "punpckhbw %%mm5, %%mm1 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
560 \
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
561 "psllq $2, %%mm3 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
562 "psllq $2, %%mm4 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
563 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
564 "por %%mm3, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
565 "por %%mm4, %%mm1 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
566 \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
567 MOVNTQ(%%mm2, (dst, index, 2))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
568 MOVNTQ(%%mm1, 8(dst, index, 2))\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
569 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
570 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
571 "cmp "#dstw", "#index" \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
572 " jb 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
573 #define WRITEBGR15(dst, dstw, index) REAL_WRITEBGR15(dst, dstw, index)
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
574
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
575 #define WRITEBGR24OLD(dst, dstw, index) \
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
576 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
577 "movq %%mm2, %%mm1 \n\t" /* B */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
578 "movq %%mm5, %%mm6 \n\t" /* R */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
579 "punpcklbw %%mm4, %%mm2 \n\t" /* GBGBGBGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
580 "punpcklbw %%mm7, %%mm5 \n\t" /* 0R0R0R0R 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
581 "punpckhbw %%mm4, %%mm1 \n\t" /* GBGBGBGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
582 "punpckhbw %%mm7, %%mm6 \n\t" /* 0R0R0R0R 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
583 "movq %%mm2, %%mm0 \n\t" /* GBGBGBGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
584 "movq %%mm1, %%mm3 \n\t" /* GBGBGBGB 2 */\
2326
7d3542955132 BGR24 bugfix
michael
parents: 2316
diff changeset
585 "punpcklwd %%mm5, %%mm0 \n\t" /* 0RGB0RGB 0 */\
7d3542955132 BGR24 bugfix
michael
parents: 2316
diff changeset
586 "punpckhwd %%mm5, %%mm2 \n\t" /* 0RGB0RGB 1 */\
7d3542955132 BGR24 bugfix
michael
parents: 2316
diff changeset
587 "punpcklwd %%mm6, %%mm1 \n\t" /* 0RGB0RGB 2 */\
7d3542955132 BGR24 bugfix
michael
parents: 2316
diff changeset
588 "punpckhwd %%mm6, %%mm3 \n\t" /* 0RGB0RGB 3 */\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
589 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
590 "movq %%mm0, %%mm4 \n\t" /* 0RGB0RGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
591 "psrlq $8, %%mm0 \n\t" /* 00RGB0RG 0 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
592 "pand "MANGLE(bm00000111)", %%mm4\n\t" /* 00000RGB 0 */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
593 "pand "MANGLE(bm11111000)", %%mm0\n\t" /* 00RGB000 0.5 */\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
594 "por %%mm4, %%mm0 \n\t" /* 00RGBRGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
595 "movq %%mm2, %%mm4 \n\t" /* 0RGB0RGB 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
596 "psllq $48, %%mm2 \n\t" /* GB000000 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
597 "por %%mm2, %%mm0 \n\t" /* GBRGBRGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
598 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
599 "movq %%mm4, %%mm2 \n\t" /* 0RGB0RGB 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
600 "psrld $16, %%mm4 \n\t" /* 000R000R 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
601 "psrlq $24, %%mm2 \n\t" /* 0000RGB0 1.5 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
602 "por %%mm4, %%mm2 \n\t" /* 000RRGBR 1 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
603 "pand "MANGLE(bm00001111)", %%mm2\n\t" /* 0000RGBR 1 */\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
604 "movq %%mm1, %%mm4 \n\t" /* 0RGB0RGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
605 "psrlq $8, %%mm1 \n\t" /* 00RGB0RG 2 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
606 "pand "MANGLE(bm00000111)", %%mm4\n\t" /* 00000RGB 2 */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
607 "pand "MANGLE(bm11111000)", %%mm1\n\t" /* 00RGB000 2.5 */\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
608 "por %%mm4, %%mm1 \n\t" /* 00RGBRGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
609 "movq %%mm1, %%mm4 \n\t" /* 00RGBRGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
610 "psllq $32, %%mm1 \n\t" /* BRGB0000 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
611 "por %%mm1, %%mm2 \n\t" /* BRGBRGBR 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
612 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
613 "psrlq $32, %%mm4 \n\t" /* 000000RG 2.5 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
614 "movq %%mm3, %%mm5 \n\t" /* 0RGB0RGB 3 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
615 "psrlq $8, %%mm3 \n\t" /* 00RGB0RG 3 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
616 "pand "MANGLE(bm00000111)", %%mm5\n\t" /* 00000RGB 3 */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
617 "pand "MANGLE(bm11111000)", %%mm3\n\t" /* 00RGB000 3.5 */\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
618 "por %%mm5, %%mm3 \n\t" /* 00RGBRGB 3 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
619 "psllq $16, %%mm3 \n\t" /* RGBRGB00 3 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
620 "por %%mm4, %%mm3 \n\t" /* RGBRGBRG 2.5 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
621 \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
622 MOVNTQ(%%mm0, (dst))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
623 MOVNTQ(%%mm2, 8(dst))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
624 MOVNTQ(%%mm3, 16(dst))\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
625 "add $24, "#dst" \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
626 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
627 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
628 "cmp "#dstw", "#index" \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
629 " jb 1b \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
630
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
631 #define WRITEBGR24MMX(dst, dstw, index) \
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
632 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
633 "movq %%mm2, %%mm1 \n\t" /* B */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
634 "movq %%mm5, %%mm6 \n\t" /* R */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
635 "punpcklbw %%mm4, %%mm2 \n\t" /* GBGBGBGB 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
636 "punpcklbw %%mm7, %%mm5 \n\t" /* 0R0R0R0R 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
637 "punpckhbw %%mm4, %%mm1 \n\t" /* GBGBGBGB 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
638 "punpckhbw %%mm7, %%mm6 \n\t" /* 0R0R0R0R 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
639 "movq %%mm2, %%mm0 \n\t" /* GBGBGBGB 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
640 "movq %%mm1, %%mm3 \n\t" /* GBGBGBGB 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
641 "punpcklwd %%mm5, %%mm0 \n\t" /* 0RGB0RGB 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
642 "punpckhwd %%mm5, %%mm2 \n\t" /* 0RGB0RGB 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
643 "punpcklwd %%mm6, %%mm1 \n\t" /* 0RGB0RGB 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
644 "punpckhwd %%mm6, %%mm3 \n\t" /* 0RGB0RGB 3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
645 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
646 "movq %%mm0, %%mm4 \n\t" /* 0RGB0RGB 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
647 "movq %%mm2, %%mm6 \n\t" /* 0RGB0RGB 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
648 "movq %%mm1, %%mm5 \n\t" /* 0RGB0RGB 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
649 "movq %%mm3, %%mm7 \n\t" /* 0RGB0RGB 3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
650 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
651 "psllq $40, %%mm0 \n\t" /* RGB00000 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
652 "psllq $40, %%mm2 \n\t" /* RGB00000 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
653 "psllq $40, %%mm1 \n\t" /* RGB00000 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
654 "psllq $40, %%mm3 \n\t" /* RGB00000 3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
655 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
656 "punpckhdq %%mm4, %%mm0 \n\t" /* 0RGBRGB0 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
657 "punpckhdq %%mm6, %%mm2 \n\t" /* 0RGBRGB0 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
658 "punpckhdq %%mm5, %%mm1 \n\t" /* 0RGBRGB0 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
659 "punpckhdq %%mm7, %%mm3 \n\t" /* 0RGBRGB0 3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
660 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
661 "psrlq $8, %%mm0 \n\t" /* 00RGBRGB 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
662 "movq %%mm2, %%mm6 \n\t" /* 0RGBRGB0 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
663 "psllq $40, %%mm2 \n\t" /* GB000000 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
664 "por %%mm2, %%mm0 \n\t" /* GBRGBRGB 0 */\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
665 MOVNTQ(%%mm0, (dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
666 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
667 "psrlq $24, %%mm6 \n\t" /* 0000RGBR 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
668 "movq %%mm1, %%mm5 \n\t" /* 0RGBRGB0 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
669 "psllq $24, %%mm1 \n\t" /* BRGB0000 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
670 "por %%mm1, %%mm6 \n\t" /* BRGBRGBR 1 */\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
671 MOVNTQ(%%mm6, 8(dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
672 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
673 "psrlq $40, %%mm5 \n\t" /* 000000RG 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
674 "psllq $8, %%mm3 \n\t" /* RGBRGB00 3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
675 "por %%mm3, %%mm5 \n\t" /* RGBRGBRG 2 */\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
676 MOVNTQ(%%mm5, 16(dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
677 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
678 "add $24, "#dst" \n\t"\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
679 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
680 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
681 "cmp "#dstw", "#index" \n\t"\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
682 " jb 1b \n\t"
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
683
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
684 #define WRITEBGR24MMX2(dst, dstw, index) \
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
685 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
686 "movq "MANGLE(M24A)", %%mm0 \n\t"\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
687 "movq "MANGLE(M24C)", %%mm7 \n\t"\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
688 "pshufw $0x50, %%mm2, %%mm1 \n\t" /* B3 B2 B3 B2 B1 B0 B1 B0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
689 "pshufw $0x50, %%mm4, %%mm3 \n\t" /* G3 G2 G3 G2 G1 G0 G1 G0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
690 "pshufw $0x00, %%mm5, %%mm6 \n\t" /* R1 R0 R1 R0 R1 R0 R1 R0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
691 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
692 "pand %%mm0, %%mm1 \n\t" /* B2 B1 B0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
693 "pand %%mm0, %%mm3 \n\t" /* G2 G1 G0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
694 "pand %%mm7, %%mm6 \n\t" /* R1 R0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
695 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
696 "psllq $8, %%mm3 \n\t" /* G2 G1 G0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
697 "por %%mm1, %%mm6 \n\t"\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
698 "por %%mm3, %%mm6 \n\t"\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
699 MOVNTQ(%%mm6, (dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
700 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
701 "psrlq $8, %%mm4 \n\t" /* 00 G7 G6 G5 G4 G3 G2 G1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
702 "pshufw $0xA5, %%mm2, %%mm1 \n\t" /* B5 B4 B5 B4 B3 B2 B3 B2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
703 "pshufw $0x55, %%mm4, %%mm3 \n\t" /* G4 G3 G4 G3 G4 G3 G4 G3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
704 "pshufw $0xA5, %%mm5, %%mm6 \n\t" /* R5 R4 R5 R4 R3 R2 R3 R2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
705 \
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
706 "pand "MANGLE(M24B)", %%mm1 \n\t" /* B5 B4 B3 */\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
707 "pand %%mm7, %%mm3 \n\t" /* G4 G3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
708 "pand %%mm0, %%mm6 \n\t" /* R4 R3 R2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
709 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
710 "por %%mm1, %%mm3 \n\t" /* B5 G4 B4 G3 B3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
711 "por %%mm3, %%mm6 \n\t"\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
712 MOVNTQ(%%mm6, 8(dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
713 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
714 "pshufw $0xFF, %%mm2, %%mm1 \n\t" /* B7 B6 B7 B6 B7 B6 B6 B7 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
715 "pshufw $0xFA, %%mm4, %%mm3 \n\t" /* 00 G7 00 G7 G6 G5 G6 G5 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
716 "pshufw $0xFA, %%mm5, %%mm6 \n\t" /* R7 R6 R7 R6 R5 R4 R5 R4 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
717 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
718 "pand %%mm7, %%mm1 \n\t" /* B7 B6 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
719 "pand %%mm0, %%mm3 \n\t" /* G7 G6 G5 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
720 "pand "MANGLE(M24B)", %%mm6 \n\t" /* R7 R6 R5 */\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
721 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
722 "por %%mm1, %%mm3 \n\t"\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
723 "por %%mm3, %%mm6 \n\t"\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
724 MOVNTQ(%%mm6, 16(dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
725 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
726 "add $24, "#dst" \n\t"\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
727 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
728 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
729 "cmp "#dstw", "#index" \n\t"\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
730 " jb 1b \n\t"
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
731
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
732 #ifdef HAVE_MMX2
3126
e71ae0213431 runtime cpu detection
michael
parents: 2800
diff changeset
733 #undef WRITEBGR24
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
734 #define WRITEBGR24(dst, dstw, index) WRITEBGR24MMX2(dst, dstw, index)
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
735 #else
3126
e71ae0213431 runtime cpu detection
michael
parents: 2800
diff changeset
736 #undef WRITEBGR24
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
737 #define WRITEBGR24(dst, dstw, index) WRITEBGR24MMX(dst, dstw, index)
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
738 #endif
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
739
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
740 #define REAL_WRITEYUY2(dst, dstw, index) \
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
741 "packuswb %%mm3, %%mm3 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
742 "packuswb %%mm4, %%mm4 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
743 "packuswb %%mm7, %%mm1 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
744 "punpcklbw %%mm4, %%mm3 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
745 "movq %%mm1, %%mm7 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
746 "punpcklbw %%mm3, %%mm1 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
747 "punpckhbw %%mm3, %%mm7 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
748 \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
749 MOVNTQ(%%mm1, (dst, index, 2))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
750 MOVNTQ(%%mm7, 8(dst, index, 2))\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
751 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
752 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
753 "cmp "#dstw", "#index" \n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
754 " jb 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
755 #define WRITEYUY2(dst, dstw, index) REAL_WRITEYUY2(dst, dstw, index)
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
756
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
757
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
758 static inline void RENAME(yuv2yuvX)(SwsContext *c, int16_t *lumFilter, int16_t **lumSrc, int lumFilterSize,
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
759 int16_t *chrFilter, int16_t **chrSrc, int chrFilterSize,
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
760 uint8_t *dest, uint8_t *uDest, uint8_t *vDest, int dstW, int chrDstW)
2519
6f3fa9bc3b27 yv12 to yv12 scaler
michael
parents: 2503
diff changeset
761 {
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
762 #ifdef HAVE_MMX
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
763 if(uDest != NULL)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
764 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
765 asm volatile(
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
766 YSCALEYUV2YV12X(0, CHR_MMX_FILTER_OFFSET)
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
767 :: "r" (&c->redDither),
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
768 "r" (uDest), "m" ((long)chrDstW)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
769 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
770 );
2519
6f3fa9bc3b27 yv12 to yv12 scaler
michael
parents: 2503
diff changeset
771
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
772 asm volatile(
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
773 YSCALEYUV2YV12X(4096, CHR_MMX_FILTER_OFFSET)
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
774 :: "r" (&c->redDither),
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
775 "r" (vDest), "m" ((long)chrDstW)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
776 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
777 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
778 }
2521
b70a77066611 tell the c compiler that the memory changed
michael
parents: 2520
diff changeset
779
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
780 asm volatile(
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
781 YSCALEYUV2YV12X(0, LUM_MMX_FILTER_OFFSET)
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
782 :: "r" (&c->redDither),
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
783 "r" (dest), "m" ((long)dstW)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
784 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
785 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
786 #else
12017
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
787 #ifdef HAVE_ALTIVEC
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
788 yuv2yuvX_altivec_real(lumFilter, lumSrc, lumFilterSize,
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
789 chrFilter, chrSrc, chrFilterSize,
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
790 dest, uDest, vDest, dstW, chrDstW);
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
791 #else //HAVE_ALTIVEC
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
792 yuv2yuvXinC(lumFilter, lumSrc, lumFilterSize,
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
793 chrFilter, chrSrc, chrFilterSize,
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
794 dest, uDest, vDest, dstW, chrDstW);
12017
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
795 #endif //!HAVE_ALTIVEC
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
796 #endif
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
797 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
798
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
799 static inline void RENAME(yuv2yuv1)(int16_t *lumSrc, int16_t *chrSrc,
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
800 uint8_t *dest, uint8_t *uDest, uint8_t *vDest, int dstW, int chrDstW)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
801 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
802 #ifdef HAVE_MMX
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
803 if(uDest != NULL)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
804 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
805 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
806 YSCALEYUV2YV121
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
807 :: "r" (chrSrc + chrDstW), "r" (uDest + chrDstW),
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
808 "g" ((long)-chrDstW)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
809 : "%"REG_a
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
810 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
811
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
812 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
813 YSCALEYUV2YV121
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
814 :: "r" (chrSrc + 2048 + chrDstW), "r" (vDest + chrDstW),
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
815 "g" ((long)-chrDstW)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
816 : "%"REG_a
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
817 );
2519
6f3fa9bc3b27 yv12 to yv12 scaler
michael
parents: 2503
diff changeset
818 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
819
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
820 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
821 YSCALEYUV2YV121
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
822 :: "r" (lumSrc + dstW), "r" (dest + dstW),
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
823 "g" ((long)-dstW)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
824 : "%"REG_a
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
825 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
826 #else
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
827 int i;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
828 for(i=0; i<dstW; i++)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
829 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
830 int val= lumSrc[i]>>7;
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
831
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
832 if(val&256){
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
833 if(val<0) val=0;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
834 else val=255;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
835 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
836
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
837 dest[i]= val;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
838 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
839
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
840 if(uDest != NULL)
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
841 for(i=0; i<chrDstW; i++)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
842 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
843 int u=chrSrc[i]>>7;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
844 int v=chrSrc[i + 2048]>>7;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
845
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
846 if((u|v)&256){
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
847 if(u<0) u=0;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
848 else if (u>255) u=255;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
849 if(v<0) v=0;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
850 else if (v>255) v=255;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
851 }
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
852
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
853 uDest[i]= u;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
854 vDest[i]= v;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
855 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
856 #endif
2519
6f3fa9bc3b27 yv12 to yv12 scaler
michael
parents: 2503
diff changeset
857 }
6f3fa9bc3b27 yv12 to yv12 scaler
michael
parents: 2503
diff changeset
858
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
859
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
860 /**
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
861 * vertical scale YV12 to RGB
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
862 */
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
863 static inline void RENAME(yuv2packedX)(SwsContext *c, int16_t *lumFilter, int16_t **lumSrc, int lumFilterSize,
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
864 int16_t *chrFilter, int16_t **chrSrc, int chrFilterSize,
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
865 uint8_t *dest, int dstW, int dstY)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
866 {
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
867 int dummy=0;
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
868 switch(c->dstFormat)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
869 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
870 #ifdef HAVE_MMX
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
871 case IMGFMT_BGR32:
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
872 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
873 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
874 YSCALEYUV2RGBX
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
875 WRITEBGR32(%4, %5, %%REGa)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
876
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
877 :: "r" (&c->redDither),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
878 "m" (dummy), "m" (dummy), "m" (dummy),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
879 "r" (dest), "m" (dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
880 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
881 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
882 }
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
883 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
884 case IMGFMT_BGR24:
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
885 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
886 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
887 YSCALEYUV2RGBX
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
888 "lea (%%"REG_a", %%"REG_a", 2), %%"REG_b"\n\t" //FIXME optimize
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
889 "add %4, %%"REG_b" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
890 WRITEBGR24(%%REGb, %5, %%REGa)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
891
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
892 :: "r" (&c->redDither),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
893 "m" (dummy), "m" (dummy), "m" (dummy),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
894 "r" (dest), "m" (dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
895 : "%"REG_a, "%"REG_b, "%"REG_d, "%"REG_S //FIXME ebx
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
896 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
897 }
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
898 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
899 case IMGFMT_BGR15:
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
900 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
901 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
902 YSCALEYUV2RGBX
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
903 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
904 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
905 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
906 "paddusb "MANGLE(g5Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
907 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
908 #endif
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
909
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
910 WRITEBGR15(%4, %5, %%REGa)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
911
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
912 :: "r" (&c->redDither),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
913 "m" (dummy), "m" (dummy), "m" (dummy),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
914 "r" (dest), "m" (dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
915 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
916 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
917 }
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
918 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
919 case IMGFMT_BGR16:
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
920 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
921 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
922 YSCALEYUV2RGBX
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
923 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
924 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
925 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
926 "paddusb "MANGLE(g6Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
927 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
928 #endif
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
929
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
930 WRITEBGR16(%4, %5, %%REGa)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
931
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
932 :: "r" (&c->redDither),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
933 "m" (dummy), "m" (dummy), "m" (dummy),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
934 "r" (dest), "m" (dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
935 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
936 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
937 }
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
938 break;
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
939 case IMGFMT_YUY2:
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
940 {
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
941 asm volatile(
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
942 YSCALEYUV2PACKEDX
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
943 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
944
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
945 "psraw $3, %%mm3 \n\t"
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
946 "psraw $3, %%mm4 \n\t"
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
947 "psraw $3, %%mm1 \n\t"
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
948 "psraw $3, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
949 WRITEYUY2(%4, %5, %%REGa)
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
950
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
951 :: "r" (&c->redDither),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
952 "m" (dummy), "m" (dummy), "m" (dummy),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
953 "r" (dest), "m" (dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
954 : "%"REG_a, "%"REG_d, "%"REG_S
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
955 );
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
956 }
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
957 break;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
958 #endif
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
959 default:
12698
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
960 #ifdef HAVE_ALTIVEC
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
961 altivec_yuv2packedX (c, lumFilter, lumSrc, lumFilterSize,
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
962 chrFilter, chrSrc, chrFilterSize,
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
963 dest, dstW, dstY);
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
964 #else
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
965 yuv2packedXinC(c, lumFilter, lumSrc, lumFilterSize,
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
966 chrFilter, chrSrc, chrFilterSize,
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
967 dest, dstW, dstY);
12698
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
968 #endif
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
969 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
970 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
971 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
972
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
973 /**
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
974 * vertical bilinear scale YV12 to RGB
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
975 */
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
976 static inline void RENAME(yuv2packed2)(SwsContext *c, uint16_t *buf0, uint16_t *buf1, uint16_t *uvbuf0, uint16_t *uvbuf1,
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
977 uint8_t *dest, int dstW, int yalpha, int uvalpha, int y)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
978 {
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
979 int yalpha1=yalpha^4095;
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
980 int uvalpha1=uvalpha^4095;
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
981 int i;
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
982
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
983 #if 0 //isn't used
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
984 if(flags&SWS_FULL_CHR_H_INT)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
985 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
986 switch(dstFormat)
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
987 {
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
988 #ifdef HAVE_MMX
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
989 case IMGFMT_BGR32:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
990 asm volatile(
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
991
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
992
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
993 FULL_YSCALEYUV2RGB
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
994 "punpcklbw %%mm1, %%mm3 \n\t" // BGBGBGBG
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
995 "punpcklbw %%mm7, %%mm0 \n\t" // R0R0R0R0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
996
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
997 "movq %%mm3, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
998 "punpcklwd %%mm0, %%mm3 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
999 "punpckhwd %%mm0, %%mm1 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1000
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1001 MOVNTQ(%%mm3, (%4, %%REGa, 4))
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1002 MOVNTQ(%%mm1, 8(%4, %%REGa, 4))
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1003
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1004 "add $4, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1005 "cmp %5, %%"REG_a" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1006 " jb 1b \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1007
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1008
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1009 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" ((long)dstW),
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1010 "m" (yalpha1), "m" (uvalpha1)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1011 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1012 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1013 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1014 case IMGFMT_BGR24:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1015 asm volatile(
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1016
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1017 FULL_YSCALEYUV2RGB
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1018
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1019 // lsb ... msb
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1020 "punpcklbw %%mm1, %%mm3 \n\t" // BGBGBGBG
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1021 "punpcklbw %%mm7, %%mm0 \n\t" // R0R0R0R0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1022
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1023 "movq %%mm3, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1024 "punpcklwd %%mm0, %%mm3 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1025 "punpckhwd %%mm0, %%mm1 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1026
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1027 "movq %%mm3, %%mm2 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1028 "psrlq $8, %%mm3 \n\t" // GR0BGR00
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1029 "pand "MANGLE(bm00000111)", %%mm2\n\t" // BGR00000
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1030 "pand "MANGLE(bm11111000)", %%mm3\n\t" // 000BGR00
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1031 "por %%mm2, %%mm3 \n\t" // BGRBGR00
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1032 "movq %%mm1, %%mm2 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1033 "psllq $48, %%mm1 \n\t" // 000000BG
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1034 "por %%mm1, %%mm3 \n\t" // BGRBGRBG
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1035
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1036 "movq %%mm2, %%mm1 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1037 "psrld $16, %%mm2 \n\t" // R000R000
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1038 "psrlq $24, %%mm1 \n\t" // 0BGR0000
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1039 "por %%mm2, %%mm1 \n\t" // RBGRR000
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1040
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1041 "mov %4, %%"REG_b" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1042 "add %%"REG_a", %%"REG_b" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1043
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1044 #ifdef HAVE_MMX2
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1045 //FIXME Alignment
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1046 "movntq %%mm3, (%%"REG_b", %%"REG_a", 2)\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1047 "movntq %%mm1, 8(%%"REG_b", %%"REG_a", 2)\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1048 #else
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1049 "movd %%mm3, (%%"REG_b", %%"REG_a", 2) \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1050 "psrlq $32, %%mm3 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1051 "movd %%mm3, 4(%%"REG_b", %%"REG_a", 2) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1052 "movd %%mm1, 8(%%"REG_b", %%"REG_a", 2) \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1053 #endif
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1054 "add $4, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1055 "cmp %5, %%"REG_a" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1056 " jb 1b \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1057
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1058 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), "m" (dstW),
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1059 "m" (yalpha1), "m" (uvalpha1)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1060 : "%"REG_a, "%"REG_b
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1061 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1062 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1063 case IMGFMT_BGR15:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1064 asm volatile(
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1065
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1066 FULL_YSCALEYUV2RGB
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1067 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1068 "paddusb "MANGLE(g5Dither)", %%mm1\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1069 "paddusb "MANGLE(r5Dither)", %%mm0\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1070 "paddusb "MANGLE(b5Dither)", %%mm3\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1071 #endif
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1072 "punpcklbw %%mm7, %%mm1 \n\t" // 0G0G0G0G
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1073 "punpcklbw %%mm7, %%mm3 \n\t" // 0B0B0B0B
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1074 "punpcklbw %%mm7, %%mm0 \n\t" // 0R0R0R0R
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1075
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1076 "psrlw $3, %%mm3 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1077 "psllw $2, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1078 "psllw $7, %%mm0 \n\t"
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1079 "pand "MANGLE(g15Mask)", %%mm1 \n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1080 "pand "MANGLE(r15Mask)", %%mm0 \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1081
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1082 "por %%mm3, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1083 "por %%mm1, %%mm0 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1084
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1085 MOVNTQ(%%mm0, (%4, %%REGa, 2))
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1086
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1087 "add $4, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1088 "cmp %5, %%"REG_a" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1089 " jb 1b \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1090
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1091 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstW),
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1092 "m" (yalpha1), "m" (uvalpha1)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1093 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1094 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1095 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1096 case IMGFMT_BGR16:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1097 asm volatile(
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1098
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1099 FULL_YSCALEYUV2RGB
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1100 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1101 "paddusb "MANGLE(g6Dither)", %%mm1\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1102 "paddusb "MANGLE(r5Dither)", %%mm0\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1103 "paddusb "MANGLE(b5Dither)", %%mm3\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1104 #endif
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1105 "punpcklbw %%mm7, %%mm1 \n\t" // 0G0G0G0G
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1106 "punpcklbw %%mm7, %%mm3 \n\t" // 0B0B0B0B
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1107 "punpcklbw %%mm7, %%mm0 \n\t" // 0R0R0R0R
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1108
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1109 "psrlw $3, %%mm3 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1110 "psllw $3, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1111 "psllw $8, %%mm0 \n\t"
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1112 "pand "MANGLE(g16Mask)", %%mm1 \n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1113 "pand "MANGLE(r16Mask)", %%mm0 \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1114
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1115 "por %%mm3, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1116 "por %%mm1, %%mm0 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1117
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1118 MOVNTQ(%%mm0, (%4, %%REGa, 2))
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1119
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1120 "add $4, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1121 "cmp %5, %%"REG_a" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1122 " jb 1b \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1123
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1124 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstW),
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1125 "m" (yalpha1), "m" (uvalpha1)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1126 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1127 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1128 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1129 #endif
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1130 case IMGFMT_RGB32:
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1131 #ifndef HAVE_MMX
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1132 case IMGFMT_BGR32:
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1133 #endif
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1134 if(dstFormat==IMGFMT_BGR32)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1135 {
4794
michael
parents: 4793
diff changeset
1136 int i;
4793
68e7ed0c22be fixing bgr32 output on big-endian systems
michael
parents: 4698
diff changeset
1137 #ifdef WORDS_BIGENDIAN
68e7ed0c22be fixing bgr32 output on big-endian systems
michael
parents: 4698
diff changeset
1138 dest++;
68e7ed0c22be fixing bgr32 output on big-endian systems
michael
parents: 4698
diff changeset
1139 #endif
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1140 for(i=0;i<dstW;i++){
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1141 // vertical linear interpolation && yuv2rgb in a single step:
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1142 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)];
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1143 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19);
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1144 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19);
2503
d21d8d5f2e23 yuv2rgb bugfix
michael
parents: 2476
diff changeset
1145 dest[0]=clip_table[((Y + yuvtab_40cf[U]) >>13)];
d21d8d5f2e23 yuv2rgb bugfix
michael
parents: 2476
diff changeset
1146 dest[1]=clip_table[((Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13)];
d21d8d5f2e23 yuv2rgb bugfix
michael
parents: 2476
diff changeset
1147 dest[2]=clip_table[((Y + yuvtab_3343[V]) >>13)];
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1148 dest+= 4;
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1149 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1150 }
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1151 else if(dstFormat==IMGFMT_BGR24)
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1152 {
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1153 int i;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1154 for(i=0;i<dstW;i++){
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1155 // vertical linear interpolation && yuv2rgb in a single step:
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1156 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)];
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1157 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19);
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1158 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19);
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1159 dest[0]=clip_table[((Y + yuvtab_40cf[U]) >>13)];
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1160 dest[1]=clip_table[((Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13)];
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1161 dest[2]=clip_table[((Y + yuvtab_3343[V]) >>13)];
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1162 dest+= 3;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1163 }
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1164 }
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1165 else if(dstFormat==IMGFMT_BGR16)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1166 {
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
1167 int i;
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1168 for(i=0;i<dstW;i++){
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1169 // vertical linear interpolation && yuv2rgb in a single step:
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1170 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)];
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1171 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19);
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1172 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19);
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1173
2572
f2353173d52c c optimizations (array is faster than pointer) (16bpp variants tested and 2% faster)
michael
parents: 2569
diff changeset
1174 ((uint16_t*)dest)[i] =
2584
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1175 clip_table16b[(Y + yuvtab_40cf[U]) >>13] |
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1176 clip_table16g[(Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13] |
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1177 clip_table16r[(Y + yuvtab_3343[V]) >>13];
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1178 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1179 }
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1180 else if(dstFormat==IMGFMT_BGR15)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1181 {
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
1182 int i;
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1183 for(i=0;i<dstW;i++){
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1184 // vertical linear interpolation && yuv2rgb in a single step:
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1185 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)];
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1186 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19);
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1187 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19);
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1188
2572
f2353173d52c c optimizations (array is faster than pointer) (16bpp variants tested and 2% faster)
michael
parents: 2569
diff changeset
1189 ((uint16_t*)dest)[i] =
2584
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1190 clip_table15b[(Y + yuvtab_40cf[U]) >>13] |
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1191 clip_table15g[(Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13] |
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1192 clip_table15r[(Y + yuvtab_3343[V]) >>13];
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1193 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1194 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1195 }//FULL_UV_IPOL
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1196 else
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1197 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1198 #endif // if 0
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1199 #ifdef HAVE_MMX
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1200 switch(c->dstFormat)
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1201 {
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
1202 //Note 8280 == DSTW_OFFSET but the preprocessor can't handle that there :(
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1203 case IMGFMT_BGR32:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1204 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1205 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1206 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1207 YSCALEYUV2RGB(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1208 WRITEBGR32(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1209 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1210
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1211 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1212 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1213 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1214 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1215 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1216 case IMGFMT_BGR24:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1217 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1218 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1219 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1220 YSCALEYUV2RGB(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1221 WRITEBGR24(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1222 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1223 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1224 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1225 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1226 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1227 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1228 case IMGFMT_BGR15:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1229 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1230 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1231 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1232 YSCALEYUV2RGB(%%REGa, %5)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1233 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1234 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1235 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1236 "paddusb "MANGLE(g5Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1237 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1238 #endif
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1239
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1240 WRITEBGR15(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1241 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1242
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1243 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1244 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1245 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1246 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1247 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1248 case IMGFMT_BGR16:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1249 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1250 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1251 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1252 YSCALEYUV2RGB(%%REGa, %5)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1253 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1254 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1255 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1256 "paddusb "MANGLE(g6Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1257 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1258 #endif
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1259
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1260 WRITEBGR16(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1261 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1262 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1263 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1264 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1265 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1266 return;
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1267 case IMGFMT_YUY2:
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1268 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1269 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1270 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1271 YSCALEYUV2PACKED(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1272 WRITEYUY2(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1273 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1274 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1275 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1276 : "%"REG_a
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1277 );
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1278 return;
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1279 default: break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1280 }
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1281 #endif //HAVE_MMX
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1282 YSCALE_YUV_2_ANYRGB_C(YSCALE_YUV_2_RGB2_C, YSCALE_YUV_2_PACKED2_C)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1283 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1284
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1285 /**
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1286 * YV12 to RGB without scaling or interpolating
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1287 */
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1288 static inline void RENAME(yuv2packed1)(SwsContext *c, uint16_t *buf0, uint16_t *uvbuf0, uint16_t *uvbuf1,
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1289 uint8_t *dest, int dstW, int uvalpha, int dstFormat, int flags, int y)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1290 {
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
1291 const int yalpha1=0;
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1292 int i;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1293
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1294 uint16_t *buf1= buf0; //FIXME needed for the rgb1/bgr1
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1295 const int yalpha= 4096; //FIXME ...
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
1296
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1297 if(flags&SWS_FULL_CHR_H_INT)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1298 {
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1299 RENAME(yuv2packed2)(c, buf0, buf0, uvbuf0, uvbuf1, dest, dstW, 0, uvalpha, y);
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1300 return;
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1301 }
2576
437ed06579d8 c optimizations
michael
parents: 2575
diff changeset
1302
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1303 #ifdef HAVE_MMX
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1304 if( uvalpha < 2048 ) // note this is not correct (shifts chrominance by 0.5 pixels) but its a bit faster
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1305 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1306 switch(dstFormat)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1307 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1308 case IMGFMT_BGR32:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1309 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1310 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1311 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1312 YSCALEYUV2RGB1(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1313 WRITEBGR32(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1314 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1315
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1316 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1317 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1318 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1319 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1320 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1321 case IMGFMT_BGR24:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1322 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1323 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1324 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1325 YSCALEYUV2RGB1(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1326 WRITEBGR24(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1327 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1328
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1329 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1330 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1331 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1332 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1333 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1334 case IMGFMT_BGR15:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1335 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1336 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1337 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1338 YSCALEYUV2RGB1(%%REGa, %5)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1339 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1340 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1341 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1342 "paddusb "MANGLE(g5Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1343 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1344 #endif
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1345 WRITEBGR15(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1346 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1347
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1348 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1349 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1350 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1351 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1352 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1353 case IMGFMT_BGR16:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1354 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1355 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1356 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1357 YSCALEYUV2RGB1(%%REGa, %5)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1358 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1359 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1360 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1361 "paddusb "MANGLE(g6Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1362 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1363 #endif
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1364
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1365 WRITEBGR16(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1366 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1367
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1368 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1369 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1370 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1371 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1372 return;
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1373 case IMGFMT_YUY2:
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1374 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1375 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1376 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1377 YSCALEYUV2PACKED1(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1378 WRITEYUY2(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1379 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1380
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1381 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1382 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1383 : "%"REG_a
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1384 );
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1385 return;
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1386 }
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1387 }
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1388 else
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1389 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1390 switch(dstFormat)
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1391 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1392 case IMGFMT_BGR32:
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1393 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1394 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1395 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1396 YSCALEYUV2RGB1b(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1397 WRITEBGR32(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1398 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1399
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1400 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1401 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1402 : "%"REG_a
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1403 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1404 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1405 case IMGFMT_BGR24:
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1406 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1407 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1408 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1409 YSCALEYUV2RGB1b(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1410 WRITEBGR24(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1411 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1412
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1413 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1414 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1415 : "%"REG_a
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1416 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1417 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1418 case IMGFMT_BGR15:
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1419 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1420 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1421 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1422 YSCALEYUV2RGB1b(%%REGa, %5)
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1423 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1424 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1425 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1426 "paddusb "MANGLE(g5Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1427 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1428 #endif
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1429 WRITEBGR15(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1430 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1431
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1432 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1433 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1434 : "%"REG_a
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1435 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1436 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1437 case IMGFMT_BGR16:
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1438 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1439 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1440 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1441 YSCALEYUV2RGB1b(%%REGa, %5)
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1442 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1443 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1444 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1445 "paddusb "MANGLE(g6Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1446 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1447 #endif
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1448
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1449 WRITEBGR16(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1450 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1451
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1452 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1453 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1454 : "%"REG_a
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1455 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1456 return;
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1457 case IMGFMT_YUY2:
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1458 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1459 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1460 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1461 YSCALEYUV2PACKED1b(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1462 WRITEYUY2(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1463 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1464
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1465 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1466 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1467 : "%"REG_a
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1468 );
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1469 return;
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1470 }
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1471 }
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1472 #endif
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1473 if( uvalpha < 2048 )
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1474 {
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1475 YSCALE_YUV_2_ANYRGB_C(YSCALE_YUV_2_RGB1_C, YSCALE_YUV_2_PACKED1_C)
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1476 }else{
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1477 YSCALE_YUV_2_ANYRGB_C(YSCALE_YUV_2_RGB1B_C, YSCALE_YUV_2_PACKED1B_C)
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1478 }
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1479 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1480
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1481 //FIXME yuy2* can read upto 7 samples to much
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1482
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1483 static inline void RENAME(yuy2ToY)(uint8_t *dst, uint8_t *src, int width)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1484 {
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1485 #ifdef HAVE_MMX
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1486 asm volatile(
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1487 "movq "MANGLE(bm01010101)", %%mm2\n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1488 "mov %0, %%"REG_a" \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1489 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1490 "movq (%1, %%"REG_a",2), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1491 "movq 8(%1, %%"REG_a",2), %%mm1 \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1492 "pand %%mm2, %%mm0 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1493 "pand %%mm2, %%mm1 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1494 "packuswb %%mm1, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1495 "movq %%mm0, (%2, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1496 "add $8, %%"REG_a" \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1497 " js 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1498 : : "g" ((long)-width), "r" (src+width*2), "r" (dst+width)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1499 : "%"REG_a
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1500 );
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1501 #else
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1502 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1503 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1504 dst[i]= src[2*i];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1505 #endif
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1506 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1507
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1508 static inline void RENAME(yuy2ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1509 {
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1510 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW)
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1511 asm volatile(
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1512 "movq "MANGLE(bm01010101)", %%mm4\n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1513 "mov %0, %%"REG_a" \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1514 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1515 "movq (%1, %%"REG_a",4), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1516 "movq 8(%1, %%"REG_a",4), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1517 "movq (%2, %%"REG_a",4), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1518 "movq 8(%2, %%"REG_a",4), %%mm3 \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1519 PAVGB(%%mm2, %%mm0)
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1520 PAVGB(%%mm3, %%mm1)
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1521 "psrlw $8, %%mm0 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1522 "psrlw $8, %%mm1 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1523 "packuswb %%mm1, %%mm0 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1524 "movq %%mm0, %%mm1 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1525 "psrlw $8, %%mm0 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1526 "pand %%mm4, %%mm1 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1527 "packuswb %%mm0, %%mm0 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1528 "packuswb %%mm1, %%mm1 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1529 "movd %%mm0, (%4, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1530 "movd %%mm1, (%3, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1531 "add $4, %%"REG_a" \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1532 " js 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1533 : : "g" ((long)-width), "r" (src1+width*4), "r" (src2+width*4), "r" (dstU+width), "r" (dstV+width)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1534 : "%"REG_a
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1535 );
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1536 #else
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1537 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1538 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1539 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1540 dstU[i]= (src1[4*i + 1] + src2[4*i + 1])>>1;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1541 dstV[i]= (src1[4*i + 3] + src2[4*i + 3])>>1;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1542 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1543 #endif
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1544 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1545
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1546 //this is allmost identical to the previous, end exists only cuz yuy2ToY/UV)(dst, src+1, ...) would have 100% unaligned accesses
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1547 static inline void RENAME(uyvyToY)(uint8_t *dst, uint8_t *src, int width)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1548 {
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1549 #ifdef HAVE_MMX
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1550 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1551 "mov %0, %%"REG_a" \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1552 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1553 "movq (%1, %%"REG_a",2), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1554 "movq 8(%1, %%"REG_a",2), %%mm1 \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1555 "psrlw $8, %%mm0 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1556 "psrlw $8, %%mm1 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1557 "packuswb %%mm1, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1558 "movq %%mm0, (%2, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1559 "add $8, %%"REG_a" \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1560 " js 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1561 : : "g" ((long)-width), "r" (src+width*2), "r" (dst+width)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1562 : "%"REG_a
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1563 );
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1564 #else
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1565 int i;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1566 for(i=0; i<width; i++)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1567 dst[i]= src[2*i+1];
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1568 #endif
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1569 }
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1570
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1571 static inline void RENAME(uyvyToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1572 {
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1573 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1574 asm volatile(
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1575 "movq "MANGLE(bm01010101)", %%mm4\n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1576 "mov %0, %%"REG_a" \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1577 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1578 "movq (%1, %%"REG_a",4), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1579 "movq 8(%1, %%"REG_a",4), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1580 "movq (%2, %%"REG_a",4), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1581 "movq 8(%2, %%"REG_a",4), %%mm3 \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1582 PAVGB(%%mm2, %%mm0)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1583 PAVGB(%%mm3, %%mm1)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1584 "pand %%mm4, %%mm0 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1585 "pand %%mm4, %%mm1 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1586 "packuswb %%mm1, %%mm0 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1587 "movq %%mm0, %%mm1 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1588 "psrlw $8, %%mm0 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1589 "pand %%mm4, %%mm1 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1590 "packuswb %%mm0, %%mm0 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1591 "packuswb %%mm1, %%mm1 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1592 "movd %%mm0, (%4, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1593 "movd %%mm1, (%3, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1594 "add $4, %%"REG_a" \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1595 " js 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1596 : : "g" ((long)-width), "r" (src1+width*4), "r" (src2+width*4), "r" (dstU+width), "r" (dstV+width)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1597 : "%"REG_a
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1598 );
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1599 #else
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1600 int i;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1601 for(i=0; i<width; i++)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1602 {
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1603 dstU[i]= (src1[4*i + 0] + src2[4*i + 0])>>1;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1604 dstV[i]= (src1[4*i + 2] + src2[4*i + 2])>>1;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1605 }
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1606 #endif
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1607 }
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1608
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1609 static inline void RENAME(bgr32ToY)(uint8_t *dst, uint8_t *src, int width)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1610 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1611 #ifdef HAVE_MMXFIXME
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1612 #else
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1613 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1614 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1615 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1616 int b= ((uint32_t*)src)[i]&0xFF;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1617 int g= (((uint32_t*)src)[i]>>8)&0xFF;
9499
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
1618 int r= (((uint32_t*)src)[i]>>16)&0xFF;
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1619
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1620 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT);
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1621 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1622 #endif
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1623 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1624
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1625 static inline void RENAME(bgr32ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1626 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1627 #ifdef HAVE_MMXFIXME
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1628 #else
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1629 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1630 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1631 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1632 const int a= ((uint32_t*)src1)[2*i+0];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1633 const int e= ((uint32_t*)src1)[2*i+1];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1634 const int c= ((uint32_t*)src2)[2*i+0];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1635 const int d= ((uint32_t*)src2)[2*i+1];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1636 const int l= (a&0xFF00FF) + (e&0xFF00FF) + (c&0xFF00FF) + (d&0xFF00FF);
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1637 const int h= (a&0x00FF00) + (e&0x00FF00) + (c&0x00FF00) + (d&0x00FF00);
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1638 const int b= l&0x3FF;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1639 const int g= h>>8;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1640 const int r= l>>16;
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1641
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1642 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1643 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1644 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1645 #endif
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1646 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1647
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1648 static inline void RENAME(bgr24ToY)(uint8_t *dst, uint8_t *src, int width)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1649 {
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1650 #ifdef HAVE_MMX
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1651 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1652 "mov %2, %%"REG_a" \n\t"
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1653 "movq "MANGLE(bgr2YCoeff)", %%mm6 \n\t"
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1654 "movq "MANGLE(w1111)", %%mm5 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1655 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1656 "lea (%%"REG_a", %%"REG_a", 2), %%"REG_b"\n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1657 ".balign 16 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1658 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1659 PREFETCH" 64(%0, %%"REG_b") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1660 "movd (%0, %%"REG_b"), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1661 "movd 3(%0, %%"REG_b"), %%mm1 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1662 "punpcklbw %%mm7, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1663 "punpcklbw %%mm7, %%mm1 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1664 "movd 6(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1665 "movd 9(%0, %%"REG_b"), %%mm3 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1666 "punpcklbw %%mm7, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1667 "punpcklbw %%mm7, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1668 "pmaddwd %%mm6, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1669 "pmaddwd %%mm6, %%mm1 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1670 "pmaddwd %%mm6, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1671 "pmaddwd %%mm6, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1672 #ifndef FAST_BGR2YV12
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1673 "psrad $8, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1674 "psrad $8, %%mm1 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1675 "psrad $8, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1676 "psrad $8, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1677 #endif
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1678 "packssdw %%mm1, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1679 "packssdw %%mm3, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1680 "pmaddwd %%mm5, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1681 "pmaddwd %%mm5, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1682 "packssdw %%mm2, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1683 "psraw $7, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1684
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1685 "movd 12(%0, %%"REG_b"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1686 "movd 15(%0, %%"REG_b"), %%mm1 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1687 "punpcklbw %%mm7, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1688 "punpcklbw %%mm7, %%mm1 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1689 "movd 18(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1690 "movd 21(%0, %%"REG_b"), %%mm3 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1691 "punpcklbw %%mm7, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1692 "punpcklbw %%mm7, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1693 "pmaddwd %%mm6, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1694 "pmaddwd %%mm6, %%mm1 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1695 "pmaddwd %%mm6, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1696 "pmaddwd %%mm6, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1697 #ifndef FAST_BGR2YV12
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1698 "psrad $8, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1699 "psrad $8, %%mm1 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1700 "psrad $8, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1701 "psrad $8, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1702 #endif
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1703 "packssdw %%mm1, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1704 "packssdw %%mm3, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1705 "pmaddwd %%mm5, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1706 "pmaddwd %%mm5, %%mm2 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1707 "add $24, %%"REG_b" \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1708 "packssdw %%mm2, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1709 "psraw $7, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1710
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1711 "packuswb %%mm4, %%mm0 \n\t"
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1712 "paddusb "MANGLE(bgr2YOffset)", %%mm0 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1713
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1714 "movq %%mm0, (%1, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1715 "add $8, %%"REG_a" \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1716 " js 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1717 : : "r" (src+width*3), "r" (dst+width), "g" ((long)-width)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1718 : "%"REG_a, "%"REG_b
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1719 );
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1720 #else
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1721 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1722 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1723 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1724 int b= src[i*3+0];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1725 int g= src[i*3+1];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1726 int r= src[i*3+2];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1727
9434
michael
parents: 9433
diff changeset
1728 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT);
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1729 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1730 #endif
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1731 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1732
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1733 static inline void RENAME(bgr24ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1734 {
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1735 #ifdef HAVE_MMX
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1736 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1737 "mov %4, %%"REG_a" \n\t"
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1738 "movq "MANGLE(w1111)", %%mm5 \n\t"
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1739 "movq "MANGLE(bgr2UCoeff)", %%mm6 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1740 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1741 "lea (%%"REG_a", %%"REG_a", 2), %%"REG_b" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1742 "add %%"REG_b", %%"REG_b" \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1743 ".balign 16 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1744 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1745 PREFETCH" 64(%0, %%"REG_b") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1746 PREFETCH" 64(%1, %%"REG_b") \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1747 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1748 "movq (%0, %%"REG_b"), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1749 "movq (%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1750 "movq 6(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1751 "movq 6(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1752 PAVGB(%%mm1, %%mm0)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1753 PAVGB(%%mm3, %%mm2)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1754 "movq %%mm0, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1755 "movq %%mm2, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1756 "psrlq $24, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1757 "psrlq $24, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1758 PAVGB(%%mm1, %%mm0)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1759 PAVGB(%%mm3, %%mm2)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1760 "punpcklbw %%mm7, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1761 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1762 #else
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1763 "movd (%0, %%"REG_b"), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1764 "movd (%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1765 "movd 3(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1766 "movd 3(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1767 "punpcklbw %%mm7, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1768 "punpcklbw %%mm7, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1769 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1770 "punpcklbw %%mm7, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1771 "paddw %%mm1, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1772 "paddw %%mm3, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1773 "paddw %%mm2, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1774 "movd 6(%0, %%"REG_b"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1775 "movd 6(%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1776 "movd 9(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1777 "movd 9(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1778 "punpcklbw %%mm7, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1779 "punpcklbw %%mm7, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1780 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1781 "punpcklbw %%mm7, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1782 "paddw %%mm1, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1783 "paddw %%mm3, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1784 "paddw %%mm4, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1785 "psrlw $2, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1786 "psrlw $2, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1787 #endif
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1788 "movq "MANGLE(bgr2VCoeff)", %%mm1 \n\t"
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1789 "movq "MANGLE(bgr2VCoeff)", %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1790
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1791 "pmaddwd %%mm0, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1792 "pmaddwd %%mm2, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1793 "pmaddwd %%mm6, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1794 "pmaddwd %%mm6, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1795 #ifndef FAST_BGR2YV12
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1796 "psrad $8, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1797 "psrad $8, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1798 "psrad $8, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1799 "psrad $8, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1800 #endif
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1801 "packssdw %%mm2, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1802 "packssdw %%mm3, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1803 "pmaddwd %%mm5, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1804 "pmaddwd %%mm5, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1805 "packssdw %%mm1, %%mm0 \n\t" // V1 V0 U1 U0
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1806 "psraw $7, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1807
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1808 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1809 "movq 12(%0, %%"REG_b"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1810 "movq 12(%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1811 "movq 18(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1812 "movq 18(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1813 PAVGB(%%mm1, %%mm4)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1814 PAVGB(%%mm3, %%mm2)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1815 "movq %%mm4, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1816 "movq %%mm2, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1817 "psrlq $24, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1818 "psrlq $24, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1819 PAVGB(%%mm1, %%mm4)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1820 PAVGB(%%mm3, %%mm2)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1821 "punpcklbw %%mm7, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1822 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1823 #else
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1824 "movd 12(%0, %%"REG_b"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1825 "movd 12(%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1826 "movd 15(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1827 "movd 15(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1828 "punpcklbw %%mm7, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1829 "punpcklbw %%mm7, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1830 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1831 "punpcklbw %%mm7, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1832 "paddw %%mm1, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1833 "paddw %%mm3, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1834 "paddw %%mm2, %%mm4 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1835 "movd 18(%0, %%"REG_b"), %%mm5 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1836 "movd 18(%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1837 "movd 21(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1838 "movd 21(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1839 "punpcklbw %%mm7, %%mm5 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1840 "punpcklbw %%mm7, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1841 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1842 "punpcklbw %%mm7, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1843 "paddw %%mm1, %%mm5 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1844 "paddw %%mm3, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1845 "paddw %%mm5, %%mm2 \n\t"
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1846 "movq "MANGLE(w1111)", %%mm5 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1847 "psrlw $2, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1848 "psrlw $2, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1849 #endif
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1850 "movq "MANGLE(bgr2VCoeff)", %%mm1 \n\t"
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1851 "movq "MANGLE(bgr2VCoeff)", %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1852
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1853 "pmaddwd %%mm4, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1854 "pmaddwd %%mm2, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1855 "pmaddwd %%mm6, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1856 "pmaddwd %%mm6, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1857 #ifndef FAST_BGR2YV12
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1858 "psrad $8, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1859 "psrad $8, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1860 "psrad $8, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1861 "psrad $8, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1862 #endif
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1863 "packssdw %%mm2, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1864 "packssdw %%mm3, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1865 "pmaddwd %%mm5, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1866 "pmaddwd %%mm5, %%mm1 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1867 "add $24, %%"REG_b" \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1868 "packssdw %%mm1, %%mm4 \n\t" // V3 V2 U3 U2
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1869 "psraw $7, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1870
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1871 "movq %%mm0, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1872 "punpckldq %%mm4, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1873 "punpckhdq %%mm4, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1874 "packsswb %%mm1, %%mm0 \n\t"
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1875 "paddb "MANGLE(bgr2UVOffset)", %%mm0 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1876
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1877 "movd %%mm0, (%2, %%"REG_a") \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1878 "punpckhdq %%mm0, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1879 "movd %%mm0, (%3, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1880 "add $4, %%"REG_a" \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1881 " js 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1882 : : "r" (src1+width*6), "r" (src2+width*6), "r" (dstU+width), "r" (dstV+width), "g" ((long)-width)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1883 : "%"REG_a, "%"REG_b
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1884 );
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1885 #else
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1886 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1887 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1888 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1889 int b= src1[6*i + 0] + src1[6*i + 3] + src2[6*i + 0] + src2[6*i + 3];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1890 int g= src1[6*i + 1] + src1[6*i + 4] + src2[6*i + 1] + src2[6*i + 4];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1891 int r= src1[6*i + 2] + src1[6*i + 5] + src2[6*i + 2] + src2[6*i + 5];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1892
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1893 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1894 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1895 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1896 #endif
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1897 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1898
4578
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1899 static inline void RENAME(bgr16ToY)(uint8_t *dst, uint8_t *src, int width)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1900 {
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1901 int i;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1902 for(i=0; i<width; i++)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1903 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1904 int d= ((uint16_t*)src)[i];
4578
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1905 int b= d&0x1F;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1906 int g= (d>>5)&0x3F;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1907 int r= (d>>11)&0x1F;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1908
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1909 dst[i]= ((2*RY*r + GY*g + 2*BY*b)>>(RGB2YUV_SHIFT-2)) + 16;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1910 }
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1911 }
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1912
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1913 static inline void RENAME(bgr16ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1914 {
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1915 int i;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1916 for(i=0; i<width; i++)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1917 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1918 int d0= ((uint32_t*)src1)[i];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1919 int d1= ((uint32_t*)src2)[i];
4579
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1920
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1921 int dl= (d0&0x07E0F81F) + (d1&0x07E0F81F);
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1922 int dh= ((d0>>5)&0x07C0F83F) + ((d1>>5)&0x07C0F83F);
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1923
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1924 int dh2= (dh>>11) + (dh<<21);
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1925 int d= dh2 + dl;
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1926
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1927 int b= d&0x7F;
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1928 int r= (d>>11)&0x7F;
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1929 int g= d>>21;
4578
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1930 dstU[i]= ((2*RU*r + GU*g + 2*BU*b)>>(RGB2YUV_SHIFT+2-2)) + 128;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1931 dstV[i]= ((2*RV*r + GV*g + 2*BV*b)>>(RGB2YUV_SHIFT+2-2)) + 128;
395b1233b856 bgr16 input support
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parents: 4558
diff changeset
1932 }
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1933 }
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1934
4580
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1935 static inline void RENAME(bgr15ToY)(uint8_t *dst, uint8_t *src, int width)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1936 {
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1937 int i;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1938 for(i=0; i<width; i++)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1939 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1940 int d= ((uint16_t*)src)[i];
4580
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1941 int b= d&0x1F;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1942 int g= (d>>5)&0x1F;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1943 int r= (d>>10)&0x1F;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1944
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1945 dst[i]= ((RY*r + GY*g + BY*b)>>(RGB2YUV_SHIFT-3)) + 16;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1946 }
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1947 }
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1948
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1949 static inline void RENAME(bgr15ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1950 {
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1951 int i;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1952 for(i=0; i<width; i++)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1953 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1954 int d0= ((uint32_t*)src1)[i];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1955 int d1= ((uint32_t*)src2)[i];
4580
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1956
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1957 int dl= (d0&0x03E07C1F) + (d1&0x03E07C1F);
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1958 int dh= ((d0>>5)&0x03E0F81F) + ((d1>>5)&0x03E0F81F);
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1959
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1960 int dh2= (dh>>11) + (dh<<21);
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1961 int d= dh2 + dl;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1962
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1963 int b= d&0x7F;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1964 int r= (d>>10)&0x7F;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1965 int g= d>>21;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1966 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2-3)) + 128;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1967 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2-3)) + 128;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1968 }
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1969 }
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1970
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1971
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1972 static inline void RENAME(rgb32ToY)(uint8_t *dst, uint8_t *src, int width)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1973 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1974 int i;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1975 for(i=0; i<width; i++)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1976 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1977 int r= ((uint32_t*)src)[i]&0xFF;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1978 int g= (((uint32_t*)src)[i]>>8)&0xFF;
9499
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
1979 int b= (((uint32_t*)src)[i]>>16)&0xFF;
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1980
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1981 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT);
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1982 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1983 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1984
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1985 static inline void RENAME(rgb32ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1986 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1987 int i;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1988 for(i=0; i<width; i++)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1989 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1990 const int a= ((uint32_t*)src1)[2*i+0];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1991 const int e= ((uint32_t*)src1)[2*i+1];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1992 const int c= ((uint32_t*)src2)[2*i+0];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1993 const int d= ((uint32_t*)src2)[2*i+1];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1994 const int l= (a&0xFF00FF) + (e&0xFF00FF) + (c&0xFF00FF) + (d&0xFF00FF);
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1995 const int h= (a&0x00FF00) + (e&0x00FF00) + (c&0x00FF00) + (d&0x00FF00);
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1996 const int r= l&0x3FF;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1997 const int g= h>>8;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1998 const int b= l>>16;
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1999
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2000 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2001 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2002 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2003 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2004
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2005 static inline void RENAME(rgb24ToY)(uint8_t *dst, uint8_t *src, int width)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2006 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2007 int i;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2008 for(i=0; i<width; i++)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2009 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2010 int r= src[i*3+0];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2011 int g= src[i*3+1];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2012 int b= src[i*3+2];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2013
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
2014 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT);
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2015 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2016 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2017
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2018 static inline void RENAME(rgb24ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2019 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2020 int i;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2021 for(i=0; i<width; i++)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2022 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2023 int r= src1[6*i + 0] + src1[6*i + 3] + src2[6*i + 0] + src2[6*i + 3];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2024 int g= src1[6*i + 1] + src1[6*i + 4] + src2[6*i + 1] + src2[6*i + 4];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2025 int b= src1[6*i + 2] + src1[6*i + 5] + src2[6*i + 2] + src2[6*i + 5];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2026
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2027 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2028 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2029 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2030 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2031
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2032
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2033 // Bilinear / Bicubic scaling
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2034 static inline void RENAME(hScale)(int16_t *dst, int dstW, uint8_t *src, int srcW, int xInc,
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2035 int16_t *filter, int16_t *filterPos, int filterSize)
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2036 {
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2037 #ifdef HAVE_MMX
9921
61057de81510 mplayer idependant (not really yet) swscale example
michael
parents: 9499
diff changeset
2038 assert(filterSize % 4 == 0 && filterSize>0);
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2039 if(filterSize==4) // allways true for upscaling, sometimes for down too
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2040 {
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2041 long counter= -2*dstW;
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2042 filter-= counter*2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2043 filterPos-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2044 dst-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2045 asm volatile(
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2046 "pxor %%mm7, %%mm7 \n\t"
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
2047 "movq "MANGLE(w02)", %%mm6 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2048 "push %%"REG_BP" \n\t" // we use 7 regs here ...
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2049 "mov %%"REG_a", %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2050 ".balign 16 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2051 "1: \n\t"
13733
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2052 "movzwl (%2, %%"REG_BP"), %%eax \n\t"
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2053 "movzwl 2(%2, %%"REG_BP"), %%ebx\n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2054 "movq (%1, %%"REG_BP", 4), %%mm1\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2055 "movq 8(%1, %%"REG_BP", 4), %%mm3\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2056 "movd (%3, %%"REG_a"), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2057 "movd (%3, %%"REG_b"), %%mm2 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2058 "punpcklbw %%mm7, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2059 "punpcklbw %%mm7, %%mm2 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2060 "pmaddwd %%mm1, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2061 "pmaddwd %%mm2, %%mm3 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2062 "psrad $8, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2063 "psrad $8, %%mm3 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2064 "packssdw %%mm3, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2065 "pmaddwd %%mm6, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2066 "packssdw %%mm0, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2067 "movd %%mm0, (%4, %%"REG_BP") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2068 "add $4, %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2069 " jnc 1b \n\t"
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2070
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2071 "pop %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2072 : "+a" (counter)
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2073 : "c" (filter), "d" (filterPos), "S" (src), "D" (dst)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2074 : "%"REG_b
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2075 );
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2076 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2077 else if(filterSize==8)
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2078 {
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2079 long counter= -2*dstW;
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2080 filter-= counter*4;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2081 filterPos-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2082 dst-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2083 asm volatile(
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2084 "pxor %%mm7, %%mm7 \n\t"
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
2085 "movq "MANGLE(w02)", %%mm6 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2086 "push %%"REG_BP" \n\t" // we use 7 regs here ...
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2087 "mov %%"REG_a", %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2088 ".balign 16 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2089 "1: \n\t"
13733
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2090 "movzwl (%2, %%"REG_BP"), %%eax \n\t"
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2091 "movzwl 2(%2, %%"REG_BP"), %%ebx\n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2092 "movq (%1, %%"REG_BP", 8), %%mm1\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2093 "movq 16(%1, %%"REG_BP", 8), %%mm3\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2094 "movd (%3, %%"REG_a"), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2095 "movd (%3, %%"REG_b"), %%mm2 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2096 "punpcklbw %%mm7, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2097 "punpcklbw %%mm7, %%mm2 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2098 "pmaddwd %%mm1, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2099 "pmaddwd %%mm2, %%mm3 \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
2100
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2101 "movq 8(%1, %%"REG_BP", 8), %%mm1\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2102 "movq 24(%1, %%"REG_BP", 8), %%mm5\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2103 "movd 4(%3, %%"REG_a"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2104 "movd 4(%3, %%"REG_b"), %%mm2 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2105 "punpcklbw %%mm7, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2106 "punpcklbw %%mm7, %%mm2 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2107 "pmaddwd %%mm1, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2108 "pmaddwd %%mm2, %%mm5 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2109 "paddd %%mm4, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2110 "paddd %%mm5, %%mm3 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2111
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2112 "psrad $8, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2113 "psrad $8, %%mm3 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2114 "packssdw %%mm3, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2115 "pmaddwd %%mm6, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2116 "packssdw %%mm0, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2117 "movd %%mm0, (%4, %%"REG_BP") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2118 "add $4, %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2119 " jnc 1b \n\t"
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2120
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2121 "pop %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2122 : "+a" (counter)
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2123 : "c" (filter), "d" (filterPos), "S" (src), "D" (dst)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2124 : "%"REG_b
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2125 );
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2126 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2127 else
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2128 {
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2129 long counter= -2*dstW;
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2130 // filter-= counter*filterSize/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2131 filterPos-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2132 dst-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2133 asm volatile(
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2134 "pxor %%mm7, %%mm7 \n\t"
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
2135 "movq "MANGLE(w02)", %%mm6 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2136 ".balign 16 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2137 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2138 "mov %2, %%"REG_c" \n\t"
13733
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2139 "movzwl (%%"REG_c", %0), %%eax \n\t"
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2140 "movzwl 2(%%"REG_c", %0), %%ebx \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2141 "mov %5, %%"REG_c" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2142 "pxor %%mm4, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2143 "pxor %%mm5, %%mm5 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2144 "2: \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2145 "movq (%1), %%mm1 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2146 "movq (%1, %6), %%mm3 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2147 "movd (%%"REG_c", %%"REG_a"), %%mm0\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2148 "movd (%%"REG_c", %%"REG_b"), %%mm2\n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2149 "punpcklbw %%mm7, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2150 "punpcklbw %%mm7, %%mm2 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2151 "pmaddwd %%mm1, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2152 "pmaddwd %%mm2, %%mm3 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2153 "paddd %%mm3, %%mm5 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2154 "paddd %%mm0, %%mm4 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2155 "add $8, %1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2156 "add $4, %%"REG_c" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2157 "cmp %4, %%"REG_c" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2158 " jb 2b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2159 "add %6, %1 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2160 "psrad $8, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2161 "psrad $8, %%mm5 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2162 "packssdw %%mm5, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2163 "pmaddwd %%mm6, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2164 "packssdw %%mm4, %%mm4 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2165 "mov %3, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2166 "movd %%mm4, (%%"REG_a", %0) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2167 "add $4, %0 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2168 " jnc 1b \n\t"
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2169
3641
33c560ffd3dc minor bugfixes (noone noticed them)
michael
parents: 3352
diff changeset
2170 : "+r" (counter), "+r" (filter)
33c560ffd3dc minor bugfixes (noone noticed them)
michael
parents: 3352
diff changeset
2171 : "m" (filterPos), "m" (dst), "m"(src+filterSize),
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2172 "m" (src), "r" ((long)filterSize*2)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2173 : "%"REG_b, "%"REG_a, "%"REG_c
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2174 );
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2175 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2176 #else
12130
2ef24558b732 AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents: 12017
diff changeset
2177 #ifdef HAVE_ALTIVEC
2ef24558b732 AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents: 12017
diff changeset
2178 hScale_altivec_real(dst, dstW, src, srcW, xInc, filter, filterPos, filterSize);
2ef24558b732 AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents: 12017
diff changeset
2179 #else
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2180 int i;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2181 for(i=0; i<dstW; i++)
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2182 {
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2183 int j;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2184 int srcPos= filterPos[i];
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2185 int val=0;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2186 // printf("filterPos: %d\n", filterPos[i]);
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2187 for(j=0; j<filterSize; j++)
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2188 {
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2189 // printf("filter: %d, src: %d\n", filter[i], src[srcPos + j]);
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2190 val += ((int)src[srcPos + j])*filter[filterSize*i + j];
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2191 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2192 // filter += hFilterSize;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2193 dst[i] = MIN(MAX(0, val>>7), (1<<15)-1); // the cubic equation does overflow ...
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2194 // dst[i] = val>>7;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2195 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2196 #endif
12130
2ef24558b732 AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents: 12017
diff changeset
2197 #endif
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2198 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2199 // *** horizontal scale Y line to temp buffer
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2200 static inline void RENAME(hyscale)(uint16_t *dst, int dstWidth, uint8_t *src, int srcW, int xInc,
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2201 int flags, int canMMX2BeUsed, int16_t *hLumFilter,
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2202 int16_t *hLumFilterPos, int hLumFilterSize, void *funnyYCode,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2203 int srcFormat, uint8_t *formatConvBuffer, int16_t *mmx2Filter,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2204 int32_t *mmx2FilterPos)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2205 {
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2206 if(srcFormat==IMGFMT_YUY2)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2207 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2208 RENAME(yuy2ToY)(formatConvBuffer, src, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2209 src= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2210 }
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2211 else if(srcFormat==IMGFMT_UYVY)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2212 {
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2213 RENAME(uyvyToY)(formatConvBuffer, src, srcW);
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2214 src= formatConvBuffer;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2215 }
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2216 else if(srcFormat==IMGFMT_BGR32)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2217 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2218 RENAME(bgr32ToY)(formatConvBuffer, src, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2219 src= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2220 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2221 else if(srcFormat==IMGFMT_BGR24)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2222 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2223 RENAME(bgr24ToY)(formatConvBuffer, src, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2224 src= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2225 }
4578
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2226 else if(srcFormat==IMGFMT_BGR16)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2227 {
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2228 RENAME(bgr16ToY)(formatConvBuffer, src, srcW);
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2229 src= formatConvBuffer;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2230 }
4580
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2231 else if(srcFormat==IMGFMT_BGR15)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2232 {
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2233 RENAME(bgr15ToY)(formatConvBuffer, src, srcW);
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2234 src= formatConvBuffer;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2235 }
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2236 else if(srcFormat==IMGFMT_RGB32)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2237 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2238 RENAME(rgb32ToY)(formatConvBuffer, src, srcW);
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2239 src= formatConvBuffer;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2240 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2241 else if(srcFormat==IMGFMT_RGB24)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2242 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2243 RENAME(rgb24ToY)(formatConvBuffer, src, srcW);
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2244 src= formatConvBuffer;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2245 }
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2246
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2247 #ifdef HAVE_MMX
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2248 // use the new MMX scaler if the mmx2 can't be used (its faster than the x86asm one)
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2249 if(!(flags&SWS_FAST_BILINEAR) || (!canMMX2BeUsed))
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2250 #else
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2251 if(!(flags&SWS_FAST_BILINEAR))
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2252 #endif
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2253 {
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2254 RENAME(hScale)(dst, dstWidth, src, srcW, xInc, hLumFilter, hLumFilterPos, hLumFilterSize);
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2255 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2256 else // Fast Bilinear upscale / crap downscale
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2257 {
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2258 #if defined(ARCH_X86) || defined(ARCH_X86_64)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2259 #ifdef HAVE_MMX2
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2260 int i;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2261 if(canMMX2BeUsed)
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2262 {
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2263 asm volatile(
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2264 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2265 "mov %0, %%"REG_c" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2266 "mov %1, %%"REG_D" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2267 "mov %2, %%"REG_d" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2268 "mov %3, %%"REG_b" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2269 "xor %%"REG_a", %%"REG_a" \n\t" // i
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2270 PREFETCH" (%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2271 PREFETCH" 32(%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2272 PREFETCH" 64(%%"REG_c") \n\t"
2520
b58c43aab619 3dnow prefetch & sfence
michael
parents: 2519
diff changeset
2273
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2274 #ifdef ARCH_X86_64
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2275
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2276 #define FUNNY_Y_CODE \
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2277 "movl (%%"REG_b"), %%esi \n\t"\
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2278 "call *%4 \n\t"\
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2279 "movl (%%"REG_b", %%"REG_a"), %%esi\n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2280 "add %%"REG_S", %%"REG_c" \n\t"\
14536
6f13379b1464 100l, fix broken AMD64 patch. To whoever applied it: Did you actually _try_
reimar
parents: 13733
diff changeset
2281 "add %%"REG_a", %%"REG_D" \n\t"\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2282 "xor %%"REG_a", %%"REG_a" \n\t"\
2520
b58c43aab619 3dnow prefetch & sfence
michael
parents: 2519
diff changeset
2283
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2284 #else
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2285
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2286 #define FUNNY_Y_CODE \
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2287 "movl (%%"REG_b"), %%esi \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2288 "call *%4 \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2289 "addl (%%"REG_b", %%"REG_a"), %%"REG_c"\n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2290 "add %%"REG_a", %%"REG_D" \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2291 "xor %%"REG_a", %%"REG_a" \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2292
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2293 #endif
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2294
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2295 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2296 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2297 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2298 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2299 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2300 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2301 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2302 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2303
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2304 :: "m" (src), "m" (dst), "m" (mmx2Filter), "m" (mmx2FilterPos),
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2305 "m" (funnyYCode)
14536
6f13379b1464 100l, fix broken AMD64 patch. To whoever applied it: Did you actually _try_
reimar
parents: 13733
diff changeset
2306 : "%"REG_a, "%"REG_b, "%"REG_c, "%"REG_d, "%"REG_S, "%"REG_D
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2307 );
3215
3083616ba4d6 sliced scaleing bugfix
michael
parents: 3209
diff changeset
2308 for(i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--) dst[i] = src[srcW-1]*128;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2309 }
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2310 else
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2311 {
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2312 #endif
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2313 //NO MMX just normal asm ...
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2314 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2315 "xor %%"REG_a", %%"REG_a" \n\t" // i
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2316 "xor %%"REG_b", %%"REG_b" \n\t" // xx
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2317 "xorl %%ecx, %%ecx \n\t" // 2*xalpha
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
2318 ".balign 16 \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2319 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2320 "movzbl (%0, %%"REG_b"), %%edi \n\t" //src[xx]
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2321 "movzbl 1(%0, %%"REG_b"), %%esi \n\t" //src[xx+1]
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2322 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx]
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2323 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2324 "shll $16, %%edi \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2325 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2326 "mov %1, %%"REG_D" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2327 "shrl $9, %%esi \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2328 "movw %%si, (%%"REG_D", %%"REG_a", 2)\n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2329 "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2330 "adc %3, %%"REG_b" \n\t" //xx+= xInc>>8 + carry
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2331
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2332 "movzbl (%0, %%"REG_b"), %%edi \n\t" //src[xx]
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2333 "movzbl 1(%0, %%"REG_b"), %%esi \n\t" //src[xx+1]
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2334 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx]
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2335 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2336 "shll $16, %%edi \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2337 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2338 "mov %1, %%"REG_D" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2339 "shrl $9, %%esi \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2340 "movw %%si, 2(%%"REG_D", %%"REG_a", 2)\n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2341 "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2342 "adc %3, %%"REG_b" \n\t" //xx+= xInc>>8 + carry
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2343
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2344
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2345 "add $2, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2346 "cmp %2, %%"REG_a" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2347 " jb 1b \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2348
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2349
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2350 :: "r" (src), "m" (dst), "m" (dstWidth), "m" (xInc>>16), "m" (xInc&0xFFFF)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2351 : "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2352 );
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2353 #ifdef HAVE_MMX2
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2354 } //if MMX2 can't be used
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2355 #endif
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2356 #else
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2357 int i;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2358 unsigned int xpos=0;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2359 for(i=0;i<dstWidth;i++)
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2360 {
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2361 register unsigned int xx=xpos>>16;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2362 register unsigned int xalpha=(xpos&0xFFFF)>>9;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2363 dst[i]= (src[xx]<<7) + (src[xx+1] - src[xx])*xalpha;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2364 xpos+=xInc;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2365 }
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2366 #endif
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2367 }
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2368 }
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2369
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2370 inline static void RENAME(hcscale)(uint16_t *dst, int dstWidth, uint8_t *src1, uint8_t *src2,
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2371 int srcW, int xInc, int flags, int canMMX2BeUsed, int16_t *hChrFilter,
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2372 int16_t *hChrFilterPos, int hChrFilterSize, void *funnyUVCode,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2373 int srcFormat, uint8_t *formatConvBuffer, int16_t *mmx2Filter,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2374 int32_t *mmx2FilterPos)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2375 {
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2376 if(srcFormat==IMGFMT_YUY2)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2377 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2378 RENAME(yuy2ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2379 src1= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2380 src2= formatConvBuffer+2048;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2381 }
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2382 else if(srcFormat==IMGFMT_UYVY)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2383 {
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2384 RENAME(uyvyToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2385 src1= formatConvBuffer;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2386 src2= formatConvBuffer+2048;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2387 }
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2388 else if(srcFormat==IMGFMT_BGR32)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2389 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2390 RENAME(bgr32ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2391 src1= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2392 src2= formatConvBuffer+2048;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2393 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2394 else if(srcFormat==IMGFMT_BGR24)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2395 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2396 RENAME(bgr24ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2397 src1= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2398 src2= formatConvBuffer+2048;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2399 }
4578
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2400 else if(srcFormat==IMGFMT_BGR16)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2401 {
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2402 RENAME(bgr16ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2403 src1= formatConvBuffer;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2404 src2= formatConvBuffer+2048;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2405 }
4580
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2406 else if(srcFormat==IMGFMT_BGR15)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2407 {
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2408 RENAME(bgr15ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2409 src1= formatConvBuffer;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2410 src2= formatConvBuffer+2048;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2411 }
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2412 else if(srcFormat==IMGFMT_RGB32)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2413 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2414 RENAME(rgb32ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2415 src1= formatConvBuffer;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2416 src2= formatConvBuffer+2048;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2417 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2418 else if(srcFormat==IMGFMT_RGB24)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2419 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2420 RENAME(rgb24ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2421 src1= formatConvBuffer;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2422 src2= formatConvBuffer+2048;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2423 }
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
2424 else if(isGray(srcFormat))
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
2425 {
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
2426 return;
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
2427 }
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2428
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2429 #ifdef HAVE_MMX
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2430 // use the new MMX scaler if the mmx2 can't be used (its faster than the x86asm one)
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2431 if(!(flags&SWS_FAST_BILINEAR) || (!canMMX2BeUsed))
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2432 #else
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2433 if(!(flags&SWS_FAST_BILINEAR))
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2434 #endif
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2435 {
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2436 RENAME(hScale)(dst , dstWidth, src1, srcW, xInc, hChrFilter, hChrFilterPos, hChrFilterSize);
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2437 RENAME(hScale)(dst+2048, dstWidth, src2, srcW, xInc, hChrFilter, hChrFilterPos, hChrFilterSize);
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2438 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2439 else // Fast Bilinear upscale / crap downscale
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2440 {
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2441 #if defined(ARCH_X86) || defined(ARCH_X86_64)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2442 #ifdef HAVE_MMX2
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2443 int i;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2444 if(canMMX2BeUsed)
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2445 {
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2446 asm volatile(
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2447 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2448 "mov %0, %%"REG_c" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2449 "mov %1, %%"REG_D" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2450 "mov %2, %%"REG_d" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2451 "mov %3, %%"REG_b" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2452 "xor %%"REG_a", %%"REG_a" \n\t" // i
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2453 PREFETCH" (%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2454 PREFETCH" 32(%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2455 PREFETCH" 64(%%"REG_c") \n\t"
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2456
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2457 #ifdef ARCH_X86_64
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2458
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2459 #define FUNNY_UV_CODE \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2460 "movl (%%"REG_b"), %%esi \n\t"\
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2461 "call *%4 \n\t"\
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2462 "movl (%%"REG_b", %%"REG_a"), %%esi\n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2463 "add %%"REG_S", %%"REG_c" \n\t"\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2464 "add %%"REG_a", %%"REG_D" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2465 "xor %%"REG_a", %%"REG_a" \n\t"\
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2466
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2467 #else
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2468
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2469 #define FUNNY_UV_CODE \
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2470 "movl (%%"REG_b"), %%esi \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2471 "call *%4 \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2472 "addl (%%"REG_b", %%"REG_a"), %%"REG_c"\n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2473 "add %%"REG_a", %%"REG_D" \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2474 "xor %%"REG_a", %%"REG_a" \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2475
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2476 #endif
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2477
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2478 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2479 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2480 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2481 FUNNY_UV_CODE
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2482 "xor %%"REG_a", %%"REG_a" \n\t" // i
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2483 "mov %5, %%"REG_c" \n\t" // src
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2484 "mov %1, %%"REG_D" \n\t" // buf1
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2485 "add $4096, %%"REG_D" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2486 PREFETCH" (%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2487 PREFETCH" 32(%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2488 PREFETCH" 64(%%"REG_c") \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2489
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2490 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2491 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2492 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2493 FUNNY_UV_CODE
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2494
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2495 :: "m" (src1), "m" (dst), "m" (mmx2Filter), "m" (mmx2FilterPos),
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2496 "m" (funnyUVCode), "m" (src2)
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2497 : "%"REG_a, "%"REG_b, "%"REG_c, "%"REG_d, "%"REG_S, "%"REG_D
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2498 );
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2499 for(i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2500 {
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2501 // printf("%d %d %d\n", dstWidth, i, srcW);
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2502 dst[i] = src1[srcW-1]*128;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2503 dst[i+2048] = src2[srcW-1]*128;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2504 }
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2505 }
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2506 else
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2507 {
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2508 #endif
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2509 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2510 "xor %%"REG_a", %%"REG_a" \n\t" // i
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2511 "xor %%"REG_b", %%"REG_b" \n\t" // xx
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2512 "xorl %%ecx, %%ecx \n\t" // 2*xalpha
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
2513 ".balign 16 \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2514 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2515 "mov %0, %%"REG_S" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2516 "movzbl (%%"REG_S", %%"REG_b"), %%edi \n\t" //src[xx]
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2517 "movzbl 1(%%"REG_S", %%"REG_b"), %%esi \n\t" //src[xx+1]
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2518 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx]
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2519 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2520 "shll $16, %%edi \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2521 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2522 "mov %1, %%"REG_D" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2523 "shrl $9, %%esi \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2524 "movw %%si, (%%"REG_d", %%"REG_a", 2)\n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2525
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2526 "movzbl (%5, %%"REG_b"), %%edi \n\t" //src[xx]
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2527 "movzbl 1(%5, %%"REG_b"), %%esi \n\t" //src[xx+1]
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2528 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx]
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2529 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2530 "shll $16, %%edi \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2531 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2532 "mov %1, %%"REG_D" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2533 "shrl $9, %%esi \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2534 "movw %%si, 4096(%%"REG_D", %%"REG_a", 2)\n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2535
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2536 "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2537 "adc %3, %%"REG_b" \n\t" //xx+= xInc>>8 + carry
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2538 "add $1, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2539 "cmp %2, %%"REG_a" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2540 " jb 1b \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2541
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2542 :: "m" (src1), "m" (dst), "m" ((long)dstWidth), "m" ((long)(xInc>>16)), "m" ((xInc&0xFFFF)),
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2543 "r" (src2)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2544 : "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2545 );
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2546 #ifdef HAVE_MMX2
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2547 } //if MMX2 can't be used
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2548 #endif
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2549 #else
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2550 int i;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2551 unsigned int xpos=0;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2552 for(i=0;i<dstWidth;i++)
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2553 {
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2554 register unsigned int xx=xpos>>16;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2555 register unsigned int xalpha=(xpos&0xFFFF)>>9;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2556 dst[i]=(src1[xx]*(xalpha^127)+src1[xx+1]*xalpha);
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2557 dst[i+2048]=(src2[xx]*(xalpha^127)+src2[xx+1]*xalpha);
2566
a350d8bed636 bugfixes
michael
parents: 2540
diff changeset
2558 /* slower
a350d8bed636 bugfixes
michael
parents: 2540
diff changeset
2559 dst[i]= (src1[xx]<<7) + (src1[xx+1] - src1[xx])*xalpha;
a350d8bed636 bugfixes
michael
parents: 2540
diff changeset
2560 dst[i+2048]=(src2[xx]<<7) + (src2[xx+1] - src2[xx])*xalpha;
a350d8bed636 bugfixes
michael
parents: 2540
diff changeset
2561 */
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2562 xpos+=xInc;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2563 }
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2564 #endif
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2565 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2566 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2567
9499
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
2568 static int RENAME(swScale)(SwsContext *c, uint8_t* src[], int srcStride[], int srcSliceY,
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
2569 int srcSliceH, uint8_t* dst[], int dstStride[]){
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2570
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2571 /* load a few things into local vars to make the code more readable? and faster */
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2572 const int srcW= c->srcW;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2573 const int dstW= c->dstW;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2574 const int dstH= c->dstH;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2575 const int chrDstW= c->chrDstW;
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2576 const int chrSrcW= c->chrSrcW;
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2577 const int lumXInc= c->lumXInc;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2578 const int chrXInc= c->chrXInc;
4295
67c56df76a44 copyright(swscaler) = GPL
michael
parents: 4290
diff changeset
2579 const int dstFormat= c->dstFormat;
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
2580 const int srcFormat= c->srcFormat;
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2581 const int flags= c->flags;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2582 const int canMMX2BeUsed= c->canMMX2BeUsed;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2583 int16_t *vLumFilterPos= c->vLumFilterPos;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2584 int16_t *vChrFilterPos= c->vChrFilterPos;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2585 int16_t *hLumFilterPos= c->hLumFilterPos;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2586 int16_t *hChrFilterPos= c->hChrFilterPos;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2587 int16_t *vLumFilter= c->vLumFilter;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2588 int16_t *vChrFilter= c->vChrFilter;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2589 int16_t *hLumFilter= c->hLumFilter;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2590 int16_t *hChrFilter= c->hChrFilter;
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
2591 int32_t *lumMmxFilter= c->lumMmxFilter;
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
2592 int32_t *chrMmxFilter= c->chrMmxFilter;
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2593 const int vLumFilterSize= c->vLumFilterSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2594 const int vChrFilterSize= c->vChrFilterSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2595 const int hLumFilterSize= c->hLumFilterSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2596 const int hChrFilterSize= c->hChrFilterSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2597 int16_t **lumPixBuf= c->lumPixBuf;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2598 int16_t **chrPixBuf= c->chrPixBuf;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2599 const int vLumBufSize= c->vLumBufSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2600 const int vChrBufSize= c->vChrBufSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2601 uint8_t *funnyYCode= c->funnyYCode;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2602 uint8_t *funnyUVCode= c->funnyUVCode;
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2603 uint8_t *formatConvBuffer= c->formatConvBuffer;
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2604 const int chrSrcSliceY= srcSliceY >> c->chrSrcVSubSample;
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2605 const int chrSrcSliceH= -((-srcSliceH) >> c->chrSrcVSubSample);
9494
543ab3909b78 sws_ prefix, more seperation between internal & external swscaler API
michael
parents: 9476
diff changeset
2606 int lastDstY;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2607
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2608 /* vars whch will change and which we need to storw back in the context */
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2609 int dstY= c->dstY;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2610 int lumBufIndex= c->lumBufIndex;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2611 int chrBufIndex= c->chrBufIndex;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2612 int lastInLumBuf= c->lastInLumBuf;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2613 int lastInChrBuf= c->lastInChrBuf;
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2614
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2615 if(isPacked(c->srcFormat)){
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2616 src[0]=
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2617 src[1]=
9499
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
2618 src[2]= src[0];
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2619 srcStride[0]=
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2620 srcStride[1]=
9499
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
2621 srcStride[2]= srcStride[0];
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2622 }
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2623 srcStride[1]<<= c->vChrDrop;
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2624 srcStride[2]<<= c->vChrDrop;
4419
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2625
6517
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2626 // printf("swscale %X %X %X -> %X %X %X\n", (int)src[0], (int)src[1], (int)src[2],
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2627 // (int)dst[0], (int)dst[1], (int)dst[2]);
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2628
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2629 #if 0 //self test FIXME move to a vfilter or something
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2630 {
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2631 static volatile int i=0;
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2632 i++;
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2633 if(srcFormat==IMGFMT_YV12 && i==1 && srcSliceH>= c->srcH)
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2634 selfTest(src, srcStride, c->srcW, c->srcH);
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2635 i--;
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2636 }
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2637 #endif
4554
16fdb694cf13 swScale internally uses yuv2rgb now if possible
michael
parents: 4481
diff changeset
2638
16fdb694cf13 swScale internally uses yuv2rgb now if possible
michael
parents: 4481
diff changeset
2639 //printf("sws Strides:%d %d %d -> %d %d %d\n", srcStride[0],srcStride[1],srcStride[2],
16fdb694cf13 swScale internally uses yuv2rgb now if possible
michael
parents: 4481
diff changeset
2640 //dstStride[0],dstStride[1],dstStride[2]);
4419
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2641
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2642 if(dstStride[0]%8 !=0 || dstStride[1]%8 !=0 || dstStride[2]%8 !=0)
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2643 {
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2644 static int firstTime=1; //FIXME move this into the context perhaps
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2645 if(flags & SWS_PRINT_INFO && firstTime)
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2646 {
9970
9deb7e948fa6 killed an mp_msg occurance
alex
parents: 9921
diff changeset
2647 MSG_WARN("SwScaler: Warning: dstStride is not aligned!\n"
4419
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2648 "SwScaler: ->cannot do aligned memory acesses anymore\n");
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2649 firstTime=0;
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2650 }
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2651 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2652
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2653 /* Note the user might start scaling the picture in the middle so this will not get executed
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2654 this is not really intended but works currently, so ppl might do it */
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2655 if(srcSliceY ==0){
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2656 lumBufIndex=0;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2657 chrBufIndex=0;
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2658 dstY=0;
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2659 lastInLumBuf= -1;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2660 lastInChrBuf= -1;
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2661 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2662
9494
543ab3909b78 sws_ prefix, more seperation between internal & external swscaler API
michael
parents: 9476
diff changeset
2663 lastDstY= dstY;
543ab3909b78 sws_ prefix, more seperation between internal & external swscaler API
michael
parents: 9476
diff changeset
2664
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2665 for(;dstY < dstH; dstY++){
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2666 unsigned char *dest =dst[0]+dstStride[0]*dstY;
6520
f9a1870bc4a5 cleanup
michael
parents: 6517
diff changeset
2667 const int chrDstY= dstY>>c->chrDstVSubSample;
f9a1870bc4a5 cleanup
michael
parents: 6517
diff changeset
2668 unsigned char *uDest=dst[1]+dstStride[1]*chrDstY;
f9a1870bc4a5 cleanup
michael
parents: 6517
diff changeset
2669 unsigned char *vDest=dst[2]+dstStride[2]*chrDstY;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2670
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2671 const int firstLumSrcY= vLumFilterPos[dstY]; //First line needed as input
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2672 const int firstChrSrcY= vChrFilterPos[chrDstY]; //First line needed as input
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2673 const int lastLumSrcY= firstLumSrcY + vLumFilterSize -1; // Last line needed as input
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2674 const int lastChrSrcY= firstChrSrcY + vChrFilterSize -1; // Last line needed as input
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2675
11122
c552fe6acbaa rounding fixes
michael
parents: 11000
diff changeset
2676 //printf("dstY:%d dstH:%d firstLumSrcY:%d lastInLumBuf:%d vLumBufSize: %d vChrBufSize: %d slice: %d %d vLumFilterSize: %d firstChrSrcY: %d vChrFilterSize: %d c->chrSrcVSubSample: %d\n",
c552fe6acbaa rounding fixes
michael
parents: 11000
diff changeset
2677 // dstY, dstH, firstLumSrcY, lastInLumBuf, vLumBufSize, vChrBufSize, srcSliceY, srcSliceH, vLumFilterSize, firstChrSrcY, vChrFilterSize, c->chrSrcVSubSample);
4290
1f8ceb12284d general convolution filtering of the source picture
michael
parents: 4276
diff changeset
2678 //handle holes (FAST_BILINEAR & weird filters)
1f8ceb12284d general convolution filtering of the source picture
michael
parents: 4276
diff changeset
2679 if(firstLumSrcY > lastInLumBuf) lastInLumBuf= firstLumSrcY-1;
1f8ceb12284d general convolution filtering of the source picture
michael
parents: 4276
diff changeset
2680 if(firstChrSrcY > lastInChrBuf) lastInChrBuf= firstChrSrcY-1;
1f8ceb12284d general convolution filtering of the source picture
michael
parents: 4276
diff changeset
2681 //printf("%d %d %d\n", firstChrSrcY, lastInChrBuf, vChrBufSize);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2682 ASSERT(firstLumSrcY >= lastInLumBuf - vLumBufSize + 1)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2683 ASSERT(firstChrSrcY >= lastInChrBuf - vChrBufSize + 1)
2216
9da2a0515184 software yv12->rgb scaler - separated from fsdga
arpi
parents:
diff changeset
2684
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2685 // Do we have enough lines in this slice to output the dstY line
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2686 if(lastLumSrcY < srcSliceY + srcSliceH && lastChrSrcY < -((-srcSliceY - srcSliceH)>>c->chrSrcVSubSample))
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2687 {
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2688 //Do horizontal scaling
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2689 while(lastInLumBuf < lastLumSrcY)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2690 {
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2691 uint8_t *s= src[0]+(lastInLumBuf + 1 - srcSliceY)*srcStride[0];
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2692 lumBufIndex++;
4290
1f8ceb12284d general convolution filtering of the source picture
michael
parents: 4276
diff changeset
2693 // printf("%d %d %d %d\n", lumBufIndex, vLumBufSize, lastInLumBuf, lastLumSrcY);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2694 ASSERT(lumBufIndex < 2*vLumBufSize)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2695 ASSERT(lastInLumBuf + 1 - srcSliceY < srcSliceH)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2696 ASSERT(lastInLumBuf + 1 - srcSliceY >= 0)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2697 // printf("%d %d\n", lumBufIndex, vLumBufSize);
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2698 RENAME(hyscale)(lumPixBuf[ lumBufIndex ], dstW, s, srcW, lumXInc,
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2699 flags, canMMX2BeUsed, hLumFilter, hLumFilterPos, hLumFilterSize,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2700 funnyYCode, c->srcFormat, formatConvBuffer,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2701 c->lumMmx2Filter, c->lumMmx2FilterPos);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2702 lastInLumBuf++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2703 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2704 while(lastInChrBuf < lastChrSrcY)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2705 {
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2706 uint8_t *src1= src[1]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[1];
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2707 uint8_t *src2= src[2]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[2];
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2708 chrBufIndex++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2709 ASSERT(chrBufIndex < 2*vChrBufSize)
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2710 ASSERT(lastInChrBuf + 1 - chrSrcSliceY < (chrSrcSliceH))
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2711 ASSERT(lastInChrBuf + 1 - chrSrcSliceY >= 0)
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2712 //FIXME replace parameters through context struct (some at least)
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
2713
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
2714 if(!(isGray(srcFormat) || isGray(dstFormat)))
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2715 RENAME(hcscale)(chrPixBuf[ chrBufIndex ], chrDstW, src1, src2, chrSrcW, chrXInc,
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2716 flags, canMMX2BeUsed, hChrFilter, hChrFilterPos, hChrFilterSize,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2717 funnyUVCode, c->srcFormat, formatConvBuffer,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2718 c->chrMmx2Filter, c->chrMmx2FilterPos);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2719 lastInChrBuf++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2720 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2721 //wrap buf index around to stay inside the ring buffer
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2722 if(lumBufIndex >= vLumBufSize ) lumBufIndex-= vLumBufSize;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2723 if(chrBufIndex >= vChrBufSize ) chrBufIndex-= vChrBufSize;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2724 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2725 else // not enough lines left in this slice -> load the rest in the buffer
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2726 {
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2727 /* printf("%d %d Last:%d %d LastInBuf:%d %d Index:%d %d Y:%d FSize: %d %d BSize: %d %d\n",
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2728 firstChrSrcY,firstLumSrcY,lastChrSrcY,lastLumSrcY,
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2729 lastInChrBuf,lastInLumBuf,chrBufIndex,lumBufIndex,dstY,vChrFilterSize,vLumFilterSize,
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2730 vChrBufSize, vLumBufSize);*/
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2731
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2732 //Do horizontal scaling
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2733 while(lastInLumBuf+1 < srcSliceY + srcSliceH)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2734 {
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2735 uint8_t *s= src[0]+(lastInLumBuf + 1 - srcSliceY)*srcStride[0];
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2736 lumBufIndex++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2737 ASSERT(lumBufIndex < 2*vLumBufSize)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2738 ASSERT(lastInLumBuf + 1 - srcSliceY < srcSliceH)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2739 ASSERT(lastInLumBuf + 1 - srcSliceY >= 0)
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2740 RENAME(hyscale)(lumPixBuf[ lumBufIndex ], dstW, s, srcW, lumXInc,
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2741 flags, canMMX2BeUsed, hLumFilter, hLumFilterPos, hLumFilterSize,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2742 funnyYCode, c->srcFormat, formatConvBuffer,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2743 c->lumMmx2Filter, c->lumMmx2FilterPos);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2744 lastInLumBuf++;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2745 }
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2746 while(lastInChrBuf+1 < (chrSrcSliceY + chrSrcSliceH))
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2747 {
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2748 uint8_t *src1= src[1]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[1];
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2749 uint8_t *src2= src[2]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[2];
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2750 chrBufIndex++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2751 ASSERT(chrBufIndex < 2*vChrBufSize)
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2752 ASSERT(lastInChrBuf + 1 - chrSrcSliceY < chrSrcSliceH)
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2753 ASSERT(lastInChrBuf + 1 - chrSrcSliceY >= 0)
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
2754
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
2755 if(!(isGray(srcFormat) || isGray(dstFormat)))
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2756 RENAME(hcscale)(chrPixBuf[ chrBufIndex ], chrDstW, src1, src2, chrSrcW, chrXInc,
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2757 flags, canMMX2BeUsed, hChrFilter, hChrFilterPos, hChrFilterSize,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2758 funnyUVCode, c->srcFormat, formatConvBuffer,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2759 c->chrMmx2Filter, c->chrMmx2FilterPos);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2760 lastInChrBuf++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2761 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2762 //wrap buf index around to stay inside the ring buffer
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2763 if(lumBufIndex >= vLumBufSize ) lumBufIndex-= vLumBufSize;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2764 if(chrBufIndex >= vChrBufSize ) chrBufIndex-= vChrBufSize;
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2765 break; //we can't output a dstY line so let's try with the next slice
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2766 }
2264
7851375ea156 increased precission of s_xinc s_xinc2 (needed for the mmx2 bugfix)
michael
parents: 2237
diff changeset
2767
2748
01dbf100b4f8 better dithering
michael
parents: 2730
diff changeset
2768 #ifdef HAVE_MMX
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2769 b5Dither= dither8[dstY&1];
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2770 g6Dither= dither4[dstY&1];
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2771 g5Dither= dither8[dstY&1];
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2772 r5Dither= dither8[(dstY+1)&1];
2748
01dbf100b4f8 better dithering
michael
parents: 2730
diff changeset
2773 #endif
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2774 if(dstY < dstH-2)
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2775 {
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2776 int16_t **lumSrcPtr= lumPixBuf + lumBufIndex + firstLumSrcY - lastInLumBuf + vLumBufSize;
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2777 int16_t **chrSrcPtr= chrPixBuf + chrBufIndex + firstChrSrcY - lastInChrBuf + vChrBufSize;
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2778 #ifdef HAVE_MMX
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2779 int i;
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2780 for(i=0; i<vLumFilterSize; i++)
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2781 {
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2782 lumMmxFilter[4*i+0]= (int32_t)lumSrcPtr[i];
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2783 lumMmxFilter[4*i+2]=
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2784 lumMmxFilter[4*i+3]=
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2785 ((uint16_t)vLumFilter[dstY*vLumFilterSize + i])*0x10001;
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2786 }
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2787 for(i=0; i<vChrFilterSize; i++)
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2788 {
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2789 chrMmxFilter[4*i+0]= (int32_t)chrSrcPtr[i];
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2790 chrMmxFilter[4*i+2]=
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2791 chrMmxFilter[4*i+3]=
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2792 ((uint16_t)vChrFilter[chrDstY*vChrFilterSize + i])*0x10001;
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2793 }
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2794 #endif
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
2795 if(isPlanarYUV(dstFormat) || isGray(dstFormat)) //YV12 like
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2796 {
7351
064ada190b6c fixing y422p output
michael
parents: 6679
diff changeset
2797 const int chrSkipMask= (1<<c->chrDstVSubSample)-1;
064ada190b6c fixing y422p output
michael
parents: 6679
diff changeset
2798 if((dstY&chrSkipMask) || isGray(dstFormat)) uDest=vDest= NULL; //FIXME split functions in lumi / chromi
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2799 if(vLumFilterSize == 1 && vChrFilterSize == 1) // Unscaled YV12
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2800 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2801 int16_t *lumBuf = lumPixBuf[0];
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2802 int16_t *chrBuf= chrPixBuf[0];
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2803 RENAME(yuv2yuv1)(lumBuf, chrBuf, dest, uDest, vDest, dstW, chrDstW);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2804 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2805 else //General YV12
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2806 {
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
2807 RENAME(yuv2yuvX)(c,
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2808 vLumFilter+dstY*vLumFilterSize , lumSrcPtr, vLumFilterSize,
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2809 vChrFilter+chrDstY*vChrFilterSize, chrSrcPtr, vChrFilterSize,
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2810 dest, uDest, vDest, dstW, chrDstW);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2811 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2812 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2813 else
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2814 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2815 ASSERT(lumSrcPtr + vLumFilterSize - 1 < lumPixBuf + vLumBufSize*2);
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2816 ASSERT(chrSrcPtr + vChrFilterSize - 1 < chrPixBuf + vChrBufSize*2);
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2817 if(vLumFilterSize == 1 && vChrFilterSize == 2) //Unscaled RGB
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2818 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2819 int chrAlpha= vChrFilter[2*dstY+1];
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
2820 RENAME(yuv2packed1)(c, *lumSrcPtr, *chrSrcPtr, *(chrSrcPtr+1),
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
2821 dest, dstW, chrAlpha, dstFormat, flags, dstY);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2822 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2823 else if(vLumFilterSize == 2 && vChrFilterSize == 2) //BiLinear Upscale RGB
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2824 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2825 int lumAlpha= vLumFilter[2*dstY+1];
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2826 int chrAlpha= vChrFilter[2*dstY+1];
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
2827 RENAME(yuv2packed2)(c, *lumSrcPtr, *(lumSrcPtr+1), *chrSrcPtr, *(chrSrcPtr+1),
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
2828 dest, dstW, lumAlpha, chrAlpha, dstY);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2829 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2830 else //General RGB
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2831 {
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
2832 RENAME(yuv2packedX)(c,
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2833 vLumFilter+dstY*vLumFilterSize, lumSrcPtr, vLumFilterSize,
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2834 vChrFilter+dstY*vChrFilterSize, chrSrcPtr, vChrFilterSize,
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
2835 dest, dstW, dstY);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2836 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2837 }
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2838 }
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2839 else // hmm looks like we can't use MMX here without overwriting this array's tail
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2840 {
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2841 int16_t **lumSrcPtr= lumPixBuf + lumBufIndex + firstLumSrcY - lastInLumBuf + vLumBufSize;
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2842 int16_t **chrSrcPtr= chrPixBuf + chrBufIndex + firstChrSrcY - lastInChrBuf + vChrBufSize;
6615
ab152b72e359 last line messed up in Y800 bugfix
michael
parents: 6578
diff changeset
2843 if(isPlanarYUV(dstFormat) || isGray(dstFormat)) //YV12
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2844 {
7351
064ada190b6c fixing y422p output
michael
parents: 6679
diff changeset
2845 const int chrSkipMask= (1<<c->chrDstVSubSample)-1;
064ada190b6c fixing y422p output
michael
parents: 6679
diff changeset
2846 if((dstY&chrSkipMask) || isGray(dstFormat)) uDest=vDest= NULL; //FIXME split functions in lumi / chromi
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2847 yuv2yuvXinC(
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2848 vLumFilter+dstY*vLumFilterSize , lumSrcPtr, vLumFilterSize,
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2849 vChrFilter+chrDstY*vChrFilterSize, chrSrcPtr, vChrFilterSize,
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2850 dest, uDest, vDest, dstW, chrDstW);
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2851 }
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2852 else
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2853 {
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2854 ASSERT(lumSrcPtr + vLumFilterSize - 1 < lumPixBuf + vLumBufSize*2);
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2855 ASSERT(chrSrcPtr + vChrFilterSize - 1 < chrPixBuf + vChrBufSize*2);
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
2856 yuv2packedXinC(c,
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2857 vLumFilter+dstY*vLumFilterSize, lumSrcPtr, vLumFilterSize,
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2858 vChrFilter+dstY*vChrFilterSize, chrSrcPtr, vChrFilterSize,
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
2859 dest, dstW, dstY);
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2860 }
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2861 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2862 }
2534
cc9d3fd626f0 patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents: 2521
diff changeset
2863
cc9d3fd626f0 patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents: 2521
diff changeset
2864 #ifdef HAVE_MMX
cc9d3fd626f0 patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents: 2521
diff changeset
2865 __asm __volatile(SFENCE:::"memory");
2566
a350d8bed636 bugfixes
michael
parents: 2540
diff changeset
2866 __asm __volatile(EMMS:::"memory");
2534
cc9d3fd626f0 patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents: 2521
diff changeset
2867 #endif
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2868 /* store changed local vars back in the context */
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2869 c->dstY= dstY;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2870 c->lumBufIndex= lumBufIndex;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2871 c->chrBufIndex= chrBufIndex;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2872 c->lastInLumBuf= lastInLumBuf;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2873 c->lastInChrBuf= lastInChrBuf;
9494
543ab3909b78 sws_ prefix, more seperation between internal & external swscaler API
michael
parents: 9476
diff changeset
2874
543ab3909b78 sws_ prefix, more seperation between internal & external swscaler API
michael
parents: 9476
diff changeset
2875 return dstY - lastDstY;
3641
33c560ffd3dc minor bugfixes (noone noticed them)
michael
parents: 3352
diff changeset
2876 }