annotate postproc/swscale_template.c @ 17460:a263edfd5270

correcting sync version number
author kraymer
date Sun, 22 Jan 2006 16:03:29 +0000
parents 401b440a6d76
children fbf94ea858f1
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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1 /*
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2 Copyright (C) 2001-2003 Michael Niedermayer <michaelni@gmx.at>
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3
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4 This program is free software; you can redistribute it and/or modify
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5 it under the terms of the GNU General Public License as published by
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6 the Free Software Foundation; either version 2 of the License, or
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7 (at your option) any later version.
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8
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67c56df76a44 copyright(swscaler) = GPL
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9 This program is distributed in the hope that it will be useful,
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10 but WITHOUT ANY WARRANTY; without even the implied warranty of
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11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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12 GNU General Public License for more details.
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13
67c56df76a44 copyright(swscaler) = GPL
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14 You should have received a copy of the GNU General Public License
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15 along with this program; if not, write to the Free Software
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16 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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17 */
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18
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19 #undef REAL_MOVNTQ
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20 #undef MOVNTQ
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21 #undef PAVGB
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22 #undef PREFETCH
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23 #undef PREFETCHW
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24 #undef EMMS
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25 #undef SFENCE
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26
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27 #ifdef HAVE_3DNOW
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28 /* On K6 femms is faster of emms. On K7 femms is directly mapped on emms. */
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29 #define EMMS "femms"
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30 #else
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31 #define EMMS "emms"
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32 #endif
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33
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34 #ifdef HAVE_3DNOW
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35 #define PREFETCH "prefetch"
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36 #define PREFETCHW "prefetchw"
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37 #elif defined ( HAVE_MMX2 )
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38 #define PREFETCH "prefetchnta"
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39 #define PREFETCHW "prefetcht0"
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40 #else
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41 #define PREFETCH "/nop"
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42 #define PREFETCHW "/nop"
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43 #endif
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44
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45 #ifdef HAVE_MMX2
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46 #define SFENCE "sfence"
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47 #else
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48 #define SFENCE "/nop"
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49 #endif
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50
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51 #ifdef HAVE_MMX2
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52 #define PAVGB(a,b) "pavgb " #a ", " #b " \n\t"
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53 #elif defined (HAVE_3DNOW)
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54 #define PAVGB(a,b) "pavgusb " #a ", " #b " \n\t"
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55 #endif
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56
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57 #ifdef HAVE_MMX2
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58 #define REAL_MOVNTQ(a,b) "movntq " #a ", " #b " \n\t"
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59 #else
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60 #define REAL_MOVNTQ(a,b) "movq " #a ", " #b " \n\t"
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61 #endif
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62 #define MOVNTQ(a,b) REAL_MOVNTQ(a,b)
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63
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64 #ifdef HAVE_ALTIVEC
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65 #include "swscale_altivec_template.c"
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66 #endif
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67
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68 #define YSCALEYUV2YV12X(x, offset) \
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69 "xor %%"REG_a", %%"REG_a" \n\t"\
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70 "movq "VROUNDER_OFFSET"(%0), %%mm3\n\t"\
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71 "movq %%mm3, %%mm4 \n\t"\
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72 "lea " offset "(%0), %%"REG_d" \n\t"\
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73 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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74 ".balign 16 \n\t" /* FIXME Unroll? */\
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75 "1: \n\t"\
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76 "movq 8(%%"REG_d"), %%mm0 \n\t" /* filterCoeff */\
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77 "movq " #x "(%%"REG_S", %%"REG_a", 2), %%mm2\n\t" /* srcData */\
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78 "movq 8+" #x "(%%"REG_S", %%"REG_a", 2), %%mm5\n\t" /* srcData */\
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79 "add $16, %%"REG_d" \n\t"\
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80 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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81 "test %%"REG_S", %%"REG_S" \n\t"\
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82 "pmulhw %%mm0, %%mm2 \n\t"\
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83 "pmulhw %%mm0, %%mm5 \n\t"\
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84 "paddw %%mm2, %%mm3 \n\t"\
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85 "paddw %%mm5, %%mm4 \n\t"\
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86 " jnz 1b \n\t"\
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87 "psraw $3, %%mm3 \n\t"\
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88 "psraw $3, %%mm4 \n\t"\
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89 "packuswb %%mm4, %%mm3 \n\t"\
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90 MOVNTQ(%%mm3, (%1, %%REGa))\
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91 "add $8, %%"REG_a" \n\t"\
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92 "cmp %2, %%"REG_a" \n\t"\
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93 "movq "VROUNDER_OFFSET"(%0), %%mm3\n\t"\
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94 "movq %%mm3, %%mm4 \n\t"\
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95 "lea " offset "(%0), %%"REG_d" \n\t"\
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96 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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97 "jb 1b \n\t"
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98
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99 #define YSCALEYUV2YV121 \
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100 "mov %2, %%"REG_a" \n\t"\
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101 ".balign 16 \n\t" /* FIXME Unroll? */\
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102 "1: \n\t"\
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103 "movq (%0, %%"REG_a", 2), %%mm0 \n\t"\
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104 "movq 8(%0, %%"REG_a", 2), %%mm1\n\t"\
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105 "psraw $7, %%mm0 \n\t"\
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106 "psraw $7, %%mm1 \n\t"\
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107 "packuswb %%mm1, %%mm0 \n\t"\
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108 MOVNTQ(%%mm0, (%1, %%REGa))\
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109 "add $8, %%"REG_a" \n\t"\
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110 "jnc 1b \n\t"
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111
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112 /*
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113 :: "m" (-lumFilterSize), "m" (-chrFilterSize),
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114 "m" (lumMmxFilter+lumFilterSize*4), "m" (chrMmxFilter+chrFilterSize*4),
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115 "r" (dest), "m" (dstW),
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116 "m" (lumSrc+lumFilterSize), "m" (chrSrc+chrFilterSize)
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117 : "%eax", "%ebx", "%ecx", "%edx", "%esi"
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118 */
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119 #define YSCALEYUV2PACKEDX \
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120 "xor %%"REG_a", %%"REG_a" \n\t"\
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121 ".balign 16 \n\t"\
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122 "nop \n\t"\
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123 "1: \n\t"\
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124 "lea "CHR_MMX_FILTER_OFFSET"(%0), %%"REG_d"\n\t"\
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125 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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126 "movq "VROUNDER_OFFSET"(%0), %%mm3\n\t"\
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127 "movq %%mm3, %%mm4 \n\t"\
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128 ".balign 16 \n\t"\
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129 "2: \n\t"\
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130 "movq 8(%%"REG_d"), %%mm0 \n\t" /* filterCoeff */\
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131 "movq (%%"REG_S", %%"REG_a"), %%mm2 \n\t" /* UsrcData */\
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132 "movq 4096(%%"REG_S", %%"REG_a"), %%mm5 \n\t" /* VsrcData */\
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133 "add $16, %%"REG_d" \n\t"\
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134 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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135 "pmulhw %%mm0, %%mm2 \n\t"\
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136 "pmulhw %%mm0, %%mm5 \n\t"\
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137 "paddw %%mm2, %%mm3 \n\t"\
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138 "paddw %%mm5, %%mm4 \n\t"\
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139 "test %%"REG_S", %%"REG_S" \n\t"\
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140 " jnz 2b \n\t"\
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141 \
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142 "lea "LUM_MMX_FILTER_OFFSET"(%0), %%"REG_d"\n\t"\
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143 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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144 "movq "VROUNDER_OFFSET"(%0), %%mm1\n\t"\
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145 "movq %%mm1, %%mm7 \n\t"\
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146 ".balign 16 \n\t"\
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147 "2: \n\t"\
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148 "movq 8(%%"REG_d"), %%mm0 \n\t" /* filterCoeff */\
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149 "movq (%%"REG_S", %%"REG_a", 2), %%mm2 \n\t" /* Y1srcData */\
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150 "movq 8(%%"REG_S", %%"REG_a", 2), %%mm5 \n\t" /* Y2srcData */\
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151 "add $16, %%"REG_d" \n\t"\
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152 "mov (%%"REG_d"), %%"REG_S" \n\t"\
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153 "pmulhw %%mm0, %%mm2 \n\t"\
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154 "pmulhw %%mm0, %%mm5 \n\t"\
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155 "paddw %%mm2, %%mm1 \n\t"\
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156 "paddw %%mm5, %%mm7 \n\t"\
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157 "test %%"REG_S", %%"REG_S" \n\t"\
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parents: 3299
diff changeset
158 " jnz 2b \n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
159
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
160
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
161 #define YSCALEYUV2RGBX \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
162 YSCALEYUV2PACKEDX\
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
163 "psubw "U_OFFSET"(%0), %%mm3 \n\t" /* (U-128)8*/\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
164 "psubw "V_OFFSET"(%0), %%mm4 \n\t" /* (V-128)8*/\
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
165 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
166 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
167 "pmulhw "UG_COEFF"(%0), %%mm3 \n\t"\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
168 "pmulhw "VG_COEFF"(%0), %%mm4 \n\t"\
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
169 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
170 "pmulhw "UB_COEFF"(%0), %%mm2 \n\t"\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
171 "pmulhw "VR_COEFF"(%0), %%mm5 \n\t"\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
172 "psubw "Y_OFFSET"(%0), %%mm1 \n\t" /* 8(Y-16)*/\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
173 "psubw "Y_OFFSET"(%0), %%mm7 \n\t" /* 8(Y-16)*/\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
174 "pmulhw "Y_COEFF"(%0), %%mm1 \n\t"\
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
175 "pmulhw "Y_COEFF"(%0), %%mm7 \n\t"\
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
176 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
177 "paddw %%mm3, %%mm4 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
178 "movq %%mm2, %%mm0 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
179 "movq %%mm5, %%mm6 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
180 "movq %%mm4, %%mm3 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
181 "punpcklwd %%mm2, %%mm2 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
182 "punpcklwd %%mm5, %%mm5 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
183 "punpcklwd %%mm4, %%mm4 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
184 "paddw %%mm1, %%mm2 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
185 "paddw %%mm1, %%mm5 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
186 "paddw %%mm1, %%mm4 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
187 "punpckhwd %%mm0, %%mm0 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
188 "punpckhwd %%mm6, %%mm6 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
189 "punpckhwd %%mm3, %%mm3 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
190 "paddw %%mm7, %%mm0 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
191 "paddw %%mm7, %%mm6 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
192 "paddw %%mm7, %%mm3 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
193 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
194 "packuswb %%mm0, %%mm2 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
195 "packuswb %%mm6, %%mm5 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
196 "packuswb %%mm3, %%mm4 \n\t"\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
197 "pxor %%mm7, %%mm7 \n\t"
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
198 #if 0
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
199 #define FULL_YSCALEYUV2RGB \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
200 "pxor %%mm7, %%mm7 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
201 "movd %6, %%mm6 \n\t" /*yalpha1*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
202 "punpcklwd %%mm6, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
203 "punpcklwd %%mm6, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
204 "movd %7, %%mm5 \n\t" /*uvalpha1*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
205 "punpcklwd %%mm5, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
206 "punpcklwd %%mm5, %%mm5 \n\t"\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
207 "xor %%"REG_a", %%"REG_a" \n\t"\
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
208 ".balign 16 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
209 "1: \n\t"\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
210 "movq (%0, %%"REG_a", 2), %%mm0 \n\t" /*buf0[eax]*/\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
211 "movq (%1, %%"REG_a", 2), %%mm1 \n\t" /*buf1[eax]*/\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
212 "movq (%2, %%"REG_a",2), %%mm2 \n\t" /* uvbuf0[eax]*/\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
213 "movq (%3, %%"REG_a",2), %%mm3 \n\t" /* uvbuf1[eax]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
214 "psubw %%mm1, %%mm0 \n\t" /* buf0[eax] - buf1[eax]*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
215 "psubw %%mm3, %%mm2 \n\t" /* uvbuf0[eax] - uvbuf1[eax]*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
216 "pmulhw %%mm6, %%mm0 \n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
217 "pmulhw %%mm5, %%mm2 \n\t" /* (uvbuf0[eax] - uvbuf1[eax])uvalpha1>>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
218 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
219 "movq 4096(%2, %%"REG_a",2), %%mm4 \n\t" /* uvbuf0[eax+2048]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
220 "psraw $4, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
221 "paddw %%mm0, %%mm1 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
222 "movq 4096(%3, %%"REG_a",2), %%mm0 \n\t" /* uvbuf1[eax+2048]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
223 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax]uvalpha1 - uvbuf1[eax](1-uvalpha1)*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
224 "psubw %%mm0, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048]*/\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
225 "psubw "MANGLE(w80)", %%mm1 \n\t" /* 8(Y-16)*/\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
226 "psubw "MANGLE(w400)", %%mm3 \n\t" /* 8(U-128)*/\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
227 "pmulhw "MANGLE(yCoeff)", %%mm1 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
228 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
229 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
230 "pmulhw %%mm5, %%mm4 \n\t" /* (uvbuf0[eax+2048] - uvbuf1[eax+2048])uvalpha1>>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
231 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
232 "pmulhw "MANGLE(ubCoeff)", %%mm3\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
233 "psraw $4, %%mm0 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
234 "pmulhw "MANGLE(ugCoeff)", %%mm2\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
235 "paddw %%mm4, %%mm0 \n\t" /* uvbuf0[eax+2048]uvalpha1 - uvbuf1[eax+2048](1-uvalpha1)*/\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
236 "psubw "MANGLE(w400)", %%mm0 \n\t" /* (V-128)8*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
237 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
238 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
239 "movq %%mm0, %%mm4 \n\t" /* (V-128)8*/\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
240 "pmulhw "MANGLE(vrCoeff)", %%mm0\n\t"\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
241 "pmulhw "MANGLE(vgCoeff)", %%mm4\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
242 "paddw %%mm1, %%mm3 \n\t" /* B*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
243 "paddw %%mm1, %%mm0 \n\t" /* R*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
244 "packuswb %%mm3, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
245 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
246 "packuswb %%mm0, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
247 "paddw %%mm4, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
248 "paddw %%mm2, %%mm1 \n\t" /* G*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
249 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
250 "packuswb %%mm1, %%mm1 \n\t"
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
251 #endif
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
252
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
253 #define REAL_YSCALEYUV2PACKED(index, c) \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
254 "movq "CHR_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
255 "movq "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm1\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
256 "psraw $3, %%mm0 \n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
257 "psraw $3, %%mm1 \n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
258 "movq %%mm0, "CHR_MMX_FILTER_OFFSET"+8("#c")\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
259 "movq %%mm1, "LUM_MMX_FILTER_OFFSET"+8("#c")\n\t"\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
260 "xor "#index", "#index" \n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
261 ".balign 16 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
262 "1: \n\t"\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
263 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
264 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
265 "movq 4096(%2, "#index"), %%mm5 \n\t" /* uvbuf0[eax+2048]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
266 "movq 4096(%3, "#index"), %%mm4 \n\t" /* uvbuf1[eax+2048]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
267 "psubw %%mm3, %%mm2 \n\t" /* uvbuf0[eax] - uvbuf1[eax]*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
268 "psubw %%mm4, %%mm5 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048]*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
269 "movq "CHR_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
270 "pmulhw %%mm0, %%mm2 \n\t" /* (uvbuf0[eax] - uvbuf1[eax])uvalpha1>>16*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
271 "pmulhw %%mm0, %%mm5 \n\t" /* (uvbuf0[eax+2048] - uvbuf1[eax+2048])uvalpha1>>16*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
272 "psraw $7, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
273 "psraw $7, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
274 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax]uvalpha1 - uvbuf1[eax](1-uvalpha1)*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
275 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048]uvalpha1 - uvbuf1[eax+2048](1-uvalpha1)*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
276 "movq (%0, "#index", 2), %%mm0 \n\t" /*buf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
277 "movq (%1, "#index", 2), %%mm1 \n\t" /*buf1[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
278 "movq 8(%0, "#index", 2), %%mm6 \n\t" /*buf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
279 "movq 8(%1, "#index", 2), %%mm7 \n\t" /*buf1[eax]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
280 "psubw %%mm1, %%mm0 \n\t" /* buf0[eax] - buf1[eax]*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
281 "psubw %%mm7, %%mm6 \n\t" /* buf0[eax] - buf1[eax]*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
282 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
283 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm6\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
284 "psraw $7, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
285 "psraw $7, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
286 "paddw %%mm0, %%mm1 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
287 "paddw %%mm6, %%mm7 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
288
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
289 #define YSCALEYUV2PACKED(index, c) REAL_YSCALEYUV2PACKED(index, c)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
290
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
291 #define REAL_YSCALEYUV2RGB(index, c) \
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
292 "xor "#index", "#index" \n\t"\
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
293 ".balign 16 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
294 "1: \n\t"\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
295 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
296 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
297 "movq 4096(%2, "#index"), %%mm5\n\t" /* uvbuf0[eax+2048]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
298 "movq 4096(%3, "#index"), %%mm4\n\t" /* uvbuf1[eax+2048]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
299 "psubw %%mm3, %%mm2 \n\t" /* uvbuf0[eax] - uvbuf1[eax]*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
300 "psubw %%mm4, %%mm5 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048]*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
301 "movq "CHR_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
302 "pmulhw %%mm0, %%mm2 \n\t" /* (uvbuf0[eax] - uvbuf1[eax])uvalpha1>>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
303 "pmulhw %%mm0, %%mm5 \n\t" /* (uvbuf0[eax+2048] - uvbuf1[eax+2048])uvalpha1>>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
304 "psraw $4, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
305 "psraw $4, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
306 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax]uvalpha1 - uvbuf1[eax](1-uvalpha1)*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
307 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048]uvalpha1 - uvbuf1[eax+2048](1-uvalpha1)*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
308 "psubw "U_OFFSET"("#c"), %%mm3 \n\t" /* (U-128)8*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
309 "psubw "V_OFFSET"("#c"), %%mm4 \n\t" /* (V-128)8*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
310 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
311 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
312 "pmulhw "UG_COEFF"("#c"), %%mm3\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
313 "pmulhw "VG_COEFF"("#c"), %%mm4\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
314 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
315 "movq (%0, "#index", 2), %%mm0 \n\t" /*buf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
316 "movq (%1, "#index", 2), %%mm1 \n\t" /*buf1[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
317 "movq 8(%0, "#index", 2), %%mm6\n\t" /*buf0[eax]*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
318 "movq 8(%1, "#index", 2), %%mm7\n\t" /*buf1[eax]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
319 "psubw %%mm1, %%mm0 \n\t" /* buf0[eax] - buf1[eax]*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
320 "psubw %%mm7, %%mm6 \n\t" /* buf0[eax] - buf1[eax]*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
321 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
322 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm6\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
323 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
324 "psraw $4, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
325 "paddw %%mm0, %%mm1 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
326 "paddw %%mm6, %%mm7 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
327 "pmulhw "UB_COEFF"("#c"), %%mm2\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
328 "pmulhw "VR_COEFF"("#c"), %%mm5\n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
329 "psubw "Y_OFFSET"("#c"), %%mm1 \n\t" /* 8(Y-16)*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
330 "psubw "Y_OFFSET"("#c"), %%mm7 \n\t" /* 8(Y-16)*/\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
331 "pmulhw "Y_COEFF"("#c"), %%mm1 \n\t"\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
332 "pmulhw "Y_COEFF"("#c"), %%mm7 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
333 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
334 "paddw %%mm3, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
335 "movq %%mm2, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
336 "movq %%mm5, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
337 "movq %%mm4, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
338 "punpcklwd %%mm2, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
339 "punpcklwd %%mm5, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
340 "punpcklwd %%mm4, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
341 "paddw %%mm1, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
342 "paddw %%mm1, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
343 "paddw %%mm1, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
344 "punpckhwd %%mm0, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
345 "punpckhwd %%mm6, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
346 "punpckhwd %%mm3, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
347 "paddw %%mm7, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
348 "paddw %%mm7, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
349 "paddw %%mm7, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
350 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
351 "packuswb %%mm0, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
352 "packuswb %%mm6, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
353 "packuswb %%mm3, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
354 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
355 #define YSCALEYUV2RGB(index, c) REAL_YSCALEYUV2RGB(index, c)
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
356
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
357 #define REAL_YSCALEYUV2PACKED1(index, c) \
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
358 "xor "#index", "#index" \n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
359 ".balign 16 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
360 "1: \n\t"\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
361 "movq (%2, "#index"), %%mm3 \n\t" /* uvbuf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
362 "movq 4096(%2, "#index"), %%mm4 \n\t" /* uvbuf0[eax+2048]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
363 "psraw $7, %%mm3 \n\t" \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
364 "psraw $7, %%mm4 \n\t" \
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
365 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
366 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
367 "psraw $7, %%mm1 \n\t" \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
368 "psraw $7, %%mm7 \n\t" \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
369
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
370 #define YSCALEYUV2PACKED1(index, c) REAL_YSCALEYUV2PACKED1(index, c)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
371
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
372 #define REAL_YSCALEYUV2RGB1(index, c) \
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
373 "xor "#index", "#index" \n\t"\
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
374 ".balign 16 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
375 "1: \n\t"\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
376 "movq (%2, "#index"), %%mm3 \n\t" /* uvbuf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
377 "movq 4096(%2, "#index"), %%mm4 \n\t" /* uvbuf0[eax+2048]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
378 "psraw $4, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
379 "psraw $4, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
380 "psubw "U_OFFSET"("#c"), %%mm3 \n\t" /* (U-128)8*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
381 "psubw "V_OFFSET"("#c"), %%mm4 \n\t" /* (V-128)8*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
382 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
383 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
384 "pmulhw "UG_COEFF"("#c"), %%mm3\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
385 "pmulhw "VG_COEFF"("#c"), %%mm4\n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
386 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
387 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
388 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
389 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
390 "psraw $4, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
391 "pmulhw "UB_COEFF"("#c"), %%mm2\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
392 "pmulhw "VR_COEFF"("#c"), %%mm5\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
393 "psubw "Y_OFFSET"("#c"), %%mm1 \n\t" /* 8(Y-16)*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
394 "psubw "Y_OFFSET"("#c"), %%mm7 \n\t" /* 8(Y-16)*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
395 "pmulhw "Y_COEFF"("#c"), %%mm1 \n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
396 "pmulhw "Y_COEFF"("#c"), %%mm7 \n\t"\
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
397 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
398 "paddw %%mm3, %%mm4 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
399 "movq %%mm2, %%mm0 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
400 "movq %%mm5, %%mm6 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
401 "movq %%mm4, %%mm3 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
402 "punpcklwd %%mm2, %%mm2 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
403 "punpcklwd %%mm5, %%mm5 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
404 "punpcklwd %%mm4, %%mm4 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
405 "paddw %%mm1, %%mm2 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
406 "paddw %%mm1, %%mm5 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
407 "paddw %%mm1, %%mm4 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
408 "punpckhwd %%mm0, %%mm0 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
409 "punpckhwd %%mm6, %%mm6 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
410 "punpckhwd %%mm3, %%mm3 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
411 "paddw %%mm7, %%mm0 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
412 "paddw %%mm7, %%mm6 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
413 "paddw %%mm7, %%mm3 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
414 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
415 "packuswb %%mm0, %%mm2 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
416 "packuswb %%mm6, %%mm5 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
417 "packuswb %%mm3, %%mm4 \n\t"\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
418 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
419 #define YSCALEYUV2RGB1(index, c) REAL_YSCALEYUV2RGB1(index, c)
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
420
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
421 #define REAL_YSCALEYUV2PACKED1b(index, c) \
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
422 "xor "#index", "#index" \n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
423 ".balign 16 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
424 "1: \n\t"\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
425 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
426 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
427 "movq 4096(%2, "#index"), %%mm5 \n\t" /* uvbuf0[eax+2048]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
428 "movq 4096(%3, "#index"), %%mm4 \n\t" /* uvbuf1[eax+2048]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
429 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax] + uvbuf1[eax]*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
430 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048] + uvbuf1[eax+2048]*/\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
431 "psrlw $8, %%mm3 \n\t" \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
432 "psrlw $8, %%mm4 \n\t" \
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
433 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
434 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
435 "psraw $7, %%mm1 \n\t" \
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
436 "psraw $7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
437 #define YSCALEYUV2PACKED1b(index, c) REAL_YSCALEYUV2PACKED1b(index, c)
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
438
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
439 // do vertical chrominance interpolation
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
440 #define REAL_YSCALEYUV2RGB1b(index, c) \
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
441 "xor "#index", "#index" \n\t"\
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
442 ".balign 16 \n\t"\
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
443 "1: \n\t"\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
444 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
445 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
446 "movq 4096(%2, "#index"), %%mm5 \n\t" /* uvbuf0[eax+2048]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
447 "movq 4096(%3, "#index"), %%mm4 \n\t" /* uvbuf1[eax+2048]*/\
2576
437ed06579d8 c optimizations
michael
parents: 2575
diff changeset
448 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax] + uvbuf1[eax]*/\
437ed06579d8 c optimizations
michael
parents: 2575
diff changeset
449 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048] + uvbuf1[eax+2048]*/\
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
450 "psrlw $5, %%mm3 \n\t" /*FIXME might overflow*/\
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
451 "psrlw $5, %%mm4 \n\t" /*FIXME might overflow*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
452 "psubw "U_OFFSET"("#c"), %%mm3 \n\t" /* (U-128)8*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
453 "psubw "V_OFFSET"("#c"), %%mm4 \n\t" /* (V-128)8*/\
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
454 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
455 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
456 "pmulhw "UG_COEFF"("#c"), %%mm3\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
457 "pmulhw "VG_COEFF"("#c"), %%mm4\n\t"\
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
458 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
459 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
460 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
461 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
462 "psraw $4, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
463 "pmulhw "UB_COEFF"("#c"), %%mm2\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
464 "pmulhw "VR_COEFF"("#c"), %%mm5\n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
465 "psubw "Y_OFFSET"("#c"), %%mm1 \n\t" /* 8(Y-16)*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
466 "psubw "Y_OFFSET"("#c"), %%mm7 \n\t" /* 8(Y-16)*/\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
467 "pmulhw "Y_COEFF"("#c"), %%mm1 \n\t"\
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
468 "pmulhw "Y_COEFF"("#c"), %%mm7 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
469 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
470 "paddw %%mm3, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
471 "movq %%mm2, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
472 "movq %%mm5, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
473 "movq %%mm4, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
474 "punpcklwd %%mm2, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
475 "punpcklwd %%mm5, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
476 "punpcklwd %%mm4, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
477 "paddw %%mm1, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
478 "paddw %%mm1, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
479 "paddw %%mm1, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
480 "punpckhwd %%mm0, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
481 "punpckhwd %%mm6, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
482 "punpckhwd %%mm3, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
483 "paddw %%mm7, %%mm0 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
484 "paddw %%mm7, %%mm6 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
485 "paddw %%mm7, %%mm3 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
486 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
487 "packuswb %%mm0, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
488 "packuswb %%mm6, %%mm5 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
489 "packuswb %%mm3, %%mm4 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
490 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
491 #define YSCALEYUV2RGB1b(index, c) REAL_YSCALEYUV2RGB1b(index, c)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
492
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
493 #define REAL_WRITEBGR32(dst, dstw, index) \
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
494 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
495 "movq %%mm2, %%mm1 \n\t" /* B */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
496 "movq %%mm5, %%mm6 \n\t" /* R */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
497 "punpcklbw %%mm4, %%mm2 \n\t" /* GBGBGBGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
498 "punpcklbw %%mm7, %%mm5 \n\t" /* 0R0R0R0R 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
499 "punpckhbw %%mm4, %%mm1 \n\t" /* GBGBGBGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
500 "punpckhbw %%mm7, %%mm6 \n\t" /* 0R0R0R0R 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
501 "movq %%mm2, %%mm0 \n\t" /* GBGBGBGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
502 "movq %%mm1, %%mm3 \n\t" /* GBGBGBGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
503 "punpcklwd %%mm5, %%mm0 \n\t" /* 0RGB0RGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
504 "punpckhwd %%mm5, %%mm2 \n\t" /* 0RGB0RGB 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
505 "punpcklwd %%mm6, %%mm1 \n\t" /* 0RGB0RGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
506 "punpckhwd %%mm6, %%mm3 \n\t" /* 0RGB0RGB 3 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
507 \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
508 MOVNTQ(%%mm0, (dst, index, 4))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
509 MOVNTQ(%%mm2, 8(dst, index, 4))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
510 MOVNTQ(%%mm1, 16(dst, index, 4))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
511 MOVNTQ(%%mm3, 24(dst, index, 4))\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
512 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
513 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
514 "cmp "#dstw", "#index" \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
515 " jb 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
516 #define WRITEBGR32(dst, dstw, index) REAL_WRITEBGR32(dst, dstw, index)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
517
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
518 #define REAL_WRITEBGR16(dst, dstw, index) \
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
519 "pand "MANGLE(bF8)", %%mm2 \n\t" /* B */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
520 "pand "MANGLE(bFC)", %%mm4 \n\t" /* G */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
521 "pand "MANGLE(bF8)", %%mm5 \n\t" /* R */\
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
522 "psrlq $3, %%mm2 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
523 \
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
524 "movq %%mm2, %%mm1 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
525 "movq %%mm4, %%mm3 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
526 \
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
527 "punpcklbw %%mm7, %%mm3 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
528 "punpcklbw %%mm5, %%mm2 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
529 "punpckhbw %%mm7, %%mm4 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
530 "punpckhbw %%mm5, %%mm1 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
531 \
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
532 "psllq $3, %%mm3 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
533 "psllq $3, %%mm4 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
534 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
535 "por %%mm3, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
536 "por %%mm4, %%mm1 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
537 \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
538 MOVNTQ(%%mm2, (dst, index, 2))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
539 MOVNTQ(%%mm1, 8(dst, index, 2))\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
540 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
541 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
542 "cmp "#dstw", "#index" \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
543 " jb 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
544 #define WRITEBGR16(dst, dstw, index) REAL_WRITEBGR16(dst, dstw, index)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
545
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
546 #define REAL_WRITEBGR15(dst, dstw, index) \
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
547 "pand "MANGLE(bF8)", %%mm2 \n\t" /* B */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
548 "pand "MANGLE(bF8)", %%mm4 \n\t" /* G */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
549 "pand "MANGLE(bF8)", %%mm5 \n\t" /* R */\
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
550 "psrlq $3, %%mm2 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
551 "psrlq $1, %%mm5 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
552 \
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
553 "movq %%mm2, %%mm1 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
554 "movq %%mm4, %%mm3 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
555 \
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
556 "punpcklbw %%mm7, %%mm3 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
557 "punpcklbw %%mm5, %%mm2 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
558 "punpckhbw %%mm7, %%mm4 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
559 "punpckhbw %%mm5, %%mm1 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
560 \
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
561 "psllq $2, %%mm3 \n\t"\
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
562 "psllq $2, %%mm4 \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
563 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
564 "por %%mm3, %%mm2 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
565 "por %%mm4, %%mm1 \n\t"\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
566 \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
567 MOVNTQ(%%mm2, (dst, index, 2))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
568 MOVNTQ(%%mm1, 8(dst, index, 2))\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
569 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
570 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
571 "cmp "#dstw", "#index" \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
572 " jb 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
573 #define WRITEBGR15(dst, dstw, index) REAL_WRITEBGR15(dst, dstw, index)
2669
476b9b3b91be faster bgr15/16
michael
parents: 2638
diff changeset
574
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
575 #define WRITEBGR24OLD(dst, dstw, index) \
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
576 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
577 "movq %%mm2, %%mm1 \n\t" /* B */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
578 "movq %%mm5, %%mm6 \n\t" /* R */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
579 "punpcklbw %%mm4, %%mm2 \n\t" /* GBGBGBGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
580 "punpcklbw %%mm7, %%mm5 \n\t" /* 0R0R0R0R 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
581 "punpckhbw %%mm4, %%mm1 \n\t" /* GBGBGBGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
582 "punpckhbw %%mm7, %%mm6 \n\t" /* 0R0R0R0R 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
583 "movq %%mm2, %%mm0 \n\t" /* GBGBGBGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
584 "movq %%mm1, %%mm3 \n\t" /* GBGBGBGB 2 */\
2326
7d3542955132 BGR24 bugfix
michael
parents: 2316
diff changeset
585 "punpcklwd %%mm5, %%mm0 \n\t" /* 0RGB0RGB 0 */\
7d3542955132 BGR24 bugfix
michael
parents: 2316
diff changeset
586 "punpckhwd %%mm5, %%mm2 \n\t" /* 0RGB0RGB 1 */\
7d3542955132 BGR24 bugfix
michael
parents: 2316
diff changeset
587 "punpcklwd %%mm6, %%mm1 \n\t" /* 0RGB0RGB 2 */\
7d3542955132 BGR24 bugfix
michael
parents: 2316
diff changeset
588 "punpckhwd %%mm6, %%mm3 \n\t" /* 0RGB0RGB 3 */\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
589 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
590 "movq %%mm0, %%mm4 \n\t" /* 0RGB0RGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
591 "psrlq $8, %%mm0 \n\t" /* 00RGB0RG 0 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
592 "pand "MANGLE(bm00000111)", %%mm4\n\t" /* 00000RGB 0 */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
593 "pand "MANGLE(bm11111000)", %%mm0\n\t" /* 00RGB000 0.5 */\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
594 "por %%mm4, %%mm0 \n\t" /* 00RGBRGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
595 "movq %%mm2, %%mm4 \n\t" /* 0RGB0RGB 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
596 "psllq $48, %%mm2 \n\t" /* GB000000 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
597 "por %%mm2, %%mm0 \n\t" /* GBRGBRGB 0 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
598 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
599 "movq %%mm4, %%mm2 \n\t" /* 0RGB0RGB 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
600 "psrld $16, %%mm4 \n\t" /* 000R000R 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
601 "psrlq $24, %%mm2 \n\t" /* 0000RGB0 1.5 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
602 "por %%mm4, %%mm2 \n\t" /* 000RRGBR 1 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
603 "pand "MANGLE(bm00001111)", %%mm2\n\t" /* 0000RGBR 1 */\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
604 "movq %%mm1, %%mm4 \n\t" /* 0RGB0RGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
605 "psrlq $8, %%mm1 \n\t" /* 00RGB0RG 2 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
606 "pand "MANGLE(bm00000111)", %%mm4\n\t" /* 00000RGB 2 */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
607 "pand "MANGLE(bm11111000)", %%mm1\n\t" /* 00RGB000 2.5 */\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
608 "por %%mm4, %%mm1 \n\t" /* 00RGBRGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
609 "movq %%mm1, %%mm4 \n\t" /* 00RGBRGB 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
610 "psllq $32, %%mm1 \n\t" /* BRGB0000 2 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
611 "por %%mm1, %%mm2 \n\t" /* BRGBRGBR 1 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
612 \
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
613 "psrlq $32, %%mm4 \n\t" /* 000000RG 2.5 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
614 "movq %%mm3, %%mm5 \n\t" /* 0RGB0RGB 3 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
615 "psrlq $8, %%mm3 \n\t" /* 00RGB0RG 3 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
616 "pand "MANGLE(bm00000111)", %%mm5\n\t" /* 00000RGB 3 */\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
617 "pand "MANGLE(bm11111000)", %%mm3\n\t" /* 00RGB000 3.5 */\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
618 "por %%mm5, %%mm3 \n\t" /* 00RGBRGB 3 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
619 "psllq $16, %%mm3 \n\t" /* RGBRGB00 3 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
620 "por %%mm4, %%mm3 \n\t" /* RGBRGBRG 2.5 */\
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
621 \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
622 MOVNTQ(%%mm0, (dst))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
623 MOVNTQ(%%mm2, 8(dst))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
624 MOVNTQ(%%mm3, 16(dst))\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
625 "add $24, "#dst" \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
626 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
627 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
628 "cmp "#dstw", "#index" \n\t"\
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
629 " jb 1b \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
630
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
631 #define WRITEBGR24MMX(dst, dstw, index) \
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
632 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
633 "movq %%mm2, %%mm1 \n\t" /* B */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
634 "movq %%mm5, %%mm6 \n\t" /* R */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
635 "punpcklbw %%mm4, %%mm2 \n\t" /* GBGBGBGB 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
636 "punpcklbw %%mm7, %%mm5 \n\t" /* 0R0R0R0R 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
637 "punpckhbw %%mm4, %%mm1 \n\t" /* GBGBGBGB 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
638 "punpckhbw %%mm7, %%mm6 \n\t" /* 0R0R0R0R 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
639 "movq %%mm2, %%mm0 \n\t" /* GBGBGBGB 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
640 "movq %%mm1, %%mm3 \n\t" /* GBGBGBGB 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
641 "punpcklwd %%mm5, %%mm0 \n\t" /* 0RGB0RGB 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
642 "punpckhwd %%mm5, %%mm2 \n\t" /* 0RGB0RGB 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
643 "punpcklwd %%mm6, %%mm1 \n\t" /* 0RGB0RGB 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
644 "punpckhwd %%mm6, %%mm3 \n\t" /* 0RGB0RGB 3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
645 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
646 "movq %%mm0, %%mm4 \n\t" /* 0RGB0RGB 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
647 "movq %%mm2, %%mm6 \n\t" /* 0RGB0RGB 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
648 "movq %%mm1, %%mm5 \n\t" /* 0RGB0RGB 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
649 "movq %%mm3, %%mm7 \n\t" /* 0RGB0RGB 3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
650 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
651 "psllq $40, %%mm0 \n\t" /* RGB00000 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
652 "psllq $40, %%mm2 \n\t" /* RGB00000 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
653 "psllq $40, %%mm1 \n\t" /* RGB00000 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
654 "psllq $40, %%mm3 \n\t" /* RGB00000 3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
655 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
656 "punpckhdq %%mm4, %%mm0 \n\t" /* 0RGBRGB0 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
657 "punpckhdq %%mm6, %%mm2 \n\t" /* 0RGBRGB0 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
658 "punpckhdq %%mm5, %%mm1 \n\t" /* 0RGBRGB0 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
659 "punpckhdq %%mm7, %%mm3 \n\t" /* 0RGBRGB0 3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
660 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
661 "psrlq $8, %%mm0 \n\t" /* 00RGBRGB 0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
662 "movq %%mm2, %%mm6 \n\t" /* 0RGBRGB0 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
663 "psllq $40, %%mm2 \n\t" /* GB000000 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
664 "por %%mm2, %%mm0 \n\t" /* GBRGBRGB 0 */\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
665 MOVNTQ(%%mm0, (dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
666 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
667 "psrlq $24, %%mm6 \n\t" /* 0000RGBR 1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
668 "movq %%mm1, %%mm5 \n\t" /* 0RGBRGB0 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
669 "psllq $24, %%mm1 \n\t" /* BRGB0000 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
670 "por %%mm1, %%mm6 \n\t" /* BRGBRGBR 1 */\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
671 MOVNTQ(%%mm6, 8(dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
672 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
673 "psrlq $40, %%mm5 \n\t" /* 000000RG 2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
674 "psllq $8, %%mm3 \n\t" /* RGBRGB00 3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
675 "por %%mm3, %%mm5 \n\t" /* RGBRGBRG 2 */\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
676 MOVNTQ(%%mm5, 16(dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
677 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
678 "add $24, "#dst" \n\t"\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
679 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
680 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
681 "cmp "#dstw", "#index" \n\t"\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
682 " jb 1b \n\t"
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
683
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
684 #define WRITEBGR24MMX2(dst, dstw, index) \
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
685 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
686 "movq "MANGLE(M24A)", %%mm0 \n\t"\
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
687 "movq "MANGLE(M24C)", %%mm7 \n\t"\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
688 "pshufw $0x50, %%mm2, %%mm1 \n\t" /* B3 B2 B3 B2 B1 B0 B1 B0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
689 "pshufw $0x50, %%mm4, %%mm3 \n\t" /* G3 G2 G3 G2 G1 G0 G1 G0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
690 "pshufw $0x00, %%mm5, %%mm6 \n\t" /* R1 R0 R1 R0 R1 R0 R1 R0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
691 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
692 "pand %%mm0, %%mm1 \n\t" /* B2 B1 B0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
693 "pand %%mm0, %%mm3 \n\t" /* G2 G1 G0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
694 "pand %%mm7, %%mm6 \n\t" /* R1 R0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
695 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
696 "psllq $8, %%mm3 \n\t" /* G2 G1 G0 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
697 "por %%mm1, %%mm6 \n\t"\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
698 "por %%mm3, %%mm6 \n\t"\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
699 MOVNTQ(%%mm6, (dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
700 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
701 "psrlq $8, %%mm4 \n\t" /* 00 G7 G6 G5 G4 G3 G2 G1 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
702 "pshufw $0xA5, %%mm2, %%mm1 \n\t" /* B5 B4 B5 B4 B3 B2 B3 B2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
703 "pshufw $0x55, %%mm4, %%mm3 \n\t" /* G4 G3 G4 G3 G4 G3 G4 G3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
704 "pshufw $0xA5, %%mm5, %%mm6 \n\t" /* R5 R4 R5 R4 R3 R2 R3 R2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
705 \
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
706 "pand "MANGLE(M24B)", %%mm1 \n\t" /* B5 B4 B3 */\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
707 "pand %%mm7, %%mm3 \n\t" /* G4 G3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
708 "pand %%mm0, %%mm6 \n\t" /* R4 R3 R2 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
709 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
710 "por %%mm1, %%mm3 \n\t" /* B5 G4 B4 G3 B3 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
711 "por %%mm3, %%mm6 \n\t"\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
712 MOVNTQ(%%mm6, 8(dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
713 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
714 "pshufw $0xFF, %%mm2, %%mm1 \n\t" /* B7 B6 B7 B6 B7 B6 B6 B7 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
715 "pshufw $0xFA, %%mm4, %%mm3 \n\t" /* 00 G7 00 G7 G6 G5 G6 G5 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
716 "pshufw $0xFA, %%mm5, %%mm6 \n\t" /* R7 R6 R7 R6 R5 R4 R5 R4 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
717 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
718 "pand %%mm7, %%mm1 \n\t" /* B7 B6 */\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
719 "pand %%mm0, %%mm3 \n\t" /* G7 G6 G5 */\
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
720 "pand "MANGLE(M24B)", %%mm6 \n\t" /* R7 R6 R5 */\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
721 \
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
722 "por %%mm1, %%mm3 \n\t"\
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
723 "por %%mm3, %%mm6 \n\t"\
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
724 MOVNTQ(%%mm6, 16(dst))\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
725 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
726 "add $24, "#dst" \n\t"\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
727 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
728 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
729 "cmp "#dstw", "#index" \n\t"\
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
730 " jb 1b \n\t"
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
731
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
732 #ifdef HAVE_MMX2
3126
e71ae0213431 runtime cpu detection
michael
parents: 2800
diff changeset
733 #undef WRITEBGR24
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
734 #define WRITEBGR24(dst, dstw, index) WRITEBGR24MMX2(dst, dstw, index)
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
735 #else
3126
e71ae0213431 runtime cpu detection
michael
parents: 2800
diff changeset
736 #undef WRITEBGR24
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
737 #define WRITEBGR24(dst, dstw, index) WRITEBGR24MMX(dst, dstw, index)
2730
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
738 #endif
c483fc9bf0c4 faster bgr24 output
michael
parents: 2728
diff changeset
739
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
740 #define REAL_WRITEYUY2(dst, dstw, index) \
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
741 "packuswb %%mm3, %%mm3 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
742 "packuswb %%mm4, %%mm4 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
743 "packuswb %%mm7, %%mm1 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
744 "punpcklbw %%mm4, %%mm3 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
745 "movq %%mm1, %%mm7 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
746 "punpcklbw %%mm3, %%mm1 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
747 "punpckhbw %%mm3, %%mm7 \n\t"\
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
748 \
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
749 MOVNTQ(%%mm1, (dst, index, 2))\
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
750 MOVNTQ(%%mm7, 8(dst, index, 2))\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
751 \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
752 "add $8, "#index" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
753 "cmp "#dstw", "#index" \n\t"\
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
754 " jb 1b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
755 #define WRITEYUY2(dst, dstw, index) REAL_WRITEYUY2(dst, dstw, index)
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
756
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
757
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
758 static inline void RENAME(yuv2yuvX)(SwsContext *c, int16_t *lumFilter, int16_t **lumSrc, int lumFilterSize,
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
759 int16_t *chrFilter, int16_t **chrSrc, int chrFilterSize,
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
760 uint8_t *dest, uint8_t *uDest, uint8_t *vDest, long dstW, long chrDstW)
2519
6f3fa9bc3b27 yv12 to yv12 scaler
michael
parents: 2503
diff changeset
761 {
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
762 #ifdef HAVE_MMX
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
763 if(uDest != NULL)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
764 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
765 asm volatile(
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
766 YSCALEYUV2YV12X(0, CHR_MMX_FILTER_OFFSET)
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
767 :: "r" (&c->redDither),
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
768 "r" (uDest), "p" (chrDstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
769 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
770 );
2519
6f3fa9bc3b27 yv12 to yv12 scaler
michael
parents: 2503
diff changeset
771
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
772 asm volatile(
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
773 YSCALEYUV2YV12X(4096, CHR_MMX_FILTER_OFFSET)
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
774 :: "r" (&c->redDither),
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
775 "r" (vDest), "p" (chrDstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
776 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
777 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
778 }
2521
b70a77066611 tell the c compiler that the memory changed
michael
parents: 2520
diff changeset
779
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
780 asm volatile(
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
781 YSCALEYUV2YV12X(0, LUM_MMX_FILTER_OFFSET)
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
782 :: "r" (&c->redDither),
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
783 "r" (dest), "p" (dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
784 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
785 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
786 #else
12017
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
787 #ifdef HAVE_ALTIVEC
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
788 yuv2yuvX_altivec_real(lumFilter, lumSrc, lumFilterSize,
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
789 chrFilter, chrSrc, chrFilterSize,
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
790 dest, uDest, vDest, dstW, chrDstW);
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
791 #else //HAVE_ALTIVEC
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
792 yuv2yuvXinC(lumFilter, lumSrc, lumFilterSize,
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
793 chrFilter, chrSrc, chrFilterSize,
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
794 dest, uDest, vDest, dstW, chrDstW);
12017
21e5cb258a95 AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents: 11122
diff changeset
795 #endif //!HAVE_ALTIVEC
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
796 #endif
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
797 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
798
14715
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
799 static inline void RENAME(yuv2nv12X)(SwsContext *c, int16_t *lumFilter, int16_t **lumSrc, int lumFilterSize,
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
800 int16_t *chrFilter, int16_t **chrSrc, int chrFilterSize,
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
801 uint8_t *dest, uint8_t *uDest, int dstW, int chrDstW, int dstFormat)
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
802 {
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
803 yuv2nv12XinC(lumFilter, lumSrc, lumFilterSize,
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
804 chrFilter, chrSrc, chrFilterSize,
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
805 dest, uDest, dstW, chrDstW, dstFormat);
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
806 }
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
807
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
808 static inline void RENAME(yuv2yuv1)(int16_t *lumSrc, int16_t *chrSrc,
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
809 uint8_t *dest, uint8_t *uDest, uint8_t *vDest, long dstW, long chrDstW)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
810 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
811 #ifdef HAVE_MMX
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
812 if(uDest != NULL)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
813 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
814 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
815 YSCALEYUV2YV121
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
816 :: "r" (chrSrc + chrDstW), "r" (uDest + chrDstW),
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
817 "g" (-chrDstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
818 : "%"REG_a
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
819 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
820
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
821 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
822 YSCALEYUV2YV121
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
823 :: "r" (chrSrc + 2048 + chrDstW), "r" (vDest + chrDstW),
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
824 "g" (-chrDstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
825 : "%"REG_a
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
826 );
2519
6f3fa9bc3b27 yv12 to yv12 scaler
michael
parents: 2503
diff changeset
827 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
828
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
829 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
830 YSCALEYUV2YV121
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
831 :: "r" (lumSrc + dstW), "r" (dest + dstW),
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
832 "g" (-dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
833 : "%"REG_a
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
834 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
835 #else
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
836 int i;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
837 for(i=0; i<dstW; i++)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
838 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
839 int val= lumSrc[i]>>7;
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
840
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
841 if(val&256){
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
842 if(val<0) val=0;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
843 else val=255;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
844 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
845
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
846 dest[i]= val;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
847 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
848
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
849 if(uDest != NULL)
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
850 for(i=0; i<chrDstW; i++)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
851 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
852 int u=chrSrc[i]>>7;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
853 int v=chrSrc[i + 2048]>>7;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
854
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
855 if((u|v)&256){
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
856 if(u<0) u=0;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
857 else if (u>255) u=255;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
858 if(v<0) v=0;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
859 else if (v>255) v=255;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
860 }
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
861
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
862 uDest[i]= u;
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
863 vDest[i]= v;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
864 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
865 #endif
2519
6f3fa9bc3b27 yv12 to yv12 scaler
michael
parents: 2503
diff changeset
866 }
6f3fa9bc3b27 yv12 to yv12 scaler
michael
parents: 2503
diff changeset
867
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
868
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
869 /**
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
870 * vertical scale YV12 to RGB
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
871 */
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
872 static inline void RENAME(yuv2packedX)(SwsContext *c, int16_t *lumFilter, int16_t **lumSrc, int lumFilterSize,
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
873 int16_t *chrFilter, int16_t **chrSrc, int chrFilterSize,
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
874 uint8_t *dest, int dstW, int dstY)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
875 {
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
876 int dummy=0;
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
877 switch(c->dstFormat)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
878 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
879 #ifdef HAVE_MMX
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
880 case IMGFMT_BGR32:
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
881 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
882 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
883 YSCALEYUV2RGBX
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
884 WRITEBGR32(%4, %5, %%REGa)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
885
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
886 :: "r" (&c->redDither),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
887 "m" (dummy), "m" (dummy), "m" (dummy),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
888 "r" (dest), "m" (dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
889 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
890 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
891 }
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
892 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
893 case IMGFMT_BGR24:
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
894 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
895 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
896 YSCALEYUV2RGBX
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
897 "lea (%%"REG_a", %%"REG_a", 2), %%"REG_b"\n\t" //FIXME optimize
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
898 "add %4, %%"REG_b" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
899 WRITEBGR24(%%REGb, %5, %%REGa)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
900
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
901 :: "r" (&c->redDither),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
902 "m" (dummy), "m" (dummy), "m" (dummy),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
903 "r" (dest), "m" (dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
904 : "%"REG_a, "%"REG_b, "%"REG_d, "%"REG_S //FIXME ebx
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
905 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
906 }
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
907 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
908 case IMGFMT_BGR15:
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
909 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
910 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
911 YSCALEYUV2RGBX
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
912 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
913 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
914 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
915 "paddusb "MANGLE(g5Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
916 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
917 #endif
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
918
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
919 WRITEBGR15(%4, %5, %%REGa)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
920
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
921 :: "r" (&c->redDither),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
922 "m" (dummy), "m" (dummy), "m" (dummy),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
923 "r" (dest), "m" (dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
924 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
925 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
926 }
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
927 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
928 case IMGFMT_BGR16:
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
929 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
930 asm volatile(
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
931 YSCALEYUV2RGBX
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
932 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
933 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
934 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
935 "paddusb "MANGLE(g6Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
936 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
937 #endif
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
938
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
939 WRITEBGR16(%4, %5, %%REGa)
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
940
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
941 :: "r" (&c->redDither),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
942 "m" (dummy), "m" (dummy), "m" (dummy),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
943 "r" (dest), "m" (dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
944 : "%"REG_a, "%"REG_d, "%"REG_S
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
945 );
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
946 }
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
947 break;
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
948 case IMGFMT_YUY2:
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
949 {
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
950 asm volatile(
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
951 YSCALEYUV2PACKEDX
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
952 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
953
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
954 "psraw $3, %%mm3 \n\t"
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
955 "psraw $3, %%mm4 \n\t"
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
956 "psraw $3, %%mm1 \n\t"
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
957 "psraw $3, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
958 WRITEYUY2(%4, %5, %%REGa)
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
959
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
960 :: "r" (&c->redDither),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
961 "m" (dummy), "m" (dummy), "m" (dummy),
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
962 "r" (dest), "m" (dstW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
963 : "%"REG_a, "%"REG_d, "%"REG_S
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
964 );
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
965 }
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
966 break;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
967 #endif
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
968 default:
12698
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
969 #ifdef HAVE_ALTIVEC
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
970 altivec_yuv2packedX (c, lumFilter, lumSrc, lumFilterSize,
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
971 chrFilter, chrSrc, chrFilterSize,
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
972 dest, dstW, dstY);
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
973 #else
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
974 yuv2packedXinC(c, lumFilter, lumSrc, lumFilterSize,
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
975 chrFilter, chrSrc, chrFilterSize,
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
976 dest, dstW, dstY);
12698
d2aef091743c altivec yuv->rgb converter
michael
parents: 12130
diff changeset
977 #endif
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
978 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
979 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
980 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
981
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
982 /**
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
983 * vertical bilinear scale YV12 to RGB
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
984 */
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
985 static inline void RENAME(yuv2packed2)(SwsContext *c, uint16_t *buf0, uint16_t *buf1, uint16_t *uvbuf0, uint16_t *uvbuf1,
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
986 uint8_t *dest, int dstW, int yalpha, int uvalpha, int y)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
987 {
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
988 int yalpha1=yalpha^4095;
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
989 int uvalpha1=uvalpha^4095;
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
990 int i;
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
991
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
992 #if 0 //isn't used
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
993 if(flags&SWS_FULL_CHR_H_INT)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
994 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
995 switch(dstFormat)
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
996 {
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
997 #ifdef HAVE_MMX
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
998 case IMGFMT_BGR32:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
999 asm volatile(
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1000
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1001
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1002 FULL_YSCALEYUV2RGB
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1003 "punpcklbw %%mm1, %%mm3 \n\t" // BGBGBGBG
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1004 "punpcklbw %%mm7, %%mm0 \n\t" // R0R0R0R0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1005
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1006 "movq %%mm3, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1007 "punpcklwd %%mm0, %%mm3 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1008 "punpckhwd %%mm0, %%mm1 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1009
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1010 MOVNTQ(%%mm3, (%4, %%REGa, 4))
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1011 MOVNTQ(%%mm1, 8(%4, %%REGa, 4))
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1012
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1013 "add $4, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1014 "cmp %5, %%"REG_a" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1015 " jb 1b \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1016
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1017
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1018 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" ((long)dstW),
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1019 "m" (yalpha1), "m" (uvalpha1)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1020 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1021 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1022 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1023 case IMGFMT_BGR24:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1024 asm volatile(
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1025
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1026 FULL_YSCALEYUV2RGB
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1027
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1028 // lsb ... msb
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1029 "punpcklbw %%mm1, %%mm3 \n\t" // BGBGBGBG
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1030 "punpcklbw %%mm7, %%mm0 \n\t" // R0R0R0R0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1031
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1032 "movq %%mm3, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1033 "punpcklwd %%mm0, %%mm3 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1034 "punpckhwd %%mm0, %%mm1 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1035
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1036 "movq %%mm3, %%mm2 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1037 "psrlq $8, %%mm3 \n\t" // GR0BGR00
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1038 "pand "MANGLE(bm00000111)", %%mm2\n\t" // BGR00000
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1039 "pand "MANGLE(bm11111000)", %%mm3\n\t" // 000BGR00
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1040 "por %%mm2, %%mm3 \n\t" // BGRBGR00
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1041 "movq %%mm1, %%mm2 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1042 "psllq $48, %%mm1 \n\t" // 000000BG
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1043 "por %%mm1, %%mm3 \n\t" // BGRBGRBG
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1044
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1045 "movq %%mm2, %%mm1 \n\t" // BGR0BGR0
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1046 "psrld $16, %%mm2 \n\t" // R000R000
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1047 "psrlq $24, %%mm1 \n\t" // 0BGR0000
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1048 "por %%mm2, %%mm1 \n\t" // RBGRR000
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1049
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1050 "mov %4, %%"REG_b" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1051 "add %%"REG_a", %%"REG_b" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1052
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1053 #ifdef HAVE_MMX2
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1054 //FIXME Alignment
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1055 "movntq %%mm3, (%%"REG_b", %%"REG_a", 2)\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1056 "movntq %%mm1, 8(%%"REG_b", %%"REG_a", 2)\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1057 #else
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1058 "movd %%mm3, (%%"REG_b", %%"REG_a", 2) \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1059 "psrlq $32, %%mm3 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1060 "movd %%mm3, 4(%%"REG_b", %%"REG_a", 2) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1061 "movd %%mm1, 8(%%"REG_b", %%"REG_a", 2) \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1062 #endif
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1063 "add $4, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1064 "cmp %5, %%"REG_a" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1065 " jb 1b \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1066
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1067 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), "m" (dstW),
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1068 "m" (yalpha1), "m" (uvalpha1)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1069 : "%"REG_a, "%"REG_b
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1070 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1071 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1072 case IMGFMT_BGR15:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1073 asm volatile(
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1074
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1075 FULL_YSCALEYUV2RGB
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1076 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1077 "paddusb "MANGLE(g5Dither)", %%mm1\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1078 "paddusb "MANGLE(r5Dither)", %%mm0\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1079 "paddusb "MANGLE(b5Dither)", %%mm3\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1080 #endif
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1081 "punpcklbw %%mm7, %%mm1 \n\t" // 0G0G0G0G
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1082 "punpcklbw %%mm7, %%mm3 \n\t" // 0B0B0B0B
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1083 "punpcklbw %%mm7, %%mm0 \n\t" // 0R0R0R0R
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1084
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1085 "psrlw $3, %%mm3 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1086 "psllw $2, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1087 "psllw $7, %%mm0 \n\t"
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1088 "pand "MANGLE(g15Mask)", %%mm1 \n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1089 "pand "MANGLE(r15Mask)", %%mm0 \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1090
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1091 "por %%mm3, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1092 "por %%mm1, %%mm0 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1093
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1094 MOVNTQ(%%mm0, (%4, %%REGa, 2))
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1095
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1096 "add $4, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1097 "cmp %5, %%"REG_a" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1098 " jb 1b \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1099
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1100 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstW),
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1101 "m" (yalpha1), "m" (uvalpha1)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1102 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1103 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1104 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1105 case IMGFMT_BGR16:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1106 asm volatile(
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1107
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1108 FULL_YSCALEYUV2RGB
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1109 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1110 "paddusb "MANGLE(g6Dither)", %%mm1\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1111 "paddusb "MANGLE(r5Dither)", %%mm0\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1112 "paddusb "MANGLE(b5Dither)", %%mm3\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1113 #endif
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1114 "punpcklbw %%mm7, %%mm1 \n\t" // 0G0G0G0G
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1115 "punpcklbw %%mm7, %%mm3 \n\t" // 0B0B0B0B
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1116 "punpcklbw %%mm7, %%mm0 \n\t" // 0R0R0R0R
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1117
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1118 "psrlw $3, %%mm3 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1119 "psllw $3, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1120 "psllw $8, %%mm0 \n\t"
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1121 "pand "MANGLE(g16Mask)", %%mm1 \n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1122 "pand "MANGLE(r16Mask)", %%mm0 \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1123
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1124 "por %%mm3, %%mm1 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1125 "por %%mm1, %%mm0 \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1126
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1127 MOVNTQ(%%mm0, (%4, %%REGa, 2))
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1128
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1129 "add $4, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1130 "cmp %5, %%"REG_a" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1131 " jb 1b \n\t"
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1132
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1133 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstW),
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1134 "m" (yalpha1), "m" (uvalpha1)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1135 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1136 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1137 break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1138 #endif
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1139 case IMGFMT_RGB32:
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1140 #ifndef HAVE_MMX
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1141 case IMGFMT_BGR32:
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1142 #endif
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1143 if(dstFormat==IMGFMT_BGR32)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1144 {
4794
michael
parents: 4793
diff changeset
1145 int i;
4793
68e7ed0c22be fixing bgr32 output on big-endian systems
michael
parents: 4698
diff changeset
1146 #ifdef WORDS_BIGENDIAN
68e7ed0c22be fixing bgr32 output on big-endian systems
michael
parents: 4698
diff changeset
1147 dest++;
68e7ed0c22be fixing bgr32 output on big-endian systems
michael
parents: 4698
diff changeset
1148 #endif
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1149 for(i=0;i<dstW;i++){
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1150 // vertical linear interpolation && yuv2rgb in a single step:
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1151 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)];
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1152 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19);
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1153 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19);
2503
d21d8d5f2e23 yuv2rgb bugfix
michael
parents: 2476
diff changeset
1154 dest[0]=clip_table[((Y + yuvtab_40cf[U]) >>13)];
d21d8d5f2e23 yuv2rgb bugfix
michael
parents: 2476
diff changeset
1155 dest[1]=clip_table[((Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13)];
d21d8d5f2e23 yuv2rgb bugfix
michael
parents: 2476
diff changeset
1156 dest[2]=clip_table[((Y + yuvtab_3343[V]) >>13)];
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1157 dest+= 4;
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1158 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1159 }
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1160 else if(dstFormat==IMGFMT_BGR24)
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1161 {
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1162 int i;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1163 for(i=0;i<dstW;i++){
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1164 // vertical linear interpolation && yuv2rgb in a single step:
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1165 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)];
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1166 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19);
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1167 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19);
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1168 dest[0]=clip_table[((Y + yuvtab_40cf[U]) >>13)];
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1169 dest[1]=clip_table[((Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13)];
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1170 dest[2]=clip_table[((Y + yuvtab_3343[V]) >>13)];
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1171 dest+= 3;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1172 }
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1173 }
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1174 else if(dstFormat==IMGFMT_BGR16)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1175 {
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
1176 int i;
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1177 for(i=0;i<dstW;i++){
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1178 // vertical linear interpolation && yuv2rgb in a single step:
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1179 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)];
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1180 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19);
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1181 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19);
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1182
2572
f2353173d52c c optimizations (array is faster than pointer) (16bpp variants tested and 2% faster)
michael
parents: 2569
diff changeset
1183 ((uint16_t*)dest)[i] =
2584
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1184 clip_table16b[(Y + yuvtab_40cf[U]) >>13] |
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1185 clip_table16g[(Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13] |
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1186 clip_table16r[(Y + yuvtab_3343[V]) >>13];
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1187 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1188 }
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
1189 else if(dstFormat==IMGFMT_BGR15)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1190 {
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
1191 int i;
3209
0b172eb639f1 swscaler cleanup
michael
parents: 3136
diff changeset
1192 for(i=0;i<dstW;i++){
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1193 // vertical linear interpolation && yuv2rgb in a single step:
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1194 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)];
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1195 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19);
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1196 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19);
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1197
2572
f2353173d52c c optimizations (array is faster than pointer) (16bpp variants tested and 2% faster)
michael
parents: 2569
diff changeset
1198 ((uint16_t*)dest)[i] =
2584
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1199 clip_table15b[(Y + yuvtab_40cf[U]) >>13] |
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1200 clip_table15g[(Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13] |
6d20d5d5829f 15/16bit in C speedup
michael
parents: 2576
diff changeset
1201 clip_table15r[(Y + yuvtab_3343[V]) >>13];
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1202 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1203 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1204 }//FULL_UV_IPOL
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1205 else
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1206 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1207 #endif // if 0
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1208 #ifdef HAVE_MMX
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1209 switch(c->dstFormat)
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1210 {
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
1211 //Note 8280 == DSTW_OFFSET but the preprocessor can't handle that there :(
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1212 case IMGFMT_BGR32:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1213 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1214 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1215 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1216 YSCALEYUV2RGB(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1217 WRITEBGR32(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1218 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1219
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1220 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1221 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1222 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1223 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1224 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1225 case IMGFMT_BGR24:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1226 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1227 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1228 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1229 YSCALEYUV2RGB(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1230 WRITEBGR24(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1231 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1232 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1233 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1234 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1235 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1236 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1237 case IMGFMT_BGR15:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1238 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1239 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1240 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1241 YSCALEYUV2RGB(%%REGa, %5)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1242 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1243 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1244 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1245 "paddusb "MANGLE(g5Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1246 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1247 #endif
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1248
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1249 WRITEBGR15(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1250 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1251
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1252 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1253 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1254 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1255 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1256 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1257 case IMGFMT_BGR16:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1258 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1259 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1260 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1261 YSCALEYUV2RGB(%%REGa, %5)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1262 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1263 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1264 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1265 "paddusb "MANGLE(g6Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1266 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1267 #endif
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1268
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1269 WRITEBGR16(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1270 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1271 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1272 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1273 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1274 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1275 return;
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1276 case IMGFMT_YUY2:
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1277 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1278 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1279 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1280 YSCALEYUV2PACKED(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1281 WRITEYUY2(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1282 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1283 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
1284 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1285 : "%"REG_a
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1286 );
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1287 return;
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1288 default: break;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1289 }
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1290 #endif //HAVE_MMX
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1291 YSCALE_YUV_2_ANYRGB_C(YSCALE_YUV_2_RGB2_C, YSCALE_YUV_2_PACKED2_C)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1292 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1293
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1294 /**
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1295 * YV12 to RGB without scaling or interpolating
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1296 */
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1297 static inline void RENAME(yuv2packed1)(SwsContext *c, uint16_t *buf0, uint16_t *uvbuf0, uint16_t *uvbuf1,
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1298 uint8_t *dest, int dstW, int uvalpha, int dstFormat, int flags, int y)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1299 {
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
1300 const int yalpha1=0;
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1301 int i;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1302
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1303 uint16_t *buf1= buf0; //FIXME needed for the rgb1/bgr1
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1304 const int yalpha= 4096; //FIXME ...
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
1305
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1306 if(flags&SWS_FULL_CHR_H_INT)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1307 {
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1308 RENAME(yuv2packed2)(c, buf0, buf0, uvbuf0, uvbuf1, dest, dstW, 0, uvalpha, y);
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1309 return;
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1310 }
2576
437ed06579d8 c optimizations
michael
parents: 2575
diff changeset
1311
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1312 #ifdef HAVE_MMX
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1313 if( uvalpha < 2048 ) // note this is not correct (shifts chrominance by 0.5 pixels) but its a bit faster
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1314 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1315 switch(dstFormat)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1316 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1317 case IMGFMT_BGR32:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1318 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1319 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1320 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1321 YSCALEYUV2RGB1(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1322 WRITEBGR32(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1323 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1324
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1325 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1326 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1327 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1328 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1329 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1330 case IMGFMT_BGR24:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1331 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1332 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1333 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1334 YSCALEYUV2RGB1(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1335 WRITEBGR24(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1336 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1337
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1338 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1339 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1340 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1341 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1342 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1343 case IMGFMT_BGR15:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1344 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1345 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1346 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1347 YSCALEYUV2RGB1(%%REGa, %5)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1348 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1349 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1350 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1351 "paddusb "MANGLE(g5Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1352 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1353 #endif
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1354 WRITEBGR15(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1355 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1356
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1357 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1358 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1359 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1360 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1361 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1362 case IMGFMT_BGR16:
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1363 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1364 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1365 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1366 YSCALEYUV2RGB1(%%REGa, %5)
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1367 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1368 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1369 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1370 "paddusb "MANGLE(g6Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1371 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1372 #endif
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1373
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1374 WRITEBGR16(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1375 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1376
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1377 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1378 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1379 : "%"REG_a
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1380 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1381 return;
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1382 case IMGFMT_YUY2:
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1383 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1384 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1385 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1386 YSCALEYUV2PACKED1(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1387 WRITEYUY2(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1388 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1389
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1390 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1391 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1392 : "%"REG_a
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1393 );
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1394 return;
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1395 }
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1396 }
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1397 else
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1398 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1399 switch(dstFormat)
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1400 {
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1401 case IMGFMT_BGR32:
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1402 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1403 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1404 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1405 YSCALEYUV2RGB1b(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1406 WRITEBGR32(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1407 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1408
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1409 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1410 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1411 : "%"REG_a
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1412 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1413 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1414 case IMGFMT_BGR24:
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1415 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1416 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1417 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1418 YSCALEYUV2RGB1b(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1419 WRITEBGR24(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1420 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1421
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1422 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1423 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1424 : "%"REG_a
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1425 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1426 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1427 case IMGFMT_BGR15:
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1428 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1429 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1430 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1431 YSCALEYUV2RGB1b(%%REGa, %5)
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1432 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1433 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1434 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1435 "paddusb "MANGLE(g5Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1436 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1437 #endif
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1438 WRITEBGR15(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1439 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1440
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1441 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1442 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1443 : "%"REG_a
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1444 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1445 return;
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1446 case IMGFMT_BGR16:
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1447 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1448 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1449 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1450 YSCALEYUV2RGB1b(%%REGa, %5)
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1451 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1452 #ifdef DITHER1XBPP
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1453 "paddusb "MANGLE(b5Dither)", %%mm2\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1454 "paddusb "MANGLE(g6Dither)", %%mm4\n\t"
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
1455 "paddusb "MANGLE(r5Dither)", %%mm5\n\t"
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1456 #endif
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1457
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1458 WRITEBGR16(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1459 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1460
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1461 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1462 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1463 : "%"REG_a
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1464 );
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1465 return;
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1466 case IMGFMT_YUY2:
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1467 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1468 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1469 "mov %4, %%"REG_SP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1470 YSCALEYUV2PACKED1b(%%REGa, %5)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1471 WRITEYUY2(%%REGSP, 8280(%5), %%REGa)
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1472 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t"
9417
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1473
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1474 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest),
5eea6d903b4c cleanup
michael
parents: 9414
diff changeset
1475 "r" (&c->redDither)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1476 : "%"REG_a
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1477 );
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1478 return;
2569
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1479 }
30b736e7feef interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents: 2566
diff changeset
1480 }
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1481 #endif
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1482 if( uvalpha < 2048 )
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1483 {
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1484 YSCALE_YUV_2_ANYRGB_C(YSCALE_YUV_2_RGB1_C, YSCALE_YUV_2_PACKED1_C)
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1485 }else{
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
1486 YSCALE_YUV_2_ANYRGB_C(YSCALE_YUV_2_RGB1B_C, YSCALE_YUV_2_PACKED1B_C)
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
1487 }
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1488 }
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
1489
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1490 //FIXME yuy2* can read upto 7 samples to much
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1491
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1492 static inline void RENAME(yuy2ToY)(uint8_t *dst, uint8_t *src, long width)
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1493 {
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1494 #ifdef HAVE_MMX
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1495 asm volatile(
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1496 "movq "MANGLE(bm01010101)", %%mm2\n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1497 "mov %0, %%"REG_a" \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1498 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1499 "movq (%1, %%"REG_a",2), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1500 "movq 8(%1, %%"REG_a",2), %%mm1 \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1501 "pand %%mm2, %%mm0 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1502 "pand %%mm2, %%mm1 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1503 "packuswb %%mm1, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1504 "movq %%mm0, (%2, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1505 "add $8, %%"REG_a" \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1506 " js 1b \n\t"
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1507 : : "g" (-width), "r" (src+width*2), "r" (dst+width)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1508 : "%"REG_a
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1509 );
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1510 #else
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1511 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1512 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1513 dst[i]= src[2*i];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1514 #endif
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1515 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1516
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1517 static inline void RENAME(yuy2ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, long width)
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1518 {
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1519 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW)
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1520 asm volatile(
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1521 "movq "MANGLE(bm01010101)", %%mm4\n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1522 "mov %0, %%"REG_a" \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1523 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1524 "movq (%1, %%"REG_a",4), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1525 "movq 8(%1, %%"REG_a",4), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1526 "movq (%2, %%"REG_a",4), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1527 "movq 8(%2, %%"REG_a",4), %%mm3 \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1528 PAVGB(%%mm2, %%mm0)
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1529 PAVGB(%%mm3, %%mm1)
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1530 "psrlw $8, %%mm0 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1531 "psrlw $8, %%mm1 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1532 "packuswb %%mm1, %%mm0 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1533 "movq %%mm0, %%mm1 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1534 "psrlw $8, %%mm0 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1535 "pand %%mm4, %%mm1 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1536 "packuswb %%mm0, %%mm0 \n\t"
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1537 "packuswb %%mm1, %%mm1 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1538 "movd %%mm0, (%4, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1539 "movd %%mm1, (%3, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1540 "add $4, %%"REG_a" \n\t"
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1541 " js 1b \n\t"
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1542 : : "g" (-width), "r" (src1+width*4), "r" (src2+width*4), "r" (dstU+width), "r" (dstV+width)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1543 : "%"REG_a
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
1544 );
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1545 #else
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1546 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1547 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1548 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1549 dstU[i]= (src1[4*i + 1] + src2[4*i + 1])>>1;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1550 dstV[i]= (src1[4*i + 3] + src2[4*i + 3])>>1;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1551 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1552 #endif
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1553 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1554
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1555 //this is allmost identical to the previous, end exists only cuz yuy2ToY/UV)(dst, src+1, ...) would have 100% unaligned accesses
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1556 static inline void RENAME(uyvyToY)(uint8_t *dst, uint8_t *src, long width)
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1557 {
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1558 #ifdef HAVE_MMX
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1559 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1560 "mov %0, %%"REG_a" \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1561 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1562 "movq (%1, %%"REG_a",2), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1563 "movq 8(%1, %%"REG_a",2), %%mm1 \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1564 "psrlw $8, %%mm0 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1565 "psrlw $8, %%mm1 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1566 "packuswb %%mm1, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1567 "movq %%mm0, (%2, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1568 "add $8, %%"REG_a" \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1569 " js 1b \n\t"
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1570 : : "g" (-width), "r" (src+width*2), "r" (dst+width)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1571 : "%"REG_a
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1572 );
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1573 #else
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1574 int i;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1575 for(i=0; i<width; i++)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1576 dst[i]= src[2*i+1];
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1577 #endif
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1578 }
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1579
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1580 static inline void RENAME(uyvyToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, long width)
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1581 {
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1582 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1583 asm volatile(
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1584 "movq "MANGLE(bm01010101)", %%mm4\n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1585 "mov %0, %%"REG_a" \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1586 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1587 "movq (%1, %%"REG_a",4), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1588 "movq 8(%1, %%"REG_a",4), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1589 "movq (%2, %%"REG_a",4), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1590 "movq 8(%2, %%"REG_a",4), %%mm3 \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1591 PAVGB(%%mm2, %%mm0)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1592 PAVGB(%%mm3, %%mm1)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1593 "pand %%mm4, %%mm0 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1594 "pand %%mm4, %%mm1 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1595 "packuswb %%mm1, %%mm0 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1596 "movq %%mm0, %%mm1 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1597 "psrlw $8, %%mm0 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1598 "pand %%mm4, %%mm1 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1599 "packuswb %%mm0, %%mm0 \n\t"
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1600 "packuswb %%mm1, %%mm1 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1601 "movd %%mm0, (%4, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1602 "movd %%mm1, (%3, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1603 "add $4, %%"REG_a" \n\t"
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1604 " js 1b \n\t"
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1605 : : "g" (-width), "r" (src1+width*4), "r" (src2+width*4), "r" (dstU+width), "r" (dstV+width)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1606 : "%"REG_a
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1607 );
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1608 #else
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1609 int i;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1610 for(i=0; i<width; i++)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1611 {
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1612 dstU[i]= (src1[4*i + 0] + src2[4*i + 0])>>1;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1613 dstV[i]= (src1[4*i + 2] + src2[4*i + 2])>>1;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1614 }
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1615 #endif
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1616 }
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
1617
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1618 static inline void RENAME(bgr32ToY)(uint8_t *dst, uint8_t *src, int width)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1619 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1620 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1621 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1622 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1623 int b= ((uint32_t*)src)[i]&0xFF;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1624 int g= (((uint32_t*)src)[i]>>8)&0xFF;
9499
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
1625 int r= (((uint32_t*)src)[i]>>16)&0xFF;
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1626
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1627 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT);
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1628 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1629 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1630
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1631 static inline void RENAME(bgr32ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1632 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1633 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1634 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1635 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1636 const int a= ((uint32_t*)src1)[2*i+0];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1637 const int e= ((uint32_t*)src1)[2*i+1];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1638 const int c= ((uint32_t*)src2)[2*i+0];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1639 const int d= ((uint32_t*)src2)[2*i+1];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1640 const int l= (a&0xFF00FF) + (e&0xFF00FF) + (c&0xFF00FF) + (d&0xFF00FF);
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1641 const int h= (a&0x00FF00) + (e&0x00FF00) + (c&0x00FF00) + (d&0x00FF00);
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1642 const int b= l&0x3FF;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1643 const int g= h>>8;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1644 const int r= l>>16;
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1645
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1646 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1647 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1648 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1649 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1650
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1651 static inline void RENAME(bgr24ToY)(uint8_t *dst, uint8_t *src, long width)
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1652 {
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1653 #ifdef HAVE_MMX
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1654 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1655 "mov %2, %%"REG_a" \n\t"
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1656 "movq "MANGLE(bgr2YCoeff)", %%mm6 \n\t"
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1657 "movq "MANGLE(w1111)", %%mm5 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1658 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1659 "lea (%%"REG_a", %%"REG_a", 2), %%"REG_b"\n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1660 ".balign 16 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1661 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1662 PREFETCH" 64(%0, %%"REG_b") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1663 "movd (%0, %%"REG_b"), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1664 "movd 3(%0, %%"REG_b"), %%mm1 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1665 "punpcklbw %%mm7, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1666 "punpcklbw %%mm7, %%mm1 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1667 "movd 6(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1668 "movd 9(%0, %%"REG_b"), %%mm3 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1669 "punpcklbw %%mm7, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1670 "punpcklbw %%mm7, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1671 "pmaddwd %%mm6, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1672 "pmaddwd %%mm6, %%mm1 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1673 "pmaddwd %%mm6, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1674 "pmaddwd %%mm6, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1675 #ifndef FAST_BGR2YV12
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1676 "psrad $8, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1677 "psrad $8, %%mm1 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1678 "psrad $8, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1679 "psrad $8, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1680 #endif
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1681 "packssdw %%mm1, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1682 "packssdw %%mm3, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1683 "pmaddwd %%mm5, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1684 "pmaddwd %%mm5, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1685 "packssdw %%mm2, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1686 "psraw $7, %%mm0 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1687
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1688 "movd 12(%0, %%"REG_b"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1689 "movd 15(%0, %%"REG_b"), %%mm1 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1690 "punpcklbw %%mm7, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1691 "punpcklbw %%mm7, %%mm1 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1692 "movd 18(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1693 "movd 21(%0, %%"REG_b"), %%mm3 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1694 "punpcklbw %%mm7, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1695 "punpcklbw %%mm7, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1696 "pmaddwd %%mm6, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1697 "pmaddwd %%mm6, %%mm1 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1698 "pmaddwd %%mm6, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1699 "pmaddwd %%mm6, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1700 #ifndef FAST_BGR2YV12
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1701 "psrad $8, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1702 "psrad $8, %%mm1 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1703 "psrad $8, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1704 "psrad $8, %%mm3 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1705 #endif
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1706 "packssdw %%mm1, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1707 "packssdw %%mm3, %%mm2 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1708 "pmaddwd %%mm5, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1709 "pmaddwd %%mm5, %%mm2 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1710 "add $24, %%"REG_b" \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1711 "packssdw %%mm2, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1712 "psraw $7, %%mm4 \n\t"
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1713
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1714 "packuswb %%mm4, %%mm0 \n\t"
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1715 "paddusb "MANGLE(bgr2YOffset)", %%mm0 \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1716
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1717 "movq %%mm0, (%1, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1718 "add $8, %%"REG_a" \n\t"
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1719 " js 1b \n\t"
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1720 : : "r" (src+width*3), "r" (dst+width), "g" (-width)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1721 : "%"REG_a, "%"REG_b
4612
4edfdec1dc12 bgr24toY in MMX
michael
parents: 4580
diff changeset
1722 );
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1723 #else
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1724 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1725 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1726 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1727 int b= src[i*3+0];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1728 int g= src[i*3+1];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1729 int r= src[i*3+2];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1730
9434
michael
parents: 9433
diff changeset
1731 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT);
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1732 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1733 #endif
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1734 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1735
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1736 static inline void RENAME(bgr24ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, long width)
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1737 {
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1738 #ifdef HAVE_MMX
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1739 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1740 "mov %4, %%"REG_a" \n\t"
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1741 "movq "MANGLE(w1111)", %%mm5 \n\t"
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1742 "movq "MANGLE(bgr2UCoeff)", %%mm6 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1743 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1744 "lea (%%"REG_a", %%"REG_a", 2), %%"REG_b" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1745 "add %%"REG_b", %%"REG_b" \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1746 ".balign 16 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1747 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1748 PREFETCH" 64(%0, %%"REG_b") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1749 PREFETCH" 64(%1, %%"REG_b") \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1750 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1751 "movq (%0, %%"REG_b"), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1752 "movq (%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1753 "movq 6(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1754 "movq 6(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1755 PAVGB(%%mm1, %%mm0)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1756 PAVGB(%%mm3, %%mm2)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1757 "movq %%mm0, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1758 "movq %%mm2, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1759 "psrlq $24, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1760 "psrlq $24, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1761 PAVGB(%%mm1, %%mm0)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1762 PAVGB(%%mm3, %%mm2)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1763 "punpcklbw %%mm7, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1764 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1765 #else
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1766 "movd (%0, %%"REG_b"), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1767 "movd (%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1768 "movd 3(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1769 "movd 3(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1770 "punpcklbw %%mm7, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1771 "punpcklbw %%mm7, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1772 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1773 "punpcklbw %%mm7, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1774 "paddw %%mm1, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1775 "paddw %%mm3, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1776 "paddw %%mm2, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1777 "movd 6(%0, %%"REG_b"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1778 "movd 6(%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1779 "movd 9(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1780 "movd 9(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1781 "punpcklbw %%mm7, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1782 "punpcklbw %%mm7, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1783 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1784 "punpcklbw %%mm7, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1785 "paddw %%mm1, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1786 "paddw %%mm3, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1787 "paddw %%mm4, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1788 "psrlw $2, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1789 "psrlw $2, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1790 #endif
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1791 "movq "MANGLE(bgr2VCoeff)", %%mm1 \n\t"
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1792 "movq "MANGLE(bgr2VCoeff)", %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1793
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1794 "pmaddwd %%mm0, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1795 "pmaddwd %%mm2, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1796 "pmaddwd %%mm6, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1797 "pmaddwd %%mm6, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1798 #ifndef FAST_BGR2YV12
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1799 "psrad $8, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1800 "psrad $8, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1801 "psrad $8, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1802 "psrad $8, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1803 #endif
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1804 "packssdw %%mm2, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1805 "packssdw %%mm3, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1806 "pmaddwd %%mm5, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1807 "pmaddwd %%mm5, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1808 "packssdw %%mm1, %%mm0 \n\t" // V1 V0 U1 U0
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1809 "psraw $7, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1810
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1811 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1812 "movq 12(%0, %%"REG_b"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1813 "movq 12(%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1814 "movq 18(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1815 "movq 18(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1816 PAVGB(%%mm1, %%mm4)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1817 PAVGB(%%mm3, %%mm2)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1818 "movq %%mm4, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1819 "movq %%mm2, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1820 "psrlq $24, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1821 "psrlq $24, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1822 PAVGB(%%mm1, %%mm4)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1823 PAVGB(%%mm3, %%mm2)
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1824 "punpcklbw %%mm7, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1825 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1826 #else
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1827 "movd 12(%0, %%"REG_b"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1828 "movd 12(%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1829 "movd 15(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1830 "movd 15(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1831 "punpcklbw %%mm7, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1832 "punpcklbw %%mm7, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1833 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1834 "punpcklbw %%mm7, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1835 "paddw %%mm1, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1836 "paddw %%mm3, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1837 "paddw %%mm2, %%mm4 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1838 "movd 18(%0, %%"REG_b"), %%mm5 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1839 "movd 18(%1, %%"REG_b"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1840 "movd 21(%0, %%"REG_b"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1841 "movd 21(%1, %%"REG_b"), %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1842 "punpcklbw %%mm7, %%mm5 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1843 "punpcklbw %%mm7, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1844 "punpcklbw %%mm7, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1845 "punpcklbw %%mm7, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1846 "paddw %%mm1, %%mm5 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1847 "paddw %%mm3, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1848 "paddw %%mm5, %%mm2 \n\t"
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1849 "movq "MANGLE(w1111)", %%mm5 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1850 "psrlw $2, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1851 "psrlw $2, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1852 #endif
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1853 "movq "MANGLE(bgr2VCoeff)", %%mm1 \n\t"
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1854 "movq "MANGLE(bgr2VCoeff)", %%mm3 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1855
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1856 "pmaddwd %%mm4, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1857 "pmaddwd %%mm2, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1858 "pmaddwd %%mm6, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1859 "pmaddwd %%mm6, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1860 #ifndef FAST_BGR2YV12
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1861 "psrad $8, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1862 "psrad $8, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1863 "psrad $8, %%mm2 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1864 "psrad $8, %%mm3 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1865 #endif
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1866 "packssdw %%mm2, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1867 "packssdw %%mm3, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1868 "pmaddwd %%mm5, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1869 "pmaddwd %%mm5, %%mm1 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1870 "add $24, %%"REG_b" \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1871 "packssdw %%mm1, %%mm4 \n\t" // V3 V2 U3 U2
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1872 "psraw $7, %%mm4 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1873
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1874 "movq %%mm0, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1875 "punpckldq %%mm4, %%mm0 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1876 "punpckhdq %%mm4, %%mm1 \n\t"
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1877 "packsswb %%mm1, %%mm0 \n\t"
4923
3cc0f4938be1 add mangling
atmos4
parents: 4794
diff changeset
1878 "paddb "MANGLE(bgr2UVOffset)", %%mm0 \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1879
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1880 "movd %%mm0, (%2, %%"REG_a") \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1881 "punpckhdq %%mm0, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1882 "movd %%mm0, (%3, %%"REG_a") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1883 "add $4, %%"REG_a" \n\t"
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1884 " js 1b \n\t"
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
1885 : : "r" (src1+width*6), "r" (src2+width*6), "r" (dstU+width), "r" (dstV+width), "g" (-width)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
1886 : "%"REG_a, "%"REG_b
4619
ef213d64e20a bgr24toUV in MMX
michael
parents: 4612
diff changeset
1887 );
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1888 #else
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1889 int i;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1890 for(i=0; i<width; i++)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1891 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1892 int b= src1[6*i + 0] + src1[6*i + 3] + src2[6*i + 0] + src2[6*i + 3];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1893 int g= src1[6*i + 1] + src1[6*i + 4] + src2[6*i + 1] + src2[6*i + 4];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1894 int r= src1[6*i + 2] + src1[6*i + 5] + src2[6*i + 2] + src2[6*i + 5];
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1895
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1896 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1897 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1898 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1899 #endif
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1900 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
1901
4578
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1902 static inline void RENAME(bgr16ToY)(uint8_t *dst, uint8_t *src, int width)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1903 {
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1904 int i;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1905 for(i=0; i<width; i++)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1906 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1907 int d= ((uint16_t*)src)[i];
4578
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1908 int b= d&0x1F;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1909 int g= (d>>5)&0x3F;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1910 int r= (d>>11)&0x1F;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1911
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1912 dst[i]= ((2*RY*r + GY*g + 2*BY*b)>>(RGB2YUV_SHIFT-2)) + 16;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1913 }
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1914 }
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1915
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1916 static inline void RENAME(bgr16ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1917 {
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1918 int i;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1919 for(i=0; i<width; i++)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1920 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1921 int d0= ((uint32_t*)src1)[i];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1922 int d1= ((uint32_t*)src2)[i];
4579
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1923
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1924 int dl= (d0&0x07E0F81F) + (d1&0x07E0F81F);
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1925 int dh= ((d0>>5)&0x07C0F83F) + ((d1>>5)&0x07C0F83F);
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1926
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1927 int dh2= (dh>>11) + (dh<<21);
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1928 int d= dh2 + dl;
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1929
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1930 int b= d&0x7F;
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1931 int r= (d>>11)&0x7F;
c35454989164 faster bgr16 input
michael
parents: 4578
diff changeset
1932 int g= d>>21;
4578
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1933 dstU[i]= ((2*RU*r + GU*g + 2*BU*b)>>(RGB2YUV_SHIFT+2-2)) + 128;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1934 dstV[i]= ((2*RV*r + GV*g + 2*BV*b)>>(RGB2YUV_SHIFT+2-2)) + 128;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1935 }
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1936 }
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
1937
4580
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1938 static inline void RENAME(bgr15ToY)(uint8_t *dst, uint8_t *src, int width)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1939 {
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1940 int i;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1941 for(i=0; i<width; i++)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1942 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1943 int d= ((uint16_t*)src)[i];
4580
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1944 int b= d&0x1F;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1945 int g= (d>>5)&0x1F;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1946 int r= (d>>10)&0x1F;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1947
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1948 dst[i]= ((RY*r + GY*g + BY*b)>>(RGB2YUV_SHIFT-3)) + 16;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1949 }
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1950 }
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1951
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1952 static inline void RENAME(bgr15ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1953 {
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1954 int i;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1955 for(i=0; i<width; i++)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1956 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1957 int d0= ((uint32_t*)src1)[i];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1958 int d1= ((uint32_t*)src2)[i];
4580
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1959
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1960 int dl= (d0&0x03E07C1F) + (d1&0x03E07C1F);
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1961 int dh= ((d0>>5)&0x03E0F81F) + ((d1>>5)&0x03E0F81F);
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1962
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1963 int dh2= (dh>>11) + (dh<<21);
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1964 int d= dh2 + dl;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1965
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1966 int b= d&0x7F;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1967 int r= (d>>10)&0x7F;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1968 int g= d>>21;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1969 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2-3)) + 128;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1970 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2-3)) + 128;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1971 }
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1972 }
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1973
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
1974
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1975 static inline void RENAME(rgb32ToY)(uint8_t *dst, uint8_t *src, int width)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1976 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1977 int i;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1978 for(i=0; i<width; i++)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1979 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1980 int r= ((uint32_t*)src)[i]&0xFF;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1981 int g= (((uint32_t*)src)[i]>>8)&0xFF;
9499
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
1982 int b= (((uint32_t*)src)[i]>>16)&0xFF;
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1983
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1984 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT);
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1985 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1986 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1987
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1988 static inline void RENAME(rgb32ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1989 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1990 int i;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1991 for(i=0; i<width; i++)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
1992 {
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1993 const int a= ((uint32_t*)src1)[2*i+0];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1994 const int e= ((uint32_t*)src1)[2*i+1];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1995 const int c= ((uint32_t*)src2)[2*i+0];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1996 const int d= ((uint32_t*)src2)[2*i+1];
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1997 const int l= (a&0xFF00FF) + (e&0xFF00FF) + (c&0xFF00FF) + (d&0xFF00FF);
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1998 const int h= (a&0x00FF00) + (e&0x00FF00) + (c&0x00FF00) + (d&0x00FF00);
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
1999 const int r= l&0x3FF;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
2000 const int g= h>>8;
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
2001 const int b= l>>16;
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2002
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2003 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2004 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2005 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2006 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2007
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2008 static inline void RENAME(rgb24ToY)(uint8_t *dst, uint8_t *src, int width)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2009 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2010 int i;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2011 for(i=0; i<width; i++)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2012 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2013 int r= src[i*3+0];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2014 int g= src[i*3+1];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2015 int b= src[i*3+2];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2016
9433
53f03173e48f bigendian bug (fixes?)
michael
parents: 9417
diff changeset
2017 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT);
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2018 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2019 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2020
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2021 static inline void RENAME(rgb24ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2022 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2023 int i;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2024 for(i=0; i<width; i++)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2025 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2026 int r= src1[6*i + 0] + src1[6*i + 3] + src2[6*i + 0] + src2[6*i + 3];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2027 int g= src1[6*i + 1] + src1[6*i + 4] + src2[6*i + 1] + src2[6*i + 4];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2028 int b= src1[6*i + 2] + src1[6*i + 5] + src2[6*i + 2] + src2[6*i + 5];
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2029
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2030 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2031 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2032 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2033 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2034
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2035
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2036 // Bilinear / Bicubic scaling
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2037 static inline void RENAME(hScale)(int16_t *dst, int dstW, uint8_t *src, int srcW, int xInc,
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
2038 int16_t *filter, int16_t *filterPos, long filterSize)
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2039 {
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2040 #ifdef HAVE_MMX
9921
61057de81510 mplayer idependant (not really yet) swscale example
michael
parents: 9499
diff changeset
2041 assert(filterSize % 4 == 0 && filterSize>0);
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2042 if(filterSize==4) // allways true for upscaling, sometimes for down too
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2043 {
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2044 long counter= -2*dstW;
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2045 filter-= counter*2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2046 filterPos-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2047 dst-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2048 asm volatile(
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2049 "pxor %%mm7, %%mm7 \n\t"
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
2050 "movq "MANGLE(w02)", %%mm6 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2051 "push %%"REG_BP" \n\t" // we use 7 regs here ...
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2052 "mov %%"REG_a", %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2053 ".balign 16 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2054 "1: \n\t"
13733
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2055 "movzwl (%2, %%"REG_BP"), %%eax \n\t"
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2056 "movzwl 2(%2, %%"REG_BP"), %%ebx\n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2057 "movq (%1, %%"REG_BP", 4), %%mm1\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2058 "movq 8(%1, %%"REG_BP", 4), %%mm3\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2059 "movd (%3, %%"REG_a"), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2060 "movd (%3, %%"REG_b"), %%mm2 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2061 "punpcklbw %%mm7, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2062 "punpcklbw %%mm7, %%mm2 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2063 "pmaddwd %%mm1, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2064 "pmaddwd %%mm2, %%mm3 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2065 "psrad $8, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2066 "psrad $8, %%mm3 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2067 "packssdw %%mm3, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2068 "pmaddwd %%mm6, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2069 "packssdw %%mm0, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2070 "movd %%mm0, (%4, %%"REG_BP") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2071 "add $4, %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2072 " jnc 1b \n\t"
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2073
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2074 "pop %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2075 : "+a" (counter)
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2076 : "c" (filter), "d" (filterPos), "S" (src), "D" (dst)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2077 : "%"REG_b
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2078 );
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2079 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2080 else if(filterSize==8)
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2081 {
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2082 long counter= -2*dstW;
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2083 filter-= counter*4;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2084 filterPos-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2085 dst-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2086 asm volatile(
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2087 "pxor %%mm7, %%mm7 \n\t"
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
2088 "movq "MANGLE(w02)", %%mm6 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2089 "push %%"REG_BP" \n\t" // we use 7 regs here ...
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2090 "mov %%"REG_a", %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2091 ".balign 16 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2092 "1: \n\t"
13733
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2093 "movzwl (%2, %%"REG_BP"), %%eax \n\t"
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2094 "movzwl 2(%2, %%"REG_BP"), %%ebx\n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2095 "movq (%1, %%"REG_BP", 8), %%mm1\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2096 "movq 16(%1, %%"REG_BP", 8), %%mm3\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2097 "movd (%3, %%"REG_a"), %%mm0 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2098 "movd (%3, %%"REG_b"), %%mm2 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2099 "punpcklbw %%mm7, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2100 "punpcklbw %%mm7, %%mm2 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2101 "pmaddwd %%mm1, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2102 "pmaddwd %%mm2, %%mm3 \n\t"
2316
bcb229557e9b fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents: 2297
diff changeset
2103
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2104 "movq 8(%1, %%"REG_BP", 8), %%mm1\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2105 "movq 24(%1, %%"REG_BP", 8), %%mm5\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2106 "movd 4(%3, %%"REG_a"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2107 "movd 4(%3, %%"REG_b"), %%mm2 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2108 "punpcklbw %%mm7, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2109 "punpcklbw %%mm7, %%mm2 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2110 "pmaddwd %%mm1, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2111 "pmaddwd %%mm2, %%mm5 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2112 "paddd %%mm4, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2113 "paddd %%mm5, %%mm3 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2114
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2115 "psrad $8, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2116 "psrad $8, %%mm3 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2117 "packssdw %%mm3, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2118 "pmaddwd %%mm6, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2119 "packssdw %%mm0, %%mm0 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2120 "movd %%mm0, (%4, %%"REG_BP") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2121 "add $4, %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2122 " jnc 1b \n\t"
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2123
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2124 "pop %%"REG_BP" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2125 : "+a" (counter)
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2126 : "c" (filter), "d" (filterPos), "S" (src), "D" (dst)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2127 : "%"REG_b
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2128 );
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2129 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2130 else
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2131 {
15617
130dd060f723 one bugfix and a few gcc4 bug workaorunds by (Gianluigi Tiesi: mplayer, netfarm it)
michael
parents: 15295
diff changeset
2132 uint8_t *offset = src+filterSize;
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2133 long counter= -2*dstW;
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2134 // filter-= counter*filterSize/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2135 filterPos-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2136 dst-= counter/2;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2137 asm volatile(
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2138 "pxor %%mm7, %%mm7 \n\t"
4248
3cdb86beebce mangle for win32 in postproc
atmos4
parents: 3883
diff changeset
2139 "movq "MANGLE(w02)", %%mm6 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2140 ".balign 16 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2141 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2142 "mov %2, %%"REG_c" \n\t"
13733
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2143 "movzwl (%%"REG_c", %0), %%eax \n\t"
c45cf718dfe8 10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents: 13720
diff changeset
2144 "movzwl 2(%%"REG_c", %0), %%ebx \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2145 "mov %5, %%"REG_c" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2146 "pxor %%mm4, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2147 "pxor %%mm5, %%mm5 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2148 "2: \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2149 "movq (%1), %%mm1 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2150 "movq (%1, %6), %%mm3 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2151 "movd (%%"REG_c", %%"REG_a"), %%mm0\n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2152 "movd (%%"REG_c", %%"REG_b"), %%mm2\n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2153 "punpcklbw %%mm7, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2154 "punpcklbw %%mm7, %%mm2 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2155 "pmaddwd %%mm1, %%mm0 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2156 "pmaddwd %%mm2, %%mm3 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2157 "paddd %%mm3, %%mm5 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2158 "paddd %%mm0, %%mm4 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2159 "add $8, %1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2160 "add $4, %%"REG_c" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2161 "cmp %4, %%"REG_c" \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2162 " jb 2b \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2163 "add %6, %1 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2164 "psrad $8, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2165 "psrad $8, %%mm5 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2166 "packssdw %%mm5, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2167 "pmaddwd %%mm6, %%mm4 \n\t"
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2168 "packssdw %%mm4, %%mm4 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2169 "mov %3, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2170 "movd %%mm4, (%%"REG_a", %0) \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2171 "add $4, %0 \n\t"
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2172 " jnc 1b \n\t"
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2173
3641
33c560ffd3dc minor bugfixes (noone noticed them)
michael
parents: 3352
diff changeset
2174 : "+r" (counter), "+r" (filter)
15617
130dd060f723 one bugfix and a few gcc4 bug workaorunds by (Gianluigi Tiesi: mplayer, netfarm it)
michael
parents: 15295
diff changeset
2175 : "m" (filterPos), "m" (dst), "m"(offset),
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
2176 "m" (src), "r" (filterSize*2)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2177 : "%"REG_b, "%"REG_a, "%"REG_c
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2178 );
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2179 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2180 #else
12130
2ef24558b732 AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents: 12017
diff changeset
2181 #ifdef HAVE_ALTIVEC
2ef24558b732 AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents: 12017
diff changeset
2182 hScale_altivec_real(dst, dstW, src, srcW, xInc, filter, filterPos, filterSize);
2ef24558b732 AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents: 12017
diff changeset
2183 #else
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2184 int i;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2185 for(i=0; i<dstW; i++)
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2186 {
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2187 int j;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2188 int srcPos= filterPos[i];
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2189 int val=0;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2190 // printf("filterPos: %d\n", filterPos[i]);
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2191 for(j=0; j<filterSize; j++)
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2192 {
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2193 // printf("filter: %d, src: %d\n", filter[i], src[srcPos + j]);
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2194 val += ((int)src[srcPos + j])*filter[filterSize*i + j];
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2195 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2196 // filter += hFilterSize;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2197 dst[i] = MIN(MAX(0, val>>7), (1<<15)-1); // the cubic equation does overflow ...
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2198 // dst[i] = val>>7;
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2199 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2200 #endif
12130
2ef24558b732 AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents: 12017
diff changeset
2201 #endif
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2202 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2203 // *** horizontal scale Y line to temp buffer
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2204 static inline void RENAME(hyscale)(uint16_t *dst, int dstWidth, uint8_t *src, int srcW, int xInc,
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2205 int flags, int canMMX2BeUsed, int16_t *hLumFilter,
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2206 int16_t *hLumFilterPos, int hLumFilterSize, void *funnyYCode,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2207 int srcFormat, uint8_t *formatConvBuffer, int16_t *mmx2Filter,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2208 int32_t *mmx2FilterPos)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2209 {
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2210 if(srcFormat==IMGFMT_YUY2)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2211 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2212 RENAME(yuy2ToY)(formatConvBuffer, src, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2213 src= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2214 }
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2215 else if(srcFormat==IMGFMT_UYVY)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2216 {
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2217 RENAME(uyvyToY)(formatConvBuffer, src, srcW);
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2218 src= formatConvBuffer;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2219 }
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2220 else if(srcFormat==IMGFMT_BGR32)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2221 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2222 RENAME(bgr32ToY)(formatConvBuffer, src, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2223 src= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2224 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2225 else if(srcFormat==IMGFMT_BGR24)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2226 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2227 RENAME(bgr24ToY)(formatConvBuffer, src, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2228 src= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2229 }
4578
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2230 else if(srcFormat==IMGFMT_BGR16)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2231 {
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2232 RENAME(bgr16ToY)(formatConvBuffer, src, srcW);
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2233 src= formatConvBuffer;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2234 }
4580
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2235 else if(srcFormat==IMGFMT_BGR15)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2236 {
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2237 RENAME(bgr15ToY)(formatConvBuffer, src, srcW);
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2238 src= formatConvBuffer;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2239 }
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2240 else if(srcFormat==IMGFMT_RGB32)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2241 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2242 RENAME(rgb32ToY)(formatConvBuffer, src, srcW);
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2243 src= formatConvBuffer;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2244 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2245 else if(srcFormat==IMGFMT_RGB24)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2246 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2247 RENAME(rgb24ToY)(formatConvBuffer, src, srcW);
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2248 src= formatConvBuffer;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2249 }
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2250
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2251 #ifdef HAVE_MMX
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2252 // use the new MMX scaler if the mmx2 can't be used (its faster than the x86asm one)
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2253 if(!(flags&SWS_FAST_BILINEAR) || (!canMMX2BeUsed))
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2254 #else
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2255 if(!(flags&SWS_FAST_BILINEAR))
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2256 #endif
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2257 {
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2258 RENAME(hScale)(dst, dstWidth, src, srcW, xInc, hLumFilter, hLumFilterPos, hLumFilterSize);
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2259 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2260 else // Fast Bilinear upscale / crap downscale
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2261 {
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2262 #if defined(ARCH_X86) || defined(ARCH_X86_64)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2263 #ifdef HAVE_MMX2
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2264 int i;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2265 if(canMMX2BeUsed)
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2266 {
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2267 asm volatile(
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2268 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2269 "mov %0, %%"REG_c" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2270 "mov %1, %%"REG_D" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2271 "mov %2, %%"REG_d" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2272 "mov %3, %%"REG_b" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2273 "xor %%"REG_a", %%"REG_a" \n\t" // i
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2274 PREFETCH" (%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2275 PREFETCH" 32(%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2276 PREFETCH" 64(%%"REG_c") \n\t"
2520
b58c43aab619 3dnow prefetch & sfence
michael
parents: 2519
diff changeset
2277
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2278 #ifdef ARCH_X86_64
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2279
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2280 #define FUNNY_Y_CODE \
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2281 "movl (%%"REG_b"), %%esi \n\t"\
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2282 "call *%4 \n\t"\
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2283 "movl (%%"REG_b", %%"REG_a"), %%esi\n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2284 "add %%"REG_S", %%"REG_c" \n\t"\
14536
6f13379b1464 100l, fix broken AMD64 patch. To whoever applied it: Did you actually _try_
reimar
parents: 13733
diff changeset
2285 "add %%"REG_a", %%"REG_D" \n\t"\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2286 "xor %%"REG_a", %%"REG_a" \n\t"\
2520
b58c43aab619 3dnow prefetch & sfence
michael
parents: 2519
diff changeset
2287
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2288 #else
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2289
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2290 #define FUNNY_Y_CODE \
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2291 "movl (%%"REG_b"), %%esi \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2292 "call *%4 \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2293 "addl (%%"REG_b", %%"REG_a"), %%"REG_c"\n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2294 "add %%"REG_a", %%"REG_D" \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2295 "xor %%"REG_a", %%"REG_a" \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2296
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2297 #endif
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2298
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2299 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2300 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2301 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2302 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2303 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2304 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2305 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2306 FUNNY_Y_CODE
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2307
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2308 :: "m" (src), "m" (dst), "m" (mmx2Filter), "m" (mmx2FilterPos),
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2309 "m" (funnyYCode)
14536
6f13379b1464 100l, fix broken AMD64 patch. To whoever applied it: Did you actually _try_
reimar
parents: 13733
diff changeset
2310 : "%"REG_a, "%"REG_b, "%"REG_c, "%"REG_d, "%"REG_S, "%"REG_D
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2311 );
3215
3083616ba4d6 sliced scaleing bugfix
michael
parents: 3209
diff changeset
2312 for(i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--) dst[i] = src[srcW-1]*128;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2313 }
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2314 else
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2315 {
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2316 #endif
15617
130dd060f723 one bugfix and a few gcc4 bug workaorunds by (Gianluigi Tiesi: mplayer, netfarm it)
michael
parents: 15295
diff changeset
2317 int xInc_shr16 = xInc >> 16;
130dd060f723 one bugfix and a few gcc4 bug workaorunds by (Gianluigi Tiesi: mplayer, netfarm it)
michael
parents: 15295
diff changeset
2318 int xInc_mask = xInc & 0xffff;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2319 //NO MMX just normal asm ...
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2320 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2321 "xor %%"REG_a", %%"REG_a" \n\t" // i
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2322 "xor %%"REG_b", %%"REG_b" \n\t" // xx
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2323 "xorl %%ecx, %%ecx \n\t" // 2*xalpha
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
2324 ".balign 16 \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2325 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2326 "movzbl (%0, %%"REG_b"), %%edi \n\t" //src[xx]
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2327 "movzbl 1(%0, %%"REG_b"), %%esi \n\t" //src[xx+1]
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2328 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx]
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2329 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2330 "shll $16, %%edi \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2331 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2332 "mov %1, %%"REG_D" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2333 "shrl $9, %%esi \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2334 "movw %%si, (%%"REG_D", %%"REG_a", 2)\n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2335 "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2336 "adc %3, %%"REG_b" \n\t" //xx+= xInc>>8 + carry
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2337
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2338 "movzbl (%0, %%"REG_b"), %%edi \n\t" //src[xx]
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2339 "movzbl 1(%0, %%"REG_b"), %%esi \n\t" //src[xx+1]
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2340 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx]
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2341 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2342 "shll $16, %%edi \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2343 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2344 "mov %1, %%"REG_D" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2345 "shrl $9, %%esi \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2346 "movw %%si, 2(%%"REG_D", %%"REG_a", 2)\n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2347 "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2348 "adc %3, %%"REG_b" \n\t" //xx+= xInc>>8 + carry
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2349
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2350
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2351 "add $2, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2352 "cmp %2, %%"REG_a" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2353 " jb 1b \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2354
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2355
15617
130dd060f723 one bugfix and a few gcc4 bug workaorunds by (Gianluigi Tiesi: mplayer, netfarm it)
michael
parents: 15295
diff changeset
2356 :: "r" (src), "m" (dst), "m" (dstWidth), "m" (xInc_shr16), "m" (xInc_mask)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2357 : "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2358 );
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2359 #ifdef HAVE_MMX2
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2360 } //if MMX2 can't be used
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2361 #endif
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2362 #else
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2363 int i;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2364 unsigned int xpos=0;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2365 for(i=0;i<dstWidth;i++)
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2366 {
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2367 register unsigned int xx=xpos>>16;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2368 register unsigned int xalpha=(xpos&0xFFFF)>>9;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2369 dst[i]= (src[xx]<<7) + (src[xx+1] - src[xx])*xalpha;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2370 xpos+=xInc;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2371 }
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2372 #endif
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2373 }
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2374 }
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2375
16739
e91f944f6ed9 Change unsigned->signed and int->long, this fits the asm code better on 64
reimar
parents: 15972
diff changeset
2376 inline static void RENAME(hcscale)(uint16_t *dst, long dstWidth, uint8_t *src1, uint8_t *src2,
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2377 int srcW, int xInc, int flags, int canMMX2BeUsed, int16_t *hChrFilter,
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2378 int16_t *hChrFilterPos, int hChrFilterSize, void *funnyUVCode,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2379 int srcFormat, uint8_t *formatConvBuffer, int16_t *mmx2Filter,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2380 int32_t *mmx2FilterPos)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2381 {
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2382 if(srcFormat==IMGFMT_YUY2)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2383 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2384 RENAME(yuy2ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2385 src1= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2386 src2= formatConvBuffer+2048;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2387 }
9071
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2388 else if(srcFormat==IMGFMT_UYVY)
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2389 {
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2390 RENAME(uyvyToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2391 src1= formatConvBuffer;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2392 src2= formatConvBuffer+2048;
25baacd1c650 UYVY input
michael
parents: 8254
diff changeset
2393 }
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2394 else if(srcFormat==IMGFMT_BGR32)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2395 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2396 RENAME(bgr32ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2397 src1= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2398 src2= formatConvBuffer+2048;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2399 }
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2400 else if(srcFormat==IMGFMT_BGR24)
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2401 {
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2402 RENAME(bgr24ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2403 src1= formatConvBuffer;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2404 src2= formatConvBuffer+2048;
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2405 }
4578
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2406 else if(srcFormat==IMGFMT_BGR16)
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2407 {
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2408 RENAME(bgr16ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2409 src1= formatConvBuffer;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2410 src2= formatConvBuffer+2048;
395b1233b856 bgr16 input support
michael
parents: 4558
diff changeset
2411 }
4580
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2412 else if(srcFormat==IMGFMT_BGR15)
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2413 {
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2414 RENAME(bgr15ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2415 src1= formatConvBuffer;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2416 src2= formatConvBuffer+2048;
f01ed4dfa868 bgr15 input support
michael
parents: 4579
diff changeset
2417 }
4558
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2418 else if(srcFormat==IMGFMT_RGB32)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2419 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2420 RENAME(rgb32ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2421 src1= formatConvBuffer;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2422 src2= formatConvBuffer+2048;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2423 }
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2424 else if(srcFormat==IMGFMT_RGB24)
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2425 {
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2426 RENAME(rgb24ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW);
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2427 src1= formatConvBuffer;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2428 src2= formatConvBuffer+2048;
aac57ef92bab rgb32 & rgb24 input support
michael
parents: 4554
diff changeset
2429 }
4481
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
2430 else if(isGray(srcFormat))
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
2431 {
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
2432 return;
b8ec9cc1b2c5 MMX(2) optimized YUY2 input
michael
parents: 4467
diff changeset
2433 }
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2434
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2435 #ifdef HAVE_MMX
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2436 // use the new MMX scaler if the mmx2 can't be used (its faster than the x86asm one)
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2437 if(!(flags&SWS_FAST_BILINEAR) || (!canMMX2BeUsed))
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2438 #else
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2439 if(!(flags&SWS_FAST_BILINEAR))
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2440 #endif
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2441 {
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2442 RENAME(hScale)(dst , dstWidth, src1, srcW, xInc, hChrFilter, hChrFilterPos, hChrFilterSize);
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2443 RENAME(hScale)(dst+2048, dstWidth, src2, srcW, xInc, hChrFilter, hChrFilterPos, hChrFilterSize);
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2444 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2445 else // Fast Bilinear upscale / crap downscale
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2446 {
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2447 #if defined(ARCH_X86) || defined(ARCH_X86_64)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2448 #ifdef HAVE_MMX2
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2449 int i;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2450 if(canMMX2BeUsed)
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2451 {
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2452 asm volatile(
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2453 "pxor %%mm7, %%mm7 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2454 "mov %0, %%"REG_c" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2455 "mov %1, %%"REG_D" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2456 "mov %2, %%"REG_d" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2457 "mov %3, %%"REG_b" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2458 "xor %%"REG_a", %%"REG_a" \n\t" // i
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2459 PREFETCH" (%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2460 PREFETCH" 32(%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2461 PREFETCH" 64(%%"REG_c") \n\t"
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2462
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2463 #ifdef ARCH_X86_64
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2464
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2465 #define FUNNY_UV_CODE \
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2466 "movl (%%"REG_b"), %%esi \n\t"\
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2467 "call *%4 \n\t"\
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2468 "movl (%%"REG_b", %%"REG_a"), %%esi\n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2469 "add %%"REG_S", %%"REG_c" \n\t"\
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2470 "add %%"REG_a", %%"REG_D" \n\t"\
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2471 "xor %%"REG_a", %%"REG_a" \n\t"\
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2472
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2473 #else
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2474
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2475 #define FUNNY_UV_CODE \
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2476 "movl (%%"REG_b"), %%esi \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2477 "call *%4 \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2478 "addl (%%"REG_b", %%"REG_a"), %%"REG_c"\n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2479 "add %%"REG_a", %%"REG_D" \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2480 "xor %%"REG_a", %%"REG_a" \n\t"\
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2481
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2482 #endif
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2483
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2484 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2485 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2486 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2487 FUNNY_UV_CODE
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2488 "xor %%"REG_a", %%"REG_a" \n\t" // i
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2489 "mov %5, %%"REG_c" \n\t" // src
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2490 "mov %1, %%"REG_D" \n\t" // buf1
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2491 "add $4096, %%"REG_D" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2492 PREFETCH" (%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2493 PREFETCH" 32(%%"REG_c") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2494 PREFETCH" 64(%%"REG_c") \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2495
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2496 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2497 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2498 FUNNY_UV_CODE
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2499 FUNNY_UV_CODE
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2500
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2501 :: "m" (src1), "m" (dst), "m" (mmx2Filter), "m" (mmx2FilterPos),
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2502 "m" (funnyUVCode), "m" (src2)
14556
31cb219364a4 fix few x86_64 registers handling
aurel
parents: 14536
diff changeset
2503 : "%"REG_a, "%"REG_b, "%"REG_c, "%"REG_d, "%"REG_S, "%"REG_D
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2504 );
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2505 for(i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2506 {
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2507 // printf("%d %d %d\n", dstWidth, i, srcW);
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2508 dst[i] = src1[srcW-1]*128;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2509 dst[i+2048] = src2[srcW-1]*128;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2510 }
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2511 }
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2512 else
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2513 {
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2514 #endif
15617
130dd060f723 one bugfix and a few gcc4 bug workaorunds by (Gianluigi Tiesi: mplayer, netfarm it)
michael
parents: 15295
diff changeset
2515 long xInc_shr16 = (long) (xInc >> 16);
130dd060f723 one bugfix and a few gcc4 bug workaorunds by (Gianluigi Tiesi: mplayer, netfarm it)
michael
parents: 15295
diff changeset
2516 int xInc_mask = xInc & 0xffff;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2517 asm volatile(
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2518 "xor %%"REG_a", %%"REG_a" \n\t" // i
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2519 "xor %%"REG_b", %%"REG_b" \n\t" // xx
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2520 "xorl %%ecx, %%ecx \n\t" // 2*xalpha
2800
7847d6b7ad3d .balign or we¡­ll align by 64kb on some architectures
michael
parents: 2799
diff changeset
2521 ".balign 16 \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2522 "1: \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2523 "mov %0, %%"REG_S" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2524 "movzbl (%%"REG_S", %%"REG_b"), %%edi \n\t" //src[xx]
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2525 "movzbl 1(%%"REG_S", %%"REG_b"), %%esi \n\t" //src[xx+1]
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2526 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx]
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2527 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2528 "shll $16, %%edi \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2529 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2530 "mov %1, %%"REG_D" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2531 "shrl $9, %%esi \n\t"
15845
7ccbf83d108d Another REG_d -> REG_D fix.
reimar
parents: 15813
diff changeset
2532 "movw %%si, (%%"REG_D", %%"REG_a", 2)\n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2533
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2534 "movzbl (%5, %%"REG_b"), %%edi \n\t" //src[xx]
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2535 "movzbl 1(%5, %%"REG_b"), %%esi \n\t" //src[xx+1]
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2536 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx]
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2537 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2538 "shll $16, %%edi \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2539 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2540 "mov %1, %%"REG_D" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2541 "shrl $9, %%esi \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2542 "movw %%si, 4096(%%"REG_D", %%"REG_a", 2)\n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2543
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2544 "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2545 "adc %3, %%"REG_b" \n\t" //xx+= xInc>>8 + carry
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2546 "add $1, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2547 "cmp %2, %%"REG_a" \n\t"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2548 " jb 1b \n\t"
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2549
15972
e4360060b79a Re-enables the GCC-4 fix for AMD-64 only. Patch by cartman and poirierg
gpoirier
parents: 15858
diff changeset
2550 /* GCC-3.3 makes MPlayer crash on IA-32 machines when using "g" operand here,
e4360060b79a Re-enables the GCC-4 fix for AMD-64 only. Patch by cartman and poirierg
gpoirier
parents: 15858
diff changeset
2551 which is needed to support GCC-4.0 */
e4360060b79a Re-enables the GCC-4 fix for AMD-64 only. Patch by cartman and poirierg
gpoirier
parents: 15858
diff changeset
2552 #if defined(ARCH_X86_64) && ((__GNUC__ > 3) || ( __GNUC__ == 3 && __GNUC_MINOR__ >= 4))
e4360060b79a Re-enables the GCC-4 fix for AMD-64 only. Patch by cartman and poirierg
gpoirier
parents: 15858
diff changeset
2553 :: "m" (src1), "m" (dst), "g" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
e4360060b79a Re-enables the GCC-4 fix for AMD-64 only. Patch by cartman and poirierg
gpoirier
parents: 15858
diff changeset
2554 #else
15858
045f91e5e67d Reverts GCC-4.0 "fixe" which broke GCC-3.3 and maybe others
gpoirier
parents: 15845
diff changeset
2555 :: "m" (src1), "m" (dst), "m" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
15972
e4360060b79a Re-enables the GCC-4 fix for AMD-64 only. Patch by cartman and poirierg
gpoirier
parents: 15858
diff changeset
2556 #endif
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2557 "r" (src2)
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 12698
diff changeset
2558 : "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi"
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2559 );
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2560 #ifdef HAVE_MMX2
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2561 } //if MMX2 can't be used
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2562 #endif
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2563 #else
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2564 int i;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2565 unsigned int xpos=0;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2566 for(i=0;i<dstWidth;i++)
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2567 {
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2568 register unsigned int xx=xpos>>16;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2569 register unsigned int xalpha=(xpos&0xFFFF)>>9;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2570 dst[i]=(src1[xx]*(xalpha^127)+src1[xx+1]*xalpha);
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2571 dst[i+2048]=(src2[xx]*(xalpha^127)+src2[xx+1]*xalpha);
2566
a350d8bed636 bugfixes
michael
parents: 2540
diff changeset
2572 /* slower
a350d8bed636 bugfixes
michael
parents: 2540
diff changeset
2573 dst[i]= (src1[xx]<<7) + (src1[xx+1] - src1[xx])*xalpha;
a350d8bed636 bugfixes
michael
parents: 2540
diff changeset
2574 dst[i+2048]=(src2[xx]<<7) + (src2[xx+1] - src2[xx])*xalpha;
a350d8bed636 bugfixes
michael
parents: 2540
diff changeset
2575 */
2671
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2576 xpos+=xInc;
555cb027c7a7 fixed warnings
michael
parents: 2669
diff changeset
2577 }
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2578 #endif
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2579 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2580 }
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2581
9499
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
2582 static int RENAME(swScale)(SwsContext *c, uint8_t* src[], int srcStride[], int srcSliceY,
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
2583 int srcSliceH, uint8_t* dst[], int dstStride[]){
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2584
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2585 /* load a few things into local vars to make the code more readable? and faster */
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2586 const int srcW= c->srcW;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2587 const int dstW= c->dstW;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2588 const int dstH= c->dstH;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2589 const int chrDstW= c->chrDstW;
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2590 const int chrSrcW= c->chrSrcW;
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2591 const int lumXInc= c->lumXInc;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2592 const int chrXInc= c->chrXInc;
4295
67c56df76a44 copyright(swscaler) = GPL
michael
parents: 4290
diff changeset
2593 const int dstFormat= c->dstFormat;
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
2594 const int srcFormat= c->srcFormat;
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2595 const int flags= c->flags;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2596 const int canMMX2BeUsed= c->canMMX2BeUsed;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2597 int16_t *vLumFilterPos= c->vLumFilterPos;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2598 int16_t *vChrFilterPos= c->vChrFilterPos;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2599 int16_t *hLumFilterPos= c->hLumFilterPos;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2600 int16_t *hChrFilterPos= c->hChrFilterPos;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2601 int16_t *vLumFilter= c->vLumFilter;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2602 int16_t *vChrFilter= c->vChrFilter;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2603 int16_t *hLumFilter= c->hLumFilter;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2604 int16_t *hChrFilter= c->hChrFilter;
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
2605 int32_t *lumMmxFilter= c->lumMmxFilter;
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
2606 int32_t *chrMmxFilter= c->chrMmxFilter;
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2607 const int vLumFilterSize= c->vLumFilterSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2608 const int vChrFilterSize= c->vChrFilterSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2609 const int hLumFilterSize= c->hLumFilterSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2610 const int hChrFilterSize= c->hChrFilterSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2611 int16_t **lumPixBuf= c->lumPixBuf;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2612 int16_t **chrPixBuf= c->chrPixBuf;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2613 const int vLumBufSize= c->vLumBufSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2614 const int vChrBufSize= c->vChrBufSize;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2615 uint8_t *funnyYCode= c->funnyYCode;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2616 uint8_t *funnyUVCode= c->funnyUVCode;
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2617 uint8_t *formatConvBuffer= c->formatConvBuffer;
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2618 const int chrSrcSliceY= srcSliceY >> c->chrSrcVSubSample;
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2619 const int chrSrcSliceH= -((-srcSliceH) >> c->chrSrcVSubSample);
9494
543ab3909b78 sws_ prefix, more seperation between internal & external swscaler API
michael
parents: 9476
diff changeset
2620 int lastDstY;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2621
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2622 /* vars whch will change and which we need to storw back in the context */
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2623 int dstY= c->dstY;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2624 int lumBufIndex= c->lumBufIndex;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2625 int chrBufIndex= c->chrBufIndex;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2626 int lastInLumBuf= c->lastInLumBuf;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2627 int lastInChrBuf= c->lastInChrBuf;
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2628
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2629 if(isPacked(c->srcFormat)){
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2630 src[0]=
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2631 src[1]=
9499
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
2632 src[2]= src[0];
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2633 srcStride[0]=
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2634 srcStride[1]=
9499
bc5b87370cd1 cleanup
michael
parents: 9494
diff changeset
2635 srcStride[2]= srcStride[0];
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2636 }
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2637 srcStride[1]<<= c->vChrDrop;
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2638 srcStride[2]<<= c->vChrDrop;
4419
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2639
6517
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2640 // printf("swscale %X %X %X -> %X %X %X\n", (int)src[0], (int)src[1], (int)src[2],
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2641 // (int)dst[0], (int)dst[1], (int)dst[2]);
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2642
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2643 #if 0 //self test FIXME move to a vfilter or something
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2644 {
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2645 static volatile int i=0;
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2646 i++;
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2647 if(srcFormat==IMGFMT_YV12 && i==1 && srcSliceH>= c->srcH)
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2648 selfTest(src, srcStride, c->srcW, c->srcH);
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2649 i--;
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2650 }
5ac294a77a87 selftest support
michael
parents: 6503
diff changeset
2651 #endif
4554
16fdb694cf13 swScale internally uses yuv2rgb now if possible
michael
parents: 4481
diff changeset
2652
16fdb694cf13 swScale internally uses yuv2rgb now if possible
michael
parents: 4481
diff changeset
2653 //printf("sws Strides:%d %d %d -> %d %d %d\n", srcStride[0],srcStride[1],srcStride[2],
16fdb694cf13 swScale internally uses yuv2rgb now if possible
michael
parents: 4481
diff changeset
2654 //dstStride[0],dstStride[1],dstStride[2]);
4419
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2655
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2656 if(dstStride[0]%8 !=0 || dstStride[1]%8 !=0 || dstStride[2]%8 !=0)
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2657 {
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2658 static int firstTime=1; //FIXME move this into the context perhaps
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2659 if(flags & SWS_PRINT_INFO && firstTime)
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2660 {
9970
9deb7e948fa6 killed an mp_msg occurance
alex
parents: 9921
diff changeset
2661 MSG_WARN("SwScaler: Warning: dstStride is not aligned!\n"
4419
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2662 "SwScaler: ->cannot do aligned memory acesses anymore\n");
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2663 firstTime=0;
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2664 }
f002407e298d YV12 like formats support (I420/IYUV)
michael
parents: 4297
diff changeset
2665 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2666
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2667 /* Note the user might start scaling the picture in the middle so this will not get executed
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2668 this is not really intended but works currently, so ppl might do it */
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2669 if(srcSliceY ==0){
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2670 lumBufIndex=0;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2671 chrBufIndex=0;
4467
9512d6832b38 YUY2, BGR24, BGR32 input support (no mmx yet)
michael
parents: 4419
diff changeset
2672 dstY=0;
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2673 lastInLumBuf= -1;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2674 lastInChrBuf= -1;
3272
7e4399d1eb65 horizontal up/downscale linear & cubic
michael
parents: 3215
diff changeset
2675 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2676
9494
543ab3909b78 sws_ prefix, more seperation between internal & external swscaler API
michael
parents: 9476
diff changeset
2677 lastDstY= dstY;
543ab3909b78 sws_ prefix, more seperation between internal & external swscaler API
michael
parents: 9476
diff changeset
2678
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2679 for(;dstY < dstH; dstY++){
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2680 unsigned char *dest =dst[0]+dstStride[0]*dstY;
6520
f9a1870bc4a5 cleanup
michael
parents: 6517
diff changeset
2681 const int chrDstY= dstY>>c->chrDstVSubSample;
f9a1870bc4a5 cleanup
michael
parents: 6517
diff changeset
2682 unsigned char *uDest=dst[1]+dstStride[1]*chrDstY;
f9a1870bc4a5 cleanup
michael
parents: 6517
diff changeset
2683 unsigned char *vDest=dst[2]+dstStride[2]*chrDstY;
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2684
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2685 const int firstLumSrcY= vLumFilterPos[dstY]; //First line needed as input
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2686 const int firstChrSrcY= vChrFilterPos[chrDstY]; //First line needed as input
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2687 const int lastLumSrcY= firstLumSrcY + vLumFilterSize -1; // Last line needed as input
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2688 const int lastChrSrcY= firstChrSrcY + vChrFilterSize -1; // Last line needed as input
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2689
11122
c552fe6acbaa rounding fixes
michael
parents: 11000
diff changeset
2690 //printf("dstY:%d dstH:%d firstLumSrcY:%d lastInLumBuf:%d vLumBufSize: %d vChrBufSize: %d slice: %d %d vLumFilterSize: %d firstChrSrcY: %d vChrFilterSize: %d c->chrSrcVSubSample: %d\n",
c552fe6acbaa rounding fixes
michael
parents: 11000
diff changeset
2691 // dstY, dstH, firstLumSrcY, lastInLumBuf, vLumBufSize, vChrBufSize, srcSliceY, srcSliceH, vLumFilterSize, firstChrSrcY, vChrFilterSize, c->chrSrcVSubSample);
4290
1f8ceb12284d general convolution filtering of the source picture
michael
parents: 4276
diff changeset
2692 //handle holes (FAST_BILINEAR & weird filters)
1f8ceb12284d general convolution filtering of the source picture
michael
parents: 4276
diff changeset
2693 if(firstLumSrcY > lastInLumBuf) lastInLumBuf= firstLumSrcY-1;
1f8ceb12284d general convolution filtering of the source picture
michael
parents: 4276
diff changeset
2694 if(firstChrSrcY > lastInChrBuf) lastInChrBuf= firstChrSrcY-1;
1f8ceb12284d general convolution filtering of the source picture
michael
parents: 4276
diff changeset
2695 //printf("%d %d %d\n", firstChrSrcY, lastInChrBuf, vChrBufSize);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2696 ASSERT(firstLumSrcY >= lastInLumBuf - vLumBufSize + 1)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2697 ASSERT(firstChrSrcY >= lastInChrBuf - vChrBufSize + 1)
2216
9da2a0515184 software yv12->rgb scaler - separated from fsdga
arpi
parents:
diff changeset
2698
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2699 // Do we have enough lines in this slice to output the dstY line
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2700 if(lastLumSrcY < srcSliceY + srcSliceH && lastChrSrcY < -((-srcSliceY - srcSliceH)>>c->chrSrcVSubSample))
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2701 {
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2702 //Do horizontal scaling
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2703 while(lastInLumBuf < lastLumSrcY)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2704 {
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2705 uint8_t *s= src[0]+(lastInLumBuf + 1 - srcSliceY)*srcStride[0];
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2706 lumBufIndex++;
4290
1f8ceb12284d general convolution filtering of the source picture
michael
parents: 4276
diff changeset
2707 // printf("%d %d %d %d\n", lumBufIndex, vLumBufSize, lastInLumBuf, lastLumSrcY);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2708 ASSERT(lumBufIndex < 2*vLumBufSize)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2709 ASSERT(lastInLumBuf + 1 - srcSliceY < srcSliceH)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2710 ASSERT(lastInLumBuf + 1 - srcSliceY >= 0)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2711 // printf("%d %d\n", lumBufIndex, vLumBufSize);
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2712 RENAME(hyscale)(lumPixBuf[ lumBufIndex ], dstW, s, srcW, lumXInc,
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2713 flags, canMMX2BeUsed, hLumFilter, hLumFilterPos, hLumFilterSize,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2714 funnyYCode, c->srcFormat, formatConvBuffer,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2715 c->lumMmx2Filter, c->lumMmx2FilterPos);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2716 lastInLumBuf++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2717 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2718 while(lastInChrBuf < lastChrSrcY)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2719 {
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2720 uint8_t *src1= src[1]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[1];
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2721 uint8_t *src2= src[2]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[2];
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2722 chrBufIndex++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2723 ASSERT(chrBufIndex < 2*vChrBufSize)
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2724 ASSERT(lastInChrBuf + 1 - chrSrcSliceY < (chrSrcSliceH))
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2725 ASSERT(lastInChrBuf + 1 - chrSrcSliceY >= 0)
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2726 //FIXME replace parameters through context struct (some at least)
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
2727
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
2728 if(!(isGray(srcFormat) || isGray(dstFormat)))
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2729 RENAME(hcscale)(chrPixBuf[ chrBufIndex ], chrDstW, src1, src2, chrSrcW, chrXInc,
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2730 flags, canMMX2BeUsed, hChrFilter, hChrFilterPos, hChrFilterSize,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2731 funnyUVCode, c->srcFormat, formatConvBuffer,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2732 c->chrMmx2Filter, c->chrMmx2FilterPos);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2733 lastInChrBuf++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2734 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2735 //wrap buf index around to stay inside the ring buffer
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2736 if(lumBufIndex >= vLumBufSize ) lumBufIndex-= vLumBufSize;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2737 if(chrBufIndex >= vChrBufSize ) chrBufIndex-= vChrBufSize;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2738 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2739 else // not enough lines left in this slice -> load the rest in the buffer
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2740 {
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2741 /* printf("%d %d Last:%d %d LastInBuf:%d %d Index:%d %d Y:%d FSize: %d %d BSize: %d %d\n",
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2742 firstChrSrcY,firstLumSrcY,lastChrSrcY,lastLumSrcY,
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2743 lastInChrBuf,lastInLumBuf,chrBufIndex,lumBufIndex,dstY,vChrFilterSize,vLumFilterSize,
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2744 vChrBufSize, vLumBufSize);*/
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2745
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2746 //Do horizontal scaling
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2747 while(lastInLumBuf+1 < srcSliceY + srcSliceH)
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2748 {
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2749 uint8_t *s= src[0]+(lastInLumBuf + 1 - srcSliceY)*srcStride[0];
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2750 lumBufIndex++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2751 ASSERT(lumBufIndex < 2*vLumBufSize)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2752 ASSERT(lastInLumBuf + 1 - srcSliceY < srcSliceH)
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2753 ASSERT(lastInLumBuf + 1 - srcSliceY >= 0)
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2754 RENAME(hyscale)(lumPixBuf[ lumBufIndex ], dstW, s, srcW, lumXInc,
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2755 flags, canMMX2BeUsed, hLumFilter, hLumFilterPos, hLumFilterSize,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2756 funnyYCode, c->srcFormat, formatConvBuffer,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2757 c->lumMmx2Filter, c->lumMmx2FilterPos);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2758 lastInLumBuf++;
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2759 }
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2760 while(lastInChrBuf+1 < (chrSrcSliceY + chrSrcSliceH))
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2761 {
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2762 uint8_t *src1= src[1]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[1];
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2763 uint8_t *src2= src[2]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[2];
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2764 chrBufIndex++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2765 ASSERT(chrBufIndex < 2*vChrBufSize)
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2766 ASSERT(lastInChrBuf + 1 - chrSrcSliceY < chrSrcSliceH)
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2767 ASSERT(lastInChrBuf + 1 - chrSrcSliceY >= 0)
6503
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
2768
5a2bd4021c8e cleanup & grayscale support
michael
parents: 6492
diff changeset
2769 if(!(isGray(srcFormat) || isGray(dstFormat)))
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2770 RENAME(hcscale)(chrPixBuf[ chrBufIndex ], chrDstW, src1, src2, chrSrcW, chrXInc,
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2771 flags, canMMX2BeUsed, hChrFilter, hChrFilterPos, hChrFilterSize,
5452
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2772 funnyUVCode, c->srcFormat, formatConvBuffer,
eb87391a5292 overread in the mmx2 horizontal scaler fixed
michael
parents: 4923
diff changeset
2773 c->chrMmx2Filter, c->chrMmx2FilterPos);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2774 lastInChrBuf++;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2775 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2776 //wrap buf index around to stay inside the ring buffer
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2777 if(lumBufIndex >= vLumBufSize ) lumBufIndex-= vLumBufSize;
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2778 if(chrBufIndex >= vChrBufSize ) chrBufIndex-= vChrBufSize;
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2779 break; //we can't output a dstY line so let's try with the next slice
2469
03abc2743ed6 downscale
michael
parents: 2326
diff changeset
2780 }
2264
7851375ea156 increased precission of s_xinc s_xinc2 (needed for the mmx2 bugfix)
michael
parents: 2237
diff changeset
2781
2748
01dbf100b4f8 better dithering
michael
parents: 2730
diff changeset
2782 #ifdef HAVE_MMX
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2783 b5Dither= dither8[dstY&1];
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2784 g6Dither= dither4[dstY&1];
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2785 g5Dither= dither8[dstY&1];
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2786 r5Dither= dither8[(dstY+1)&1];
2748
01dbf100b4f8 better dithering
michael
parents: 2730
diff changeset
2787 #endif
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2788 if(dstY < dstH-2)
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2789 {
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2790 int16_t **lumSrcPtr= lumPixBuf + lumBufIndex + firstLumSrcY - lastInLumBuf + vLumBufSize;
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2791 int16_t **chrSrcPtr= chrPixBuf + chrBufIndex + firstChrSrcY - lastInChrBuf + vChrBufSize;
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2792 #ifdef HAVE_MMX
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2793 int i;
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2794 for(i=0; i<vLumFilterSize; i++)
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2795 {
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2796 lumMmxFilter[4*i+0]= (int32_t)lumSrcPtr[i];
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2797 lumMmxFilter[4*i+2]=
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2798 lumMmxFilter[4*i+3]=
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2799 ((uint16_t)vLumFilter[dstY*vLumFilterSize + i])*0x10001;
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2800 }
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2801 for(i=0; i<vChrFilterSize; i++)
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2802 {
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2803 chrMmxFilter[4*i+0]= (int32_t)chrSrcPtr[i];
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2804 chrMmxFilter[4*i+2]=
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2805 chrMmxFilter[4*i+3]=
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2806 ((uint16_t)vChrFilter[chrDstY*vChrFilterSize + i])*0x10001;
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2807 }
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2808 #endif
14715
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2809 if(dstFormat == IMGFMT_NV12 || dstFormat == IMGFMT_NV21){
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2810 const int chrSkipMask= (1<<c->chrDstVSubSample)-1;
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2811 if(dstY&chrSkipMask) uDest= NULL; //FIXME split functions in lumi / chromi
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2812 RENAME(yuv2nv12X)(c,
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2813 vLumFilter+dstY*vLumFilterSize , lumSrcPtr, vLumFilterSize,
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2814 vChrFilter+chrDstY*vChrFilterSize, chrSrcPtr, vChrFilterSize,
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2815 dest, uDest, dstW, chrDstW, dstFormat);
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2816 }
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2817 else if(isPlanarYUV(dstFormat) || isGray(dstFormat)) //YV12 like
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2818 {
7351
064ada190b6c fixing y422p output
michael
parents: 6679
diff changeset
2819 const int chrSkipMask= (1<<c->chrDstVSubSample)-1;
064ada190b6c fixing y422p output
michael
parents: 6679
diff changeset
2820 if((dstY&chrSkipMask) || isGray(dstFormat)) uDest=vDest= NULL; //FIXME split functions in lumi / chromi
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2821 if(vLumFilterSize == 1 && vChrFilterSize == 1) // Unscaled YV12
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2822 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2823 int16_t *lumBuf = lumPixBuf[0];
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2824 int16_t *chrBuf= chrPixBuf[0];
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2825 RENAME(yuv2yuv1)(lumBuf, chrBuf, dest, uDest, vDest, dstW, chrDstW);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2826 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2827 else //General YV12
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2828 {
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
2829 RENAME(yuv2yuvX)(c,
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2830 vLumFilter+dstY*vLumFilterSize , lumSrcPtr, vLumFilterSize,
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2831 vChrFilter+chrDstY*vChrFilterSize, chrSrcPtr, vChrFilterSize,
9414
04c6fd75ed96 cleanup
michael
parents: 9413
diff changeset
2832 dest, uDest, vDest, dstW, chrDstW);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2833 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2834 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2835 else
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2836 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2837 ASSERT(lumSrcPtr + vLumFilterSize - 1 < lumPixBuf + vLumBufSize*2);
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2838 ASSERT(chrSrcPtr + vChrFilterSize - 1 < chrPixBuf + vChrBufSize*2);
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2839 if(vLumFilterSize == 1 && vChrFilterSize == 2) //Unscaled RGB
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2840 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2841 int chrAlpha= vChrFilter[2*dstY+1];
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
2842 RENAME(yuv2packed1)(c, *lumSrcPtr, *chrSrcPtr, *(chrSrcPtr+1),
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
2843 dest, dstW, chrAlpha, dstFormat, flags, dstY);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2844 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2845 else if(vLumFilterSize == 2 && vChrFilterSize == 2) //BiLinear Upscale RGB
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2846 {
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2847 int lumAlpha= vLumFilter[2*dstY+1];
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2848 int chrAlpha= vChrFilter[2*dstY+1];
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
2849 RENAME(yuv2packed2)(c, *lumSrcPtr, *(lumSrcPtr+1), *chrSrcPtr, *(chrSrcPtr+1),
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
2850 dest, dstW, lumAlpha, chrAlpha, dstY);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2851 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2852 else //General RGB
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2853 {
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
2854 RENAME(yuv2packedX)(c,
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2855 vLumFilter+dstY*vLumFilterSize, lumSrcPtr, vLumFilterSize,
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2856 vChrFilter+dstY*vChrFilterSize, chrSrcPtr, vChrFilterSize,
9413
0d86fe21b281 cleanup
michael
parents: 9071
diff changeset
2857 dest, dstW, dstY);
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2858 }
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2859 }
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2860 }
11000
6e35326c742f many small typo and grammar fixes
gabucino
parents: 9970
diff changeset
2861 else // hmm looks like we can't use MMX here without overwriting this array's tail
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2862 {
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2863 int16_t **lumSrcPtr= lumPixBuf + lumBufIndex + firstLumSrcY - lastInLumBuf + vLumBufSize;
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2864 int16_t **chrSrcPtr= chrPixBuf + chrBufIndex + firstChrSrcY - lastInChrBuf + vChrBufSize;
14715
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2865 if(dstFormat == IMGFMT_NV12 || dstFormat == IMGFMT_NV21){
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2866 const int chrSkipMask= (1<<c->chrDstVSubSample)-1;
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2867 if(dstY&chrSkipMask) uDest= NULL; //FIXME split functions in lumi / chromi
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2868 yuv2nv12XinC(
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2869 vLumFilter+dstY*vLumFilterSize , lumSrcPtr, vLumFilterSize,
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2870 vChrFilter+chrDstY*vChrFilterSize, chrSrcPtr, vChrFilterSize,
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2871 dest, uDest, dstW, chrDstW, dstFormat);
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2872 }
1fab95e4513c Improved NV12/NV21 support.
syrjala
parents: 14556
diff changeset
2873 else if(isPlanarYUV(dstFormat) || isGray(dstFormat)) //YV12
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2874 {
7351
064ada190b6c fixing y422p output
michael
parents: 6679
diff changeset
2875 const int chrSkipMask= (1<<c->chrDstVSubSample)-1;
064ada190b6c fixing y422p output
michael
parents: 6679
diff changeset
2876 if((dstY&chrSkipMask) || isGray(dstFormat)) uDest=vDest= NULL; //FIXME split functions in lumi / chromi
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2877 yuv2yuvXinC(
6532
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2878 vLumFilter+dstY*vLumFilterSize , lumSrcPtr, vLumFilterSize,
9834d9980c45 yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents: 6520
diff changeset
2879 vChrFilter+chrDstY*vChrFilterSize, chrSrcPtr, vChrFilterSize,
6540
5b3cace64e9d 100l (non mmx versions didnt compile)
michael
parents: 6532
diff changeset
2880 dest, uDest, vDest, dstW, chrDstW);
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2881 }
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2882 else
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2883 {
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2884 ASSERT(lumSrcPtr + vLumFilterSize - 1 < lumPixBuf + vLumBufSize*2);
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2885 ASSERT(chrSrcPtr + vChrFilterSize - 1 < chrPixBuf + vChrBufSize*2);
7723
11492d5b0896 mmx yuy2 output
michael
parents: 7720
diff changeset
2886 yuv2packedXinC(c,
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2887 vLumFilter+dstY*vLumFilterSize, lumSrcPtr, vLumFilterSize,
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2888 vChrFilter+dstY*vChrFilterSize, chrSrcPtr, vChrFilterSize,
6578
3727eb94a783 use unified yuv2rgb init
michael
parents: 6554
diff changeset
2889 dest, dstW, dstY);
3352
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2890 }
64121e8a43f5 print more info if -v
michael
parents: 3345
diff changeset
2891 }
3344
e87c59969d17 vertical cubic/linear scaling
michael
parents: 3299
diff changeset
2892 }
2534
cc9d3fd626f0 patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents: 2521
diff changeset
2893
cc9d3fd626f0 patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents: 2521
diff changeset
2894 #ifdef HAVE_MMX
cc9d3fd626f0 patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents: 2521
diff changeset
2895 __asm __volatile(SFENCE:::"memory");
2566
a350d8bed636 bugfixes
michael
parents: 2540
diff changeset
2896 __asm __volatile(EMMS:::"memory");
2534
cc9d3fd626f0 patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents: 2521
diff changeset
2897 #endif
4276
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2898 /* store changed local vars back in the context */
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2899 c->dstY= dstY;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2900 c->lumBufIndex= lumBufIndex;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2901 c->chrBufIndex= chrBufIndex;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2902 c->lastInLumBuf= lastInLumBuf;
9199d15cb4e0 removed global vars so that multiple swscalers can be used
michael
parents: 4248
diff changeset
2903 c->lastInChrBuf= lastInChrBuf;
9494
543ab3909b78 sws_ prefix, more seperation between internal & external swscaler API
michael
parents: 9476
diff changeset
2904
543ab3909b78 sws_ prefix, more seperation between internal & external swscaler API
michael
parents: 9476
diff changeset
2905 return dstY - lastDstY;
3641
33c560ffd3dc minor bugfixes (noone noticed them)
michael
parents: 3352
diff changeset
2906 }