annotate libvo/osd_template.c @ 3398:a73b02e35e70

give the IMGFMT_ for sh_video->format not 0x0
author alex
date Sun, 09 Dec 2001 15:39:35 +0000
parents 0f6cce3a8059
children 63ecec3bdf93
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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1 // Generic alpha renderers for all YUV modes and RGB depths.
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2 // Optimized by Nick and Michael
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3 // Code from Michael Niedermayer (michaelni@gmx.at) is under GPL
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4
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5 #undef PREFETCH
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6 #undef EMMS
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7 #undef PREFETCHW
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8 #undef PAVGB
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9
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10 #ifdef HAVE_3DNOW
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11 #define PREFETCH "prefetch"
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12 #define PREFETCHW "prefetchw"
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13 #define PAVGB "pavgusb"
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14 #elif defined ( HAVE_MMX2 )
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15 #define PREFETCH "prefetchnta"
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16 #define PREFETCHW "prefetcht0"
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17 #define PAVGB "pavgb"
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18 #else
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19 #define PREFETCH "/nop"
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20 #define PREFETCHW "/nop"
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21 #endif
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6737025afed0 to be sure in that header is okey
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22
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23 #ifdef HAVE_3DNOW
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24 /* On K6 femms is faster of emms. On K7 femms is directly mapped on emms. */
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25 #define EMMS "femms"
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26 #else
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27 #define EMMS "emms"
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28 #endif
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29
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30 static inline void RENAME(vo_draw_alpha_yv12)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
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31 int y;
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32 #if defined(FAST_OSD) && !defined(HAVE_MMX)
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33 w=w>>1;
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34 #endif
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35 PROFILE_START();
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36 for(y=0;y<h;y++){
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37 register int x;
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38 #ifdef HAVE_MMX
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39 asm volatile(
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40 PREFETCHW" %0\n\t"
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41 PREFETCH" %1\n\t"
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42 PREFETCH" %2\n\t"
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43 // "pxor %%mm7, %%mm7\n\t"
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44 "pcmpeqb %%mm5, %%mm5\n\t" // F..F
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45 "movq %%mm5, %%mm4\n\t"
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46 "psllw $8, %%mm5\n\t" //FF00FF00FF00
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47 "psrlw $8, %%mm4\n\t" //00FF00FF00FF
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48 ::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
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49 for(x=0;x<w;x+=8){
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50 asm volatile(
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51 "movl %1, %%eax\n\t"
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52 "orl 4%1, %%eax\n\t"
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53 " jz 1f\n\t"
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54 PREFETCHW" 32%0\n\t"
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55 PREFETCH" 32%1\n\t"
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56 PREFETCH" 32%2\n\t"
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57 "movq %0, %%mm0\n\t" // dstbase
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58 "movq %%mm0, %%mm1\n\t"
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59 "pand %%mm4, %%mm0\n\t" //0Y0Y0Y0Y
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60 "psrlw $8, %%mm1\n\t" //0Y0Y0Y0Y
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61 "movq %1, %%mm2\n\t" //srca HGFEDCBA
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62 "paddb bFF, %%mm2\n\t"
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63 "movq %%mm2, %%mm3\n\t"
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64 "pand %%mm4, %%mm2\n\t" //0G0E0C0A
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65 "psrlw $8, %%mm3\n\t" //0H0F0D0B
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66 "pmullw %%mm2, %%mm0\n\t"
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67 "pmullw %%mm3, %%mm1\n\t"
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68 "psrlw $8, %%mm0\n\t"
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69 "pand %%mm5, %%mm1\n\t"
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70 "por %%mm1, %%mm0\n\t"
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71 "paddb %2, %%mm0\n\t"
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72 "movq %%mm0, %0\n\t"
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73 "1:\n\t"
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74 :: "m" (dstbase[x]), "m" (srca[x]), "m" (src[x])
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75 : "%eax");
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76 }
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77 #else
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78 for(x=0;x<w;x++){
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79 #ifdef FAST_OSD
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80 if(srca[2*x+0]) dstbase[2*x+0]=src[2*x+0];
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81 if(srca[2*x+1]) dstbase[2*x+1]=src[2*x+1];
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82 #else
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83 if(srca[x]) dstbase[x]=((dstbase[x]*srca[x])>>8)+src[x];
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84 #endif
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85 }
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86 #endif
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87 src+=srcstride;
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88 srca+=srcstride;
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89 dstbase+=dststride;
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90 }
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91 #ifdef HAVE_MMX
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92 asm volatile(EMMS:::"memory");
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93 #endif
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94 PROFILE_END("vo_draw_alpha_yv12");
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95 return;
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96 }
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97
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98 static inline void RENAME(vo_draw_alpha_yuy2)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
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99 int y;
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100 #if defined(FAST_OSD) && !defined(HAVE_MMX)
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101 w=w>>1;
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102 #endif
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103 PROFILE_START();
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104 for(y=0;y<h;y++){
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105 register int x;
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106 #ifdef HAVE_MMX
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107 asm volatile(
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108 PREFETCHW" %0\n\t"
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109 PREFETCH" %1\n\t"
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110 PREFETCH" %2\n\t"
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111 "pxor %%mm7, %%mm7\n\t"
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112 "pcmpeqb %%mm5, %%mm5\n\t" // F..F
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113 "movq %%mm5, %%mm4\n\t"
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114 "psllw $8, %%mm5\n\t" //FF00FF00FF00
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115 "psrlw $8, %%mm4\n\t" //00FF00FF00FF
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116 ::"m"(*dstbase),"m"(*srca),"m"(*src));
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117 for(x=0;x<w;x+=4){
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118 asm volatile(
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119 "movl %1, %%eax\n\t"
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120 "orl %%eax, %%eax\n\t"
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121 " jz 1f\n\t"
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122 PREFETCHW" 32%0\n\t"
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123 PREFETCH" 32%1\n\t"
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124 PREFETCH" 32%2\n\t"
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125 "movq %0, %%mm0\n\t" // dstbase
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126 "movq %%mm0, %%mm1\n\t"
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127 "pand %%mm4, %%mm0\n\t" //0Y0Y0Y0Y
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128 "movd %%eax, %%mm2\n\t" //srca 0000DCBA
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129 "paddb bFF, %%mm2\n\t"
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130 "punpcklbw %%mm7, %%mm2\n\t" //srca 0D0C0B0A
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131 "pmullw %%mm2, %%mm0\n\t"
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132 "psrlw $8, %%mm0\n\t"
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133 "pand %%mm5, %%mm1\n\t" //U0V0U0V0
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134 "movd %2, %%mm2\n\t" //src 0000DCBA
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135 "punpcklbw %%mm7, %%mm2\n\t" //srca 0D0C0B0A
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136 "por %%mm1, %%mm0\n\t"
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137 "paddb %%mm2, %%mm0\n\t"
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138 "movq %%mm0, %0\n\t"
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139 "1:\n\t"
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140 :: "m" (dstbase[x*2]), "m" (srca[x]), "m" (src[x])
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141 : "%eax");
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142 }
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143 #else
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144 for(x=0;x<w;x++){
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145 #ifdef FAST_OSD
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146 if(srca[2*x+0]) dstbase[4*x+0]=src[2*x+0];
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147 if(srca[2*x+1]) dstbase[4*x+2]=src[2*x+1];
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148 #else
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149 if(srca[x]) dstbase[2*x]=((dstbase[2*x]*srca[x])>>8)+src[x];
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150 #endif
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151 }
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152 #endif
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153 src+=srcstride;
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154 srca+=srcstride;
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155 dstbase+=dststride;
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156 }
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157 #ifdef HAVE_MMX
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158 asm volatile(EMMS:::"memory");
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159 #endif
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160 PROFILE_END("vo_draw_alpha_yuy2");
326
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161 return;
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162 }
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163
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164 static inline void RENAME(vo_draw_alpha_rgb24)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
326
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165 int y;
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166 for(y=0;y<h;y++){
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167 register unsigned char *dst = dstbase;
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168 register int x;
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169 #ifdef ARCH_X86
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170 #ifdef HAVE_MMX
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171 asm volatile(
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172 PREFETCHW" %0\n\t"
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173 PREFETCH" %1\n\t"
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174 PREFETCH" %2\n\t"
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175 "pxor %%mm7, %%mm7\n\t"
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176 "pcmpeqb %%mm6, %%mm6\n\t" // F..F
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177 ::"m"(*dst),"m"(*srca),"m"(*src):"memory");
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178 for(x=0;x<w;x+=2){
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179 if(srca[x] || srca[x+1])
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180 asm volatile(
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181 PREFETCHW" 32%0\n\t"
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182 PREFETCH" 32%1\n\t"
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183 PREFETCH" 32%2\n\t"
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184 "movq %0, %%mm0\n\t" // dstbase
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185 "movq %%mm0, %%mm1\n\t"
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186 "movq %%mm0, %%mm5\n\t"
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187 "punpcklbw %%mm7, %%mm0\n\t"
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188 "punpckhbw %%mm7, %%mm1\n\t"
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189 "movd %1, %%mm2\n\t" // srca ABCD0000
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190 "paddb %%mm6, %%mm2\n\t"
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191 "punpcklbw %%mm2, %%mm2\n\t" // srca AABBCCDD
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192 "punpcklbw %%mm2, %%mm2\n\t" // srca AAAABBBB
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193 "movq %%mm2, %%mm3\n\t"
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194 "punpcklbw %%mm7, %%mm2\n\t" // srca 0A0A0A0A
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195 "punpckhbw %%mm7, %%mm3\n\t" // srca 0B0B0B0B
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196 "pmullw %%mm2, %%mm0\n\t"
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197 "pmullw %%mm3, %%mm1\n\t"
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198 "psrlw $8, %%mm0\n\t"
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199 "psrlw $8, %%mm1\n\t"
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diff changeset
200 "packuswb %%mm1, %%mm0\n\t"
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201 "movd %2, %%mm2 \n\t" // src ABCD0000
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202 "punpcklbw %%mm2, %%mm2\n\t" // src AABBCCDD
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203 "punpcklbw %%mm2, %%mm2\n\t" // src AAAABBBB
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204 "paddb %%mm2, %%mm0\n\t"
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diff changeset
205 "pand %4, %%mm5\n\t"
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206 "pand %3, %%mm0\n\t"
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207 "por %%mm0, %%mm5\n\t"
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208 "movq %%mm5, %0\n\t"
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209 :: "m" (dst[0]), "m" (srca[x]), "m" (src[x]), "m"(mask24hl), "m"(mask24lh));
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210 dst += 6;
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211 }
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212 #else /* HAVE_MMX */
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213 for(x=0;x<w;x++){
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214 if(srca[x]){
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215 asm volatile(
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diff changeset
216 "movzbl (%0), %%ecx\n\t"
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217 "movzbl 1(%0), %%eax\n\t"
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218 "movzbl 2(%0), %%edx\n\t"
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219
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220 "imull %1, %%ecx\n\t"
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diff changeset
221 "imull %1, %%eax\n\t"
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diff changeset
222 "imull %1, %%edx\n\t"
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223
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diff changeset
224 "addl %2, %%ecx\n\t"
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225 "addl %2, %%eax\n\t"
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diff changeset
226 "addl %2, %%edx\n\t"
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227
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diff changeset
228 "movb %%ch, (%0)\n\t"
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229 "movb %%ah, 1(%0)\n\t"
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230 "movb %%dh, 2(%0)\n\t"
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231
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232 :
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233 :"r" (dst),
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234 "r" ((unsigned)srca[x]),
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235 "r" (((unsigned)src[x])<<8)
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236 :"%eax", "%ecx", "%edx"
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237 );
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238 }
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239 dst += 3;
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240 }
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241 #endif /* HAVE_MMX */
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diff changeset
242 #else /*non x86 arch*/
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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243 for(x=0;x<w;x++){
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244 if(srca[x]){
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245 #ifdef FAST_OSD
76fd9463b9d3 FAST_OSD option to disable font outline antialiasing
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246 dst[0]=dst[1]=dst[2]=src[x];
76fd9463b9d3 FAST_OSD option to disable font outline antialiasing
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parents: 622
diff changeset
247 #else
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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248 dst[0]=((dst[0]*srca[x])>>8)+src[x];
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249 dst[1]=((dst[1]*srca[x])>>8)+src[x];
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250 dst[2]=((dst[2]*srca[x])>>8)+src[x];
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76fd9463b9d3 FAST_OSD option to disable font outline antialiasing
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parents: 622
diff changeset
251 #endif
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
252 }
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
253 dst+=3; // 24bpp
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diff changeset
254 }
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diff changeset
255 #endif /* arch_x86 */
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
256 src+=srcstride;
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
257 srca+=srcstride;
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
258 dstbase+=dststride;
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
259 }
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diff changeset
260 #ifdef HAVE_MMX
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261 asm volatile(EMMS:::"memory");
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diff changeset
262 #endif
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
263 return;
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
264 }
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
265
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0f6cce3a8059 runtime cpu detection
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diff changeset
266 static inline void RENAME(vo_draw_alpha_rgb32)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
267 int y;
2833
1b6c207c0410 Enable MMX stuff
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parents: 2823
diff changeset
268 PROFILE_START();
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
269 for(y=0;y<h;y++){
f6b5c2dbc88e OSD alpha renderers moved to osd.c
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diff changeset
270 register int x;
2798
ee2cd36a81a2 Code cleanup - emms is not required when MMX block is commented out.
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parents: 2578
diff changeset
271 #ifdef ARCH_X86
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1b6c207c0410 Enable MMX stuff
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diff changeset
272 #ifdef HAVE_MMX
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ab51228bf3cf p2/p3 bgr32 version (20%faster)
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diff changeset
273 #ifdef HAVE_3DNOW
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86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
274 asm volatile(
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diff changeset
275 PREFETCHW" %0\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
276 PREFETCH" %1\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
277 PREFETCH" %2\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
278 "pxor %%mm7, %%mm7\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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279 "pcmpeqb %%mm6, %%mm6\n\t" // F..F
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03ccbb72e2e9 Cloning 32 stuff to 24
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280 ::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
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86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
281 for(x=0;x<w;x+=2){
2843
5be2017077fb Use new logic suggested by Michael Niedermayer
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parents: 2839
diff changeset
282 if(srca[x] || srca[x+1])
2798
ee2cd36a81a2 Code cleanup - emms is not required when MMX block is commented out.
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diff changeset
283 asm volatile(
2835
86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
284 PREFETCHW" 32%0\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
285 PREFETCH" 32%1\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
286 PREFETCH" 32%2\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
287 "movq %0, %%mm0\n\t" // dstbase
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diff changeset
288 "movq %%mm0, %%mm1\n\t"
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diff changeset
289 "punpcklbw %%mm7, %%mm0\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
290 "punpckhbw %%mm7, %%mm1\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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parents: 2833
diff changeset
291 "movd %1, %%mm2\n\t" // srca ABCD0000
86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
292 "paddb %%mm6, %%mm2\n\t"
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diff changeset
293 "punpcklbw %%mm2, %%mm2\n\t" // srca AABBCCDD
86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
294 "punpcklbw %%mm2, %%mm2\n\t" // srca AAAABBBB
86fdf7897315 Minor speedup for K6-2, K7, P3
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diff changeset
295 "movq %%mm2, %%mm3\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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parents: 2833
diff changeset
296 "punpcklbw %%mm7, %%mm2\n\t" // srca 0A0A0A0A
86fdf7897315 Minor speedup for K6-2, K7, P3
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parents: 2833
diff changeset
297 "punpckhbw %%mm7, %%mm3\n\t" // srca 0B0B0B0B
86fdf7897315 Minor speedup for K6-2, K7, P3
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parents: 2833
diff changeset
298 "pmullw %%mm2, %%mm0\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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parents: 2833
diff changeset
299 "pmullw %%mm3, %%mm1\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
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parents: 2833
diff changeset
300 "psrlw $8, %%mm0\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
nick
parents: 2833
diff changeset
301 "psrlw $8, %%mm1\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
nick
parents: 2833
diff changeset
302 "packuswb %%mm1, %%mm0\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
nick
parents: 2833
diff changeset
303 "movd %2, %%mm2 \n\t" // src ABCD0000
86fdf7897315 Minor speedup for K6-2, K7, P3
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parents: 2833
diff changeset
304 "punpcklbw %%mm2, %%mm2\n\t" // src AABBCCDD
86fdf7897315 Minor speedup for K6-2, K7, P3
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parents: 2833
diff changeset
305 "punpcklbw %%mm2, %%mm2\n\t" // src AAAABBBB
86fdf7897315 Minor speedup for K6-2, K7, P3
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parents: 2833
diff changeset
306 "paddb %%mm2, %%mm0\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
nick
parents: 2833
diff changeset
307 "movq %%mm0, %0\n\t"
86fdf7897315 Minor speedup for K6-2, K7, P3
nick
parents: 2833
diff changeset
308 :: "m" (dstbase[4*x]), "m" (srca[x]), "m" (src[x]));
86fdf7897315 Minor speedup for K6-2, K7, P3
nick
parents: 2833
diff changeset
309 }
2846
ab51228bf3cf p2/p3 bgr32 version (20%faster)
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diff changeset
310 #else //this is faster for intels crap
ab51228bf3cf p2/p3 bgr32 version (20%faster)
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parents: 2843
diff changeset
311 asm volatile(
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
312 PREFETCHW" %0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
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parents: 2843
diff changeset
313 PREFETCH" %1\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
314 PREFETCH" %2\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
315 "pxor %%mm7, %%mm7\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
316 "pcmpeqb %%mm5, %%mm5\n\t" // F..F
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
317 "movq %%mm5, %%mm4\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
318 "psllw $8, %%mm5\n\t" //FF00FF00FF00
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
319 "psrlw $8, %%mm4\n\t" //00FF00FF00FF
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
320 ::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
321 for(x=0;x<w;x+=4){
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
322 asm volatile(
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
323 "movl %1, %%eax\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
324 "orl %%eax, %%eax\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
325 " jz 1f\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
326 PREFETCHW" 32%0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
327 PREFETCH" 32%1\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
328 PREFETCH" 32%2\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
329 "movq %0, %%mm0\n\t" // dstbase
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
330 "movq %%mm0, %%mm1\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
331 "pand %%mm4, %%mm0\n\t" //0R0B0R0B
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
332 "psrlw $8, %%mm1\n\t" //0?0G0?0G
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
333 "movd %%eax, %%mm2\n\t" //srca 0000DCBA
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
334 "paddb bFF, %%mm2\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
335 "punpcklbw %%mm2, %%mm2\n\t" //srca DDCCBBAA
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
336 "movq %%mm2, %%mm3\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
337 "punpcklbw %%mm7, %%mm2\n\t" //srca 0B0B0A0A
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
338 "pmullw %%mm2, %%mm0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
339 "pmullw %%mm2, %%mm1\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
340 "psrlw $8, %%mm0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
341 "pand %%mm5, %%mm1\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
342 "por %%mm1, %%mm0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
343 "movd %2, %%mm2 \n\t" //src 0000DCBA
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
344 "punpcklbw %%mm2, %%mm2\n\t" //src DDCCBBAA
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
345 "movq %%mm2, %%mm6\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
346 "punpcklbw %%mm2, %%mm2\n\t" //src BBBBAAAA
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
347 "paddb %%mm2, %%mm0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
348 "movq %%mm0, %0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
349
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
350 "movq 8%0, %%mm0\n\t" // dstbase
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
351 "movq %%mm0, %%mm1\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
352 "pand %%mm4, %%mm0\n\t" //0R0B0R0B
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
353 "psrlw $8, %%mm1\n\t" //0?0G0?0G
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
354 "punpckhbw %%mm7, %%mm3\n\t" //srca 0D0D0C0C
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
355 "pmullw %%mm3, %%mm0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
356 "pmullw %%mm3, %%mm1\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
357 "psrlw $8, %%mm0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
358 "pand %%mm5, %%mm1\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
359 "por %%mm1, %%mm0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
360 "punpckhbw %%mm6, %%mm6\n\t" //src DDDDCCCC
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
361 "paddb %%mm6, %%mm0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
362 "movq %%mm0, 8%0\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
363 "1:\n\t"
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
364 :: "m" (dstbase[4*x]), "m" (srca[x]), "m" (src[x])
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
365 : "%eax");
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
366 }
ab51228bf3cf p2/p3 bgr32 version (20%faster)
michael
parents: 2843
diff changeset
367 #endif
2839
03ccbb72e2e9 Cloning 32 stuff to 24
nick
parents: 2835
diff changeset
368 #else /* HAVE_MMX */
2823
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
369 for(x=0;x<w;x++){
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
370 if(srca[x]){
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
371 asm volatile(
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
372 "movzbl (%0), %%ecx\n\t"
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
373 "movzbl 1(%0), %%eax\n\t"
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
374 "movzbl 2(%0), %%edx\n\t"
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
375
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
376 "imull %1, %%ecx\n\t"
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
377 "imull %1, %%eax\n\t"
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
378 "imull %1, %%edx\n\t"
2578
d363fde389b5 slow mmx & not so slow asm versions (outcommented)
michael
parents: 947
diff changeset
379
2823
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
380 "addl %2, %%ecx\n\t"
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
381 "addl %2, %%eax\n\t"
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
382 "addl %2, %%edx\n\t"
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
383
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
384 "movb %%ch, (%0)\n\t"
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
385 "movb %%ah, 1(%0)\n\t"
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
386 "movb %%dh, 2(%0)\n\t"
2578
d363fde389b5 slow mmx & not so slow asm versions (outcommented)
michael
parents: 947
diff changeset
387
2823
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
388 :
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
389 :"r" (&dstbase[4*x]),
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
390 "r" ((unsigned)srca[x]),
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
391 "r" (((unsigned)src[x])<<8)
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
392 :"%eax", "%ecx", "%edx"
2578
d363fde389b5 slow mmx & not so slow asm versions (outcommented)
michael
parents: 947
diff changeset
393 );
2823
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
394 }
004ee19ebfcf Extract parallelism from OSD stuff + MMX2 optimization.
nick
parents: 2807
diff changeset
395 }
2839
03ccbb72e2e9 Cloning 32 stuff to 24
nick
parents: 2835
diff changeset
396 #endif /* HAVE_MMX */
2798
ee2cd36a81a2 Code cleanup - emms is not required when MMX block is commented out.
nick
parents: 2578
diff changeset
397 #else /*non x86 arch*/
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
398 for(x=0;x<w;x++){
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
399 if(srca[x]){
947
76fd9463b9d3 FAST_OSD option to disable font outline antialiasing
arpi_esp
parents: 622
diff changeset
400 #ifdef FAST_OSD
76fd9463b9d3 FAST_OSD option to disable font outline antialiasing
arpi_esp
parents: 622
diff changeset
401 dstbase[4*x+0]=dstbase[4*x+1]=dstbase[4*x+2]=src[x];
76fd9463b9d3 FAST_OSD option to disable font outline antialiasing
arpi_esp
parents: 622
diff changeset
402 #else
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
403 dstbase[4*x+0]=((dstbase[4*x+0]*srca[x])>>8)+src[x];
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
404 dstbase[4*x+1]=((dstbase[4*x+1]*srca[x])>>8)+src[x];
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
405 dstbase[4*x+2]=((dstbase[4*x+2]*srca[x])>>8)+src[x];
947
76fd9463b9d3 FAST_OSD option to disable font outline antialiasing
arpi_esp
parents: 622
diff changeset
406 #endif
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
407 }
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
408 }
2798
ee2cd36a81a2 Code cleanup - emms is not required when MMX block is commented out.
nick
parents: 2578
diff changeset
409 #endif /* arch_x86 */
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
410 src+=srcstride;
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
411 srca+=srcstride;
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
412 dstbase+=dststride;
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
413 }
2833
1b6c207c0410 Enable MMX stuff
nick
parents: 2823
diff changeset
414 #ifdef HAVE_MMX
2798
ee2cd36a81a2 Code cleanup - emms is not required when MMX block is commented out.
nick
parents: 2578
diff changeset
415 asm volatile(EMMS:::"memory");
2578
d363fde389b5 slow mmx & not so slow asm versions (outcommented)
michael
parents: 947
diff changeset
416 #endif
2833
1b6c207c0410 Enable MMX stuff
nick
parents: 2823
diff changeset
417 PROFILE_END("vo_draw_alpha_rgb32");
326
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
418 return;
f6b5c2dbc88e OSD alpha renderers moved to osd.c
arpi_esp
parents:
diff changeset
419 }