annotate libmpcodecs/vf_ilpack.c @ 30332:b4c3e12c9a08

Make const prototypes for input sources of sws_scale_* stricter. Patch by Alexis Ballier gmailify($firstname, $familyname)
author benoit
date Tue, 19 Jan 2010 16:30:20 +0000
parents 26a355ffe458
children bbb6ebec87a0
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rev   line source
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1 #include <stdio.h>
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2 #include <stdlib.h>
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3 #include <string.h>
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4 #include <inttypes.h>
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5
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6 #include "config.h"
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7 #include "mp_msg.h"
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8 #include "cpudetect.h"
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9
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10 #include "img_format.h"
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11 #include "mp_image.h"
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12 #include "vf.h"
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13
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14 typedef void (pack_func_t)(unsigned char *dst, unsigned char *y,
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15 unsigned char *u, unsigned char *v, int w, int us, int vs);
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16
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17 struct vf_priv_s {
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18 int mode;
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19 pack_func_t *pack[2];
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20 };
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21
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22 static void pack_nn_C(unsigned char *dst, unsigned char *y,
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23 unsigned char *u, unsigned char *v, int w)
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24 {
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25 int j;
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26 for (j = w/2; j; j--) {
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27 *dst++ = *y++;
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28 *dst++ = *u++;
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29 *dst++ = *y++;
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30 *dst++ = *v++;
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31 }
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32 }
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33
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34 static void pack_li_0_C(unsigned char *dst, unsigned char *y,
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35 unsigned char *u, unsigned char *v, int w, int us, int vs)
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36 {
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37 int j;
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38 for (j = w/2; j; j--) {
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39 *dst++ = *y++;
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40 *dst++ = (u[us+us] + 7*u[0])>>3;
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41 *dst++ = *y++;
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42 *dst++ = (v[vs+vs] + 7*v[0])>>3;
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43 u++; v++;
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44 }
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45 }
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46
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47 static void pack_li_1_C(unsigned char *dst, unsigned char *y,
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48 unsigned char *u, unsigned char *v, int w, int us, int vs)
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49 {
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50 int j;
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51 for (j = w/2; j; j--) {
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52 *dst++ = *y++;
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53 *dst++ = (3*u[us+us] + 5*u[0])>>3;
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54 *dst++ = *y++;
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55 *dst++ = (3*v[vs+vs] + 5*v[0])>>3;
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56 u++; v++;
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57 }
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58 }
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59
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60 #if HAVE_MMX
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61 static void pack_nn_MMX(unsigned char *dst, unsigned char *y,
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62 unsigned char *u, unsigned char *v, int w)
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63 {
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64 __asm__ volatile (""
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65 ASMALIGN(4)
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66 "1: \n\t"
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67 "movq (%0), %%mm1 \n\t"
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68 "movq (%0), %%mm2 \n\t"
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69 "movq (%1), %%mm4 \n\t"
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70 "movq (%2), %%mm6 \n\t"
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71 "punpcklbw %%mm6, %%mm4 \n\t"
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72 "punpcklbw %%mm4, %%mm1 \n\t"
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73 "punpckhbw %%mm4, %%mm2 \n\t"
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74
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75 "add $8, %0 \n\t"
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76 "add $4, %1 \n\t"
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77 "add $4, %2 \n\t"
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78 "movq %%mm1, (%3) \n\t"
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79 "movq %%mm2, 8(%3) \n\t"
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80 "add $16, %3 \n\t"
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81 "decl %4 \n\t"
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82 "jnz 1b \n\t"
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83 "emms \n\t"
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84 :
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85 : "r" (y), "r" (u), "r" (v), "r" (dst), "r" (w/8)
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86 : "memory"
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87 );
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88 pack_nn_C(dst, y, u, v, (w&7));
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89 }
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90
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91 #if HAVE_EBX_AVAILABLE
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92 static void pack_li_0_MMX(unsigned char *dst, unsigned char *y,
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93 unsigned char *u, unsigned char *v, int w, int us, int vs)
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94 {
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95 __asm__ volatile (""
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96 "push %%"REG_BP" \n\t"
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97 #if ARCH_X86_64
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98 "mov %6, %%"REG_BP" \n\t"
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99 #else
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100 "movl 4(%%"REG_d"), %%"REG_BP" \n\t"
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101 "movl (%%"REG_d"), %%"REG_d" \n\t"
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102 #endif
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103 "pxor %%mm0, %%mm0 \n\t"
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104
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105 ASMALIGN(4)
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106 ".Lli0: \n\t"
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107 "movq (%%"REG_S"), %%mm1 \n\t"
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108 "movq (%%"REG_S"), %%mm2 \n\t"
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109
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110 "movq (%%"REG_a",%%"REG_d",2), %%mm4 \n\t"
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111 "movq (%%"REG_b",%%"REG_BP",2), %%mm6 \n\t"
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112 "punpcklbw %%mm0, %%mm4 \n\t"
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113 "punpcklbw %%mm0, %%mm6 \n\t"
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114 "movq (%%"REG_a"), %%mm3 \n\t"
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115 "movq (%%"REG_b"), %%mm5 \n\t"
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116 "punpcklbw %%mm0, %%mm3 \n\t"
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117 "punpcklbw %%mm0, %%mm5 \n\t"
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118 "paddw %%mm3, %%mm4 \n\t"
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119 "paddw %%mm5, %%mm6 \n\t"
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120 "paddw %%mm3, %%mm4 \n\t"
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121 "paddw %%mm5, %%mm6 \n\t"
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122 "paddw %%mm3, %%mm4 \n\t"
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123 "paddw %%mm5, %%mm6 \n\t"
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124 "paddw %%mm3, %%mm4 \n\t"
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125 "paddw %%mm5, %%mm6 \n\t"
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126 "paddw %%mm3, %%mm4 \n\t"
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127 "paddw %%mm5, %%mm6 \n\t"
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128 "paddw %%mm3, %%mm4 \n\t"
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129 "paddw %%mm5, %%mm6 \n\t"
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130 "paddw %%mm3, %%mm4 \n\t"
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131 "paddw %%mm5, %%mm6 \n\t"
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132 "psrlw $3, %%mm4 \n\t"
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133 "psrlw $3, %%mm6 \n\t"
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134 "packuswb %%mm4, %%mm4 \n\t"
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135 "packuswb %%mm6, %%mm6 \n\t"
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136 "punpcklbw %%mm6, %%mm4 \n\t"
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137 "punpcklbw %%mm4, %%mm1 \n\t"
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138 "punpckhbw %%mm4, %%mm2 \n\t"
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139
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140 "movq %%mm1, (%%"REG_D") \n\t"
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141 "movq %%mm2, 8(%%"REG_D") \n\t"
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142
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143 "movq 8(%%"REG_S"), %%mm1 \n\t"
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144 "movq 8(%%"REG_S"), %%mm2 \n\t"
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145
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146 "movq (%%"REG_a",%%"REG_d",2), %%mm4 \n\t"
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147 "movq (%%"REG_b",%%"REG_BP",2), %%mm6 \n\t"
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148 "punpckhbw %%mm0, %%mm4 \n\t"
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149 "punpckhbw %%mm0, %%mm6 \n\t"
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150 "movq (%%"REG_a"), %%mm3 \n\t"
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151 "movq (%%"REG_b"), %%mm5 \n\t"
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152 "punpckhbw %%mm0, %%mm3 \n\t"
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153 "punpckhbw %%mm0, %%mm5 \n\t"
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rfelker
parents: 11643
diff changeset
154 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
155 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
156 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
157 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
158 "paddw %%mm3, %%mm4 \n\t"
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rfelker
parents: 11643
diff changeset
159 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
160 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
161 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
162 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
163 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
164 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
165 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
166 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
167 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
168 "psrlw $3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
169 "psrlw $3, %%mm6 \n\t"
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michael
parents: 11645
diff changeset
170 "packuswb %%mm4, %%mm4 \n\t"
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michael
parents: 11645
diff changeset
171 "packuswb %%mm6, %%mm6 \n\t"
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michael
parents: 11645
diff changeset
172 "punpcklbw %%mm6, %%mm4 \n\t"
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michael
parents: 11645
diff changeset
173 "punpcklbw %%mm4, %%mm1 \n\t"
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michael
parents: 11645
diff changeset
174 "punpckhbw %%mm4, %%mm2 \n\t"
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diego
parents: 29040
diff changeset
175
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diff changeset
176 "add $16, %%"REG_S" \n\t"
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aurel
parents: 11648
diff changeset
177 "add $8, %%"REG_a" \n\t"
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aurel
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diff changeset
178 "add $8, %%"REG_b" \n\t"
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diego
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diff changeset
179
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diff changeset
180 "movq %%mm1, 16(%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
181 "movq %%mm2, 24(%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
182 "add $32, %%"REG_D" \n\t"
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diego
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diff changeset
183
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diff changeset
184 "decl %%ecx \n\t"
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diff changeset
185 "jnz .Lli0 \n\t"
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rfelker
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diff changeset
186 "emms \n\t"
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parents: 11648
diff changeset
187 "pop %%"REG_BP" \n\t"
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diego
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diff changeset
188 :
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diff changeset
189 : "S" (y), "D" (dst), "a" (u), "b" (v), "c" (w/16),
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25337a2147e7 Lots and lots of #ifdef ARCH_... -> #if ARCH_...
reimar
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diff changeset
190 #if ARCH_X86_64
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963f578121c6 Use x86_reg instead of long in several video filters to fix compilation on MinGW64.
reimar
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191 "d" ((x86_reg)us), "r" ((x86_reg)vs)
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diff changeset
192 #else
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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193 "d" (&us)
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diff changeset
194 #endif
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195 : "memory"
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196 );
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197 pack_li_0_C(dst, y, u, v, (w&15), us, vs);
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198 }
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199
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diff changeset
200 static void pack_li_1_MMX(unsigned char *dst, unsigned char *y,
3837fd1bfa5b mmx optimizations
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diff changeset
201 unsigned char *u, unsigned char *v, int w, int us, int vs)
3837fd1bfa5b mmx optimizations
rfelker
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diff changeset
202 {
27754
08d18fe9da52 Change all occurrences of asm and __asm to __asm__, same as was done for FFmpeg.
diego
parents: 25221
diff changeset
203 __asm__ volatile (""
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aurel
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diff changeset
204 "push %%"REG_BP" \n\t"
28290
25337a2147e7 Lots and lots of #ifdef ARCH_... -> #if ARCH_...
reimar
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diff changeset
205 #if ARCH_X86_64
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parents: 11648
diff changeset
206 "mov %6, %%"REG_BP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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diff changeset
207 #else
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
208 "movl 4(%%"REG_d"), %%"REG_BP" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
209 "movl (%%"REG_d"), %%"REG_d" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
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diff changeset
210 #endif
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diff changeset
211 "pxor %%mm0, %%mm0 \n\t"
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diego
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diff changeset
212
19372
6334c14b38eb Replace asmalign.h hack by ASMALIGN cpp macros from config.h.
diego
parents: 18746
diff changeset
213 ASMALIGN(4)
11645
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rfelker
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diff changeset
214 ".Lli1: \n\t"
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821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
215 "movq (%%"REG_S"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
216 "movq (%%"REG_S"), %%mm2 \n\t"
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diego
parents: 29040
diff changeset
217
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parents: 11648
diff changeset
218 "movq (%%"REG_a",%%"REG_d",2), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
219 "movq (%%"REG_b",%%"REG_BP",2), %%mm6 \n\t"
11645
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rfelker
parents: 11643
diff changeset
220 "punpcklbw %%mm0, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
221 "punpcklbw %%mm0, %%mm6 \n\t"
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821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
222 "movq (%%"REG_a"), %%mm3 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
223 "movq (%%"REG_b"), %%mm5 \n\t"
11645
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rfelker
parents: 11643
diff changeset
224 "punpcklbw %%mm0, %%mm3 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
225 "punpcklbw %%mm0, %%mm5 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
226 "movq %%mm4, %%mm7 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
227 "paddw %%mm4, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
228 "paddw %%mm7, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
229 "movq %%mm6, %%mm7 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
230 "paddw %%mm6, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
231 "paddw %%mm7, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
232 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
233 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
234 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
235 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
236 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
237 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
238 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
239 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
240 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
241 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
242 "psrlw $3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
243 "psrlw $3, %%mm6 \n\t"
11648
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michael
parents: 11645
diff changeset
244 "packuswb %%mm4, %%mm4 \n\t"
57372aa1d655 mmx simplifications
michael
parents: 11645
diff changeset
245 "packuswb %%mm6, %%mm6 \n\t"
57372aa1d655 mmx simplifications
michael
parents: 11645
diff changeset
246 "punpcklbw %%mm6, %%mm4 \n\t"
57372aa1d655 mmx simplifications
michael
parents: 11645
diff changeset
247 "punpcklbw %%mm4, %%mm1 \n\t"
57372aa1d655 mmx simplifications
michael
parents: 11645
diff changeset
248 "punpckhbw %%mm4, %%mm2 \n\t"
29263
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diego
parents: 29040
diff changeset
249
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821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
250 "movq %%mm1, (%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
251 "movq %%mm2, 8(%%"REG_D") \n\t"
29263
0f1b5b68af32 whitespace cosmetics: Remove all trailing whitespace.
diego
parents: 29040
diff changeset
252
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821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
253 "movq 8(%%"REG_S"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
254 "movq 8(%%"REG_S"), %%mm2 \n\t"
29263
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diego
parents: 29040
diff changeset
255
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821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
256 "movq (%%"REG_a",%%"REG_d",2), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
257 "movq (%%"REG_b",%%"REG_BP",2), %%mm6 \n\t"
11645
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
258 "punpckhbw %%mm0, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
259 "punpckhbw %%mm0, %%mm6 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
260 "movq (%%"REG_a"), %%mm3 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
261 "movq (%%"REG_b"), %%mm5 \n\t"
11645
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
262 "punpckhbw %%mm0, %%mm3 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
263 "punpckhbw %%mm0, %%mm5 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
264 "movq %%mm4, %%mm7 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
265 "paddw %%mm4, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
266 "paddw %%mm7, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
267 "movq %%mm6, %%mm7 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
268 "paddw %%mm6, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
269 "paddw %%mm7, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
270 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
271 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
272 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
273 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
274 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
275 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
276 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
277 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
278 "paddw %%mm3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
279 "paddw %%mm5, %%mm6 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
280 "psrlw $3, %%mm4 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
281 "psrlw $3, %%mm6 \n\t"
11648
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michael
parents: 11645
diff changeset
282 "packuswb %%mm4, %%mm4 \n\t"
57372aa1d655 mmx simplifications
michael
parents: 11645
diff changeset
283 "packuswb %%mm6, %%mm6 \n\t"
57372aa1d655 mmx simplifications
michael
parents: 11645
diff changeset
284 "punpcklbw %%mm6, %%mm4 \n\t"
57372aa1d655 mmx simplifications
michael
parents: 11645
diff changeset
285 "punpcklbw %%mm4, %%mm1 \n\t"
57372aa1d655 mmx simplifications
michael
parents: 11645
diff changeset
286 "punpckhbw %%mm4, %%mm2 \n\t"
29263
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diego
parents: 29040
diff changeset
287
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821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
288 "add $16, %%"REG_S" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
289 "add $8, %%"REG_a" \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
290 "add $8, %%"REG_b" \n\t"
29263
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diego
parents: 29040
diff changeset
291
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821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
292 "movq %%mm1, 16(%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
293 "movq %%mm2, 24(%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
294 "add $32, %%"REG_D" \n\t"
29263
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diego
parents: 29040
diff changeset
295
11645
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rfelker
parents: 11643
diff changeset
296 "decl %%ecx \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
297 "jnz .Lli1 \n\t"
3837fd1bfa5b mmx optimizations
rfelker
parents: 11643
diff changeset
298 "emms \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
299 "pop %%"REG_BP" \n\t"
29263
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diego
parents: 29040
diff changeset
300 :
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821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 11648
diff changeset
301 : "S" (y), "D" (dst), "a" (u), "b" (v), "c" (w/16),
28290
25337a2147e7 Lots and lots of #ifdef ARCH_... -> #if ARCH_...
reimar
parents: 27754
diff changeset
302 #if ARCH_X86_64
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303 "d" ((x86_reg)us), "r" ((x86_reg)vs)
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304 #else
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305 "d" (&us)
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306 #endif
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307 : "memory"
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308 );
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309 pack_li_1_C(dst, y, u, v, (w&15), us, vs);
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310 }
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311 #endif /* HAVE_EBX_AVAILABLE */
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312 #endif
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313
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314 static pack_func_t *pack_nn;
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315 static pack_func_t *pack_li_0;
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316 static pack_func_t *pack_li_1;
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317
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318 static void ilpack(unsigned char *dst, unsigned char *src[3],
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319 int dststride, int srcstride[3], int w, int h, pack_func_t *pack[2])
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320 {
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321 int i;
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322 unsigned char *y, *u, *v;
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323 int ys = srcstride[0], us = srcstride[1], vs = srcstride[2];
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324 int a, b;
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325
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326 y = src[0];
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327 u = src[1];
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328 v = src[2];
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329
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330 pack_nn(dst, y, u, v, w, 0, 0);
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331 y += ys; dst += dststride;
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332 pack_nn(dst, y, u+us, v+vs, w, 0, 0);
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333 y += ys; dst += dststride;
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334 for (i=2; i<h-2; i++) {
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335 a = (i&2) ? 1 : -1;
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336 b = (i&1) ^ ((i&2)>>1);
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337 pack[b](dst, y, u, v, w, us*a, vs*a);
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338 y += ys;
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339 if ((i&3) == 1) {
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340 u -= us;
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341 v -= vs;
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342 } else {
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343 u += us;
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344 v += vs;
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345 }
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346 dst += dststride;
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347 }
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348 pack_nn(dst, y, u, v, w, 0, 0);
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349 y += ys; dst += dststride; u += us; v += vs;
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350 pack_nn(dst, y, u, v, w, 0, 0);
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351 }
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352
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353
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354 static int put_image(struct vf_instance_s* vf, mp_image_t *mpi, double pts)
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355 {
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356 mp_image_t *dmpi;
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357
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358 // hope we'll get DR buffer:
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359 dmpi=vf_get_image(vf->next, IMGFMT_YUY2,
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360 MP_IMGTYPE_TEMP, MP_IMGFLAG_ACCEPT_STRIDE,
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361 mpi->w, mpi->h);
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362
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363 ilpack(dmpi->planes[0], mpi->planes, dmpi->stride[0], mpi->stride, mpi->w, mpi->h, vf->priv->pack);
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364
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365 return vf_next_put_image(vf,dmpi, pts);
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366 }
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367
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368 static int config(struct vf_instance_s* vf,
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369 int width, int height, int d_width, int d_height,
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370 unsigned int flags, unsigned int outfmt)
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371 {
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372 /* FIXME - also support UYVY output? */
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373 return vf_next_config(vf, width, height, d_width, d_height, flags, IMGFMT_YUY2);
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374 }
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375
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376
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377 static int query_format(struct vf_instance_s* vf, unsigned int fmt)
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378 {
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379 /* FIXME - really any YUV 4:2:0 input format should work */
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380 switch (fmt) {
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381 case IMGFMT_YV12:
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382 case IMGFMT_IYUV:
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383 case IMGFMT_I420:
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384 return vf_next_query_format(vf,IMGFMT_YUY2);
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385 }
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386 return 0;
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387 }
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388
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389 static int open(vf_instance_t *vf, char* args)
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390 {
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391 vf->config=config;
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392 vf->query_format=query_format;
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393 vf->put_image=put_image;
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394 vf->priv = calloc(1, sizeof(struct vf_priv_s));
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395 vf->priv->mode = 1;
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396 if (args) sscanf(args, "%d", &vf->priv->mode);
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397
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398 pack_nn = (pack_func_t *)pack_nn_C;
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399 pack_li_0 = pack_li_0_C;
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400 pack_li_1 = pack_li_1_C;
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401 #if HAVE_MMX
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402 if(gCpuCaps.hasMMX) {
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403 pack_nn = (pack_func_t *)pack_nn_MMX;
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404 #if HAVE_EBX_AVAILABLE
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405 pack_li_0 = pack_li_0_MMX;
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406 pack_li_1 = pack_li_1_MMX;
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407 #endif
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408 }
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409 #endif
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410
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411 switch(vf->priv->mode) {
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412 case 0:
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413 vf->priv->pack[0] = vf->priv->pack[1] = pack_nn;
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414 break;
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415 default:
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416 mp_msg(MSGT_VFILTER, MSGL_WARN,
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417 "ilpack: unknown mode %d (fallback to linear)\n",
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418 vf->priv->mode);
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419 case 1:
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420 vf->priv->pack[0] = pack_li_0;
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421 vf->priv->pack[1] = pack_li_1;
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422 break;
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423 }
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424
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425 return 1;
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426 }
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427
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428 const vf_info_t vf_info_ilpack = {
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429 "4:2:0 planar -> 4:2:2 packed reinterlacer",
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430 "ilpack",
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431 "Richard Felker",
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432 "",
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433 open,
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434 NULL
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435 };
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436