annotate libmpcodecs/vf_tfields.c @ 30177:c02b833051a7

Pass a proper va_list type to vsscanf() test in configure. This fixes the check on SuperH with CodeSourcery compilers. patch by Bill Traynor, wmat naoi ca
author diego
date Mon, 04 Jan 2010 21:57:13 +0000
parents 26a355ffe458
children bbb6ebec87a0
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1 #include <stdio.h>
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2 #include <stdlib.h>
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3 #include <string.h>
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4
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5 #include "config.h"
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6 #include "mp_msg.h"
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7 #include "cpudetect.h"
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8
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9 #include "img_format.h"
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10 #include "mp_image.h"
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11 #include "vf.h"
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12
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13 #include "libvo/fastmemcpy.h"
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14
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15 struct vf_priv_s {
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16 int mode;
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17 int parity;
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18 int buffered_i;
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19 mp_image_t *buffered_mpi;
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20 double buffered_pts;
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21 };
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22
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23 static void deint(unsigned char *dest, int ds, unsigned char *src, int ss, int w, int h, int field)
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24 {
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25 int x, y;
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26 src += ss;
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27 dest += ds;
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28 if (field) {
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29 src += ss;
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30 dest += ds;
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31 h -= 2;
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32 }
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33 for (y=h/2; y; y--) {
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34 for (x=0; x<w; x++) {
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35 if (((src[x-ss] < src[x]) && (src[x+ss] < src[x])) ||
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36 ((src[x-ss] > src[x]) && (src[x+ss] > src[x]))) {
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37 //dest[x] = (src[x+ss] + src[x-ss])>>1;
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38 dest[x] = ((src[x+ss]<<1) + (src[x-ss]<<1)
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39 + src[x+ss+1] + src[x-ss+1]
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40 + src[x+ss-1] + src[x-ss-1])>>3;
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41 }
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42 else dest[x] = src[x];
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43 }
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44 dest += ds<<1;
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45 src += ss<<1;
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46 }
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47 }
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48
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49 #if HAVE_AMD3DNOW
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50 static void qpel_li_3DNOW(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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51 {
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52 int i, j, ssd=ss;
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53 long crap1, crap2;
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54 if (up) {
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55 ssd = -ss;
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56 fast_memcpy(d, s, w);
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57 d += ds;
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58 s += ss;
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59 }
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60 for (i=h-1; i; i--) {
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61 __asm__ volatile(
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62 "1: \n\t"
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63 "movq (%%"REG_S"), %%mm0 \n\t"
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64 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
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65 "pavgusb %%mm0, %%mm1 \n\t"
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66 "add $8, %%"REG_S" \n\t"
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67 "pavgusb %%mm0, %%mm1 \n\t"
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68 "movq %%mm1, (%%"REG_D") \n\t"
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69 "add $8, %%"REG_D" \n\t"
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70 "decl %%ecx \n\t"
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71 "jnz 1b \n\t"
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72 : "=S"(crap1), "=D"(crap2)
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73 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
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74 );
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75 for (j=w-(w&7); j<w; j++)
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76 d[j] = (s[j+ssd] + 3*s[j])>>2;
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77 d += ds;
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78 s += ss;
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79 }
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80 if (!up) fast_memcpy(d, s, w);
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81 __asm__ volatile("emms \n\t" : : : "memory");
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82 }
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83 #endif
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84
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85 #if HAVE_MMX2
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86 static void qpel_li_MMX2(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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87 {
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88 int i, j, ssd=ss;
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89 long crap1, crap2;
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90 if (up) {
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91 ssd = -ss;
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92 fast_memcpy(d, s, w);
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93 d += ds;
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94 s += ss;
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95 }
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96 for (i=h-1; i; i--) {
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97 __asm__ volatile(
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98 "pxor %%mm7, %%mm7 \n\t"
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99 "2: \n\t"
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100 "movq (%%"REG_S"), %%mm0 \n\t"
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101 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
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102 "pavgb %%mm0, %%mm1 \n\t"
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103 "add $8, %%"REG_S" \n\t"
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104 "pavgb %%mm0, %%mm1 \n\t"
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105 "movq %%mm1, (%%"REG_D") \n\t"
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106 "add $8, %%"REG_D" \n\t"
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107 "decl %%ecx \n\t"
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108 "jnz 2b \n\t"
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109 : "=S"(crap1), "=D"(crap2)
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110 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
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111 );
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112 for (j=w-(w&7); j<w; j++)
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113 d[j] = (s[j+ssd] + 3*s[j])>>2;
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114 d += ds;
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115 s += ss;
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116 }
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117 if (!up) fast_memcpy(d, s, w);
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118 __asm__ volatile("emms \n\t" : : : "memory");
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119 }
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120 #endif
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121
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122 #if HAVE_MMX
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123 static void qpel_li_MMX(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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124 {
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125 int i, j, ssd=ss;
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126 int crap1, crap2;
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127 if (up) {
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128 ssd = -ss;
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129 fast_memcpy(d, s, w);
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130 d += ds;
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131 s += ss;
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132 }
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133 for (i=h-1; i; i--) {
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134 __asm__ volatile(
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135 "pxor %%mm7, %%mm7 \n\t"
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136 "3: \n\t"
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137 "movq (%%"REG_S"), %%mm0 \n\t"
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138 "movq (%%"REG_S"), %%mm1 \n\t"
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139 "movq (%%"REG_S",%%"REG_a"), %%mm2 \n\t"
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140 "movq (%%"REG_S",%%"REG_a"), %%mm3 \n\t"
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141 "add $8, %%"REG_S" \n\t"
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142 "punpcklbw %%mm7, %%mm0 \n\t"
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143 "punpckhbw %%mm7, %%mm1 \n\t"
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144 "punpcklbw %%mm7, %%mm2 \n\t"
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145 "punpckhbw %%mm7, %%mm3 \n\t"
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diff changeset
146 "paddw %%mm0, %%mm2 \n\t"
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147 "paddw %%mm1, %%mm3 \n\t"
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diff changeset
148 "paddw %%mm0, %%mm2 \n\t"
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diff changeset
149 "paddw %%mm1, %%mm3 \n\t"
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diff changeset
150 "paddw %%mm0, %%mm2 \n\t"
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151 "paddw %%mm1, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
152 "psrlw $2, %%mm2 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
153 "psrlw $2, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
154 "packsswb %%mm3, %%mm2 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
155 "movq %%mm2, (%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
156 "add $8, %%"REG_D" \n\t"
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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parents: 10009
diff changeset
157 "decl %%ecx \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
158 "jnz 3b \n\t"
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
159 : "=S"(crap1), "=D"(crap2)
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821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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diff changeset
160 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
161 );
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
162 for (j=w-(w&7); j<w; j++)
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
163 d[j] = (s[j+ssd] + 3*s[j])>>2;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
164 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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parents: 10009
diff changeset
165 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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parents: 10009
diff changeset
166 }
23457
a124f3abc1ec Replace implicit use of fast_memcpy via macro by explicit use to allow
reimar
parents: 18986
diff changeset
167 if (!up) fast_memcpy(d, s, w);
27754
08d18fe9da52 Change all occurrences of asm and __asm to __asm__, same as was done for FFmpeg.
diego
parents: 25221
diff changeset
168 __asm__ volatile("emms \n\t" : : : "memory");
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
169 }
10049
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diff changeset
170
29639
26a355ffe458 Add several HAVE_EBX_AVAILABLE conditions where necessary
reimar
parents: 29263
diff changeset
171 #if HAVE_EBX_AVAILABLE
10049
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diff changeset
172 static void qpel_4tap_MMX(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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173 {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
174 int i, j, ssd=ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
175 static const short filter[] = {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
176 29, 29, 29, 29, 110, 110, 110, 110,
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
177 9, 9, 9, 9, 3, 3, 3, 3,
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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178 64, 64, 64, 64 };
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
179 int crap1, crap2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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180 if (up) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
181 ssd = -ss;
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parents: 18986
diff changeset
182 fast_memcpy(d, s, w);
10049
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diff changeset
183 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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184 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
185 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
186 d[j] = (s[j+ssd] + 3*s[j])>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
187 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
188 for (i=h-3; i; i--) {
27754
08d18fe9da52 Change all occurrences of asm and __asm to __asm__, same as was done for FFmpeg.
diego
parents: 25221
diff changeset
189 __asm__ volatile(
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
190 "pxor %%mm0, %%mm0 \n\t"
13720
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parents: 10078
diff changeset
191 "movq (%%"REG_d"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
192 "movq 8(%%"REG_d"), %%mm5 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
193 "movq 16(%%"REG_d"), %%mm6 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
194 "movq 24(%%"REG_d"), %%mm7 \n\t"
10049
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diff changeset
195 "4: \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
196
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parents: 10078
diff changeset
197 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
198 "movq (%%"REG_S"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
199 "movq (%%"REG_S",%%"REG_b"), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
200 "punpcklbw %%mm0, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
201 "punpcklbw %%mm0, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
202 "pmullw %%mm4, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
203 "punpcklbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
204 "pmullw %%mm5, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
205 "paddusw %%mm2, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
206 "pmullw %%mm6, %%mm3 \n\t"
13720
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parents: 10078
diff changeset
207 "movq (%%"REG_S",%%"REG_a",2), %%mm2 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
208 "psubusw %%mm3, %%mm1 \n\t"
29263
0f1b5b68af32 whitespace cosmetics: Remove all trailing whitespace.
diego
parents: 28335
diff changeset
209 "punpcklbw %%mm0, %%mm2 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
210 "pmullw %%mm7, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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parents: 10020
diff changeset
211 "psubusw %%mm2, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
212 "psrlw $7, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
213
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
214 "movq (%%"REG_S",%%"REG_a"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
215 "movq (%%"REG_S"), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
216 "punpckhbw %%mm0, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
217 "punpckhbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
218 "pmullw %%mm4, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
219 "pmullw %%mm5, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
220 "paddusw %%mm3, %%mm2 \n\t"
13720
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aurel
parents: 10078
diff changeset
221 "movq (%%"REG_S",%%"REG_b"), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
222 "punpckhbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
223 "pmullw %%mm6, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
224 "psubusw %%mm3, %%mm2 \n\t"
13720
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parents: 10078
diff changeset
225 "movq (%%"REG_S",%%"REG_a",2), %%mm3 \n\t"
29263
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diego
parents: 28335
diff changeset
226 "punpckhbw %%mm0, %%mm3 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
227 "add $8, %%"REG_S" \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
228 "pmullw %%mm7, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
229 "psubusw %%mm3, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
230 "psrlw $7, %%mm2 \n\t"
29263
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diego
parents: 28335
diff changeset
231
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
232 "packuswb %%mm2, %%mm1 \n\t"
13720
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parents: 10078
diff changeset
233 "movq %%mm1, (%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
234 "add $8, %%"REG_D" \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
235 "decl %%ecx \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
236 "jnz 4b \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
237 : "=S"(crap1), "=D"(crap2)
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parents: 10078
diff changeset
238 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd), "b"((long)-ssd), "d"(filter)
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
239 );
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
240 for (j=w-(w&7); j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
241 d[j] = (-9*s[j-ssd] + 111*s[j] + 29*s[j+ssd] - 3*s[j+ssd+ssd])>>7;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
242 d += ds;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
243 s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
244 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
245 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
246 d[j] = (s[j+ssd] + 3*s[j])>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
247 d += ds; s += ss;
23457
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reimar
parents: 18986
diff changeset
248 if (!up) fast_memcpy(d, s, w);
27754
08d18fe9da52 Change all occurrences of asm and __asm to __asm__, same as was done for FFmpeg.
diego
parents: 25221
diff changeset
249 __asm__ volatile("emms \n\t" : : : "memory");
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
250 }
29639
26a355ffe458 Add several HAVE_EBX_AVAILABLE conditions where necessary
reimar
parents: 29263
diff changeset
251 #endif /* HAVE_EBX_AVAILABLE */
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diff changeset
252 #endif
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diff changeset
253
10049
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diff changeset
254 static inline int clamp(int a)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
255 {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
256 // If a<512, this is equivalent to:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
257 // return (a<0) ? 0 : ( (a>255) ? 255 : a);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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258 return (~(a>>31)) & (a | ((a<<23)>>31));
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
259 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
260
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
261 static void qpel_li_C(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
10020
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diff changeset
262 {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
263 int i, j, ssd=ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
264 if (up) {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
265 ssd = -ss;
23457
a124f3abc1ec Replace implicit use of fast_memcpy via macro by explicit use to allow
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parents: 18986
diff changeset
266 fast_memcpy(d, s, w);
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
267 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
268 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
269 }
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
270 for (i=h-1; i; i--) {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
271 for (j=0; j<w; j++)
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
272 d[j] = (s[j+ssd] + 3*s[j])>>2;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
273 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
274 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
275 }
23457
a124f3abc1ec Replace implicit use of fast_memcpy via macro by explicit use to allow
reimar
parents: 18986
diff changeset
276 if (!up) fast_memcpy(d, s, w);
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
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parents: 9593
diff changeset
277 }
9514
08264c647f46 new filter
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parents:
diff changeset
278
10049
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diff changeset
279 static void qpel_4tap_C(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
280 {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
281 int i, j, ssd=ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
282 if (up) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
283 ssd = -ss;
23457
a124f3abc1ec Replace implicit use of fast_memcpy via macro by explicit use to allow
reimar
parents: 18986
diff changeset
284 fast_memcpy(d, s, w);
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
285 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
286 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
287 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
288 d[j] = (s[j+ssd] + 3*s[j] + 2)>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
289 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
290 for (i=h-3; i; i--) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
291 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
292 d[j] = clamp((-9*s[j-ssd] + 111*s[j] + 29*s[j+ssd] - 3*s[j+ssd+ssd] + 64)>>7);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
293 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
294 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
295 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
296 d[j] = (s[j+ssd] + 3*s[j] + 2)>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
297 d += ds; s += ss;
23457
a124f3abc1ec Replace implicit use of fast_memcpy via macro by explicit use to allow
reimar
parents: 18986
diff changeset
298 if (!up) fast_memcpy(d, s, w);
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
299 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
300
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
301 static void (*qpel_li)(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
302 static void (*qpel_4tap)(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up);
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
303
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
304 static int continue_buffered_image(struct vf_instance_s *);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
305 extern int correct_pts;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
306
17906
20aca9baf5d8 passing pts through the filter layer (lets see if pts or cola comes out at the end)
michael
parents: 17012
diff changeset
307 static int put_image(struct vf_instance_s* vf, mp_image_t *mpi, double pts)
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
308 {
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
309 vf->priv->buffered_mpi = mpi;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
310 vf->priv->buffered_pts = pts;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
311 vf->priv->buffered_i = 0;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
312 return continue_buffered_image(vf);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
313 }
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
314
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
315 static int continue_buffered_image(struct vf_instance_s *vf)
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
316 {
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
317 int i=vf->priv->buffered_i;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
318 double pts = vf->priv->buffered_pts;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
319 mp_image_t *mpi = vf->priv->buffered_mpi;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
320 int ret=0;
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
321 mp_image_t *dmpi;
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
322 void (*qpel)(unsigned char *, unsigned char *, int, int, int, int, int);
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
diff changeset
323 int bpp=1;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
324 int tff;
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
diff changeset
325
18986
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
326 if (i == 0)
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
327 vf_queue_frame(vf, continue_buffered_image);
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
328 pts += i * .02; // XXX not right
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
329
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
diff changeset
330 if (!(mpi->flags & MP_IMGFLAG_PLANAR)) bpp = mpi->bpp/8;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
331 if (vf->priv->parity < 0) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
332 if (mpi->fields & MP_IMGFIELD_ORDERED)
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
333 tff = mpi->fields & MP_IMGFIELD_TOP_FIRST;
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
334 else
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
335 tff = 1;
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
336 }
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
337 else tff = (vf->priv->parity&1)^1;
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
338
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
339 switch (vf->priv->mode) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
340 case 2:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
341 qpel = qpel_li;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
342 break;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
343 case 3:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
344 // TODO: add 3tap filter
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
345 qpel = qpel_4tap;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
346 break;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
347 case 4:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
348 qpel = qpel_4tap;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
349 break;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
350 }
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
351
08264c647f46 new filter
rfelker
parents:
diff changeset
352 switch (vf->priv->mode) {
08264c647f46 new filter
rfelker
parents:
diff changeset
353 case 0:
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
354 for (; i<2; i++) {
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
355 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
356 MP_IMGTYPE_EXPORT, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
357 mpi->width, mpi->height/2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
358 dmpi->planes[0] = mpi->planes[0] + (i^!tff)*mpi->stride[0];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
359 dmpi->stride[0] = 2*mpi->stride[0];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
360 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
361 dmpi->planes[1] = mpi->planes[1] + (i^!tff)*mpi->stride[1];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
362 dmpi->planes[2] = mpi->planes[2] + (i^!tff)*mpi->stride[2];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
363 dmpi->stride[1] = 2*mpi->stride[1];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
364 dmpi->stride[2] = 2*mpi->stride[2];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
365 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
366 ret |= vf_next_put_image(vf, dmpi, pts);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
367 if (correct_pts)
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
368 break;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
369 else
28175
60402016152c Fix OSD flicker with tfields as well.
reimar
parents: 27754
diff changeset
370 if (!i) vf_extra_flip(vf);
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
371 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
372 break;
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
373 case 1:
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
374 for (; i<2; i++) {
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
375 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
376 MP_IMGTYPE_TEMP, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
377 mpi->width, mpi->height);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
378 my_memcpy_pic(dmpi->planes[0] + (i^!tff)*dmpi->stride[0],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
379 mpi->planes[0] + (i^!tff)*mpi->stride[0],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
380 mpi->w*bpp, mpi->h/2, dmpi->stride[0]*2, mpi->stride[0]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
381 deint(dmpi->planes[0], dmpi->stride[0], mpi->planes[0], mpi->stride[0], mpi->w, mpi->h, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
382 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
383 my_memcpy_pic(dmpi->planes[1] + (i^!tff)*dmpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
384 mpi->planes[1] + (i^!tff)*mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
385 mpi->chroma_width, mpi->chroma_height/2,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
386 dmpi->stride[1]*2, mpi->stride[1]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
387 my_memcpy_pic(dmpi->planes[2] + (i^!tff)*dmpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
388 mpi->planes[2] + (i^!tff)*mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
389 mpi->chroma_width, mpi->chroma_height/2,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
390 dmpi->stride[2]*2, mpi->stride[2]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
391 deint(dmpi->planes[1], dmpi->stride[1], mpi->planes[1], mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
392 mpi->chroma_width, mpi->chroma_height, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
393 deint(dmpi->planes[2], dmpi->stride[2], mpi->planes[2], mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
394 mpi->chroma_width, mpi->chroma_height, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
395 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
396 ret |= vf_next_put_image(vf, dmpi, pts);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
397 if (correct_pts)
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
398 break;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
399 else
28175
60402016152c Fix OSD flicker with tfields as well.
reimar
parents: 27754
diff changeset
400 if (!i) vf_extra_flip(vf);
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
401 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
402 break;
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
rfelker
parents: 9593
diff changeset
403 case 2:
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
404 case 3:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
405 case 4:
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
406 for (; i<2; i++) {
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
407 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
408 MP_IMGTYPE_TEMP, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
409 mpi->width, mpi->height/2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
410 qpel(dmpi->planes[0], mpi->planes[0] + (i^!tff)*mpi->stride[0],
15012
ad8815f740d3 1000l, last commit broke qpel interp entirely
rfelker
parents: 14888
diff changeset
411 mpi->w*bpp, mpi->h/2, dmpi->stride[0], mpi->stride[0]*2, (i^!tff));
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
412 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
413 qpel(dmpi->planes[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
414 mpi->planes[1] + (i^!tff)*mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
415 mpi->chroma_width, mpi->chroma_height/2,
15012
ad8815f740d3 1000l, last commit broke qpel interp entirely
rfelker
parents: 14888
diff changeset
416 dmpi->stride[1], mpi->stride[1]*2, (i^!tff));
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
417 qpel(dmpi->planes[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
418 mpi->planes[2] + (i^!tff)*mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
419 mpi->chroma_width, mpi->chroma_height/2,
15012
ad8815f740d3 1000l, last commit broke qpel interp entirely
rfelker
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420 dmpi->stride[2], mpi->stride[2]*2, (i^!tff));
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
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421 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
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422 ret |= vf_next_put_image(vf, dmpi, pts);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
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423 if (correct_pts)
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uau
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424 break;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
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425 else
28175
60402016152c Fix OSD flicker with tfields as well.
reimar
parents: 27754
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426 if (!i) vf_extra_flip(vf);
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
rfelker
parents: 9593
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427 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
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428 break;
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429 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
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430 vf->priv->buffered_i = 1;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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431 return ret;
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432 }
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433
24605
8a6f80593529 Disable unused query_format functions for now until they are
diego
parents: 23666
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434 #if 0
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435 static int query_format(struct vf_instance_s* vf, unsigned int fmt)
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436 {
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437 /* FIXME - figure out which other formats work */
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438 switch (fmt) {
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439 case IMGFMT_YV12:
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440 case IMGFMT_IYUV:
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441 case IMGFMT_I420:
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442 return vf_next_query_format(vf, fmt);
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443 }
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444 return 0;
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445 }
24605
8a6f80593529 Disable unused query_format functions for now until they are
diego
parents: 23666
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446 #endif
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447
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448 static int config(struct vf_instance_s* vf,
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449 int width, int height, int d_width, int d_height,
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450 unsigned int flags, unsigned int outfmt)
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451 {
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452 switch (vf->priv->mode) {
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453 case 0:
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
rfelker
parents: 9593
diff changeset
454 case 2:
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
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455 case 3:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
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456 case 4:
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457 return vf_next_config(vf,width,height/2,d_width,d_height,flags,outfmt);
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458 case 1:
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459 return vf_next_config(vf,width,height,d_width,d_height,flags,outfmt);
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460 }
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461 return 0;
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462 }
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463
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464 static void uninit(struct vf_instance_s* vf)
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465 {
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466 free(vf->priv);
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467 }
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468
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469 static int open(vf_instance_t *vf, char* args)
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470 {
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471 struct vf_priv_s *p;
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472 vf->config = config;
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473 vf->put_image = put_image;
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
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474 //vf->query_format = query_format;
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475 vf->uninit = uninit;
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476 vf->default_reqs = VFCAP_ACCEPT_STRIDE;
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477 vf->priv = p = calloc(1, sizeof(struct vf_priv_s));
15013
0bb95cd581b6 sane default mode
rfelker
parents: 15012
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478 vf->priv->mode = 4;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
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479 vf->priv->parity = -1;
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
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480 if (args) sscanf(args, "%d:%d", &vf->priv->mode, &vf->priv->parity);
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
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481 qpel_li = qpel_li_C;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
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482 qpel_4tap = qpel_4tap_C;
28290
25337a2147e7 Lots and lots of #ifdef ARCH_... -> #if ARCH_...
reimar
parents: 28175
diff changeset
483 #if HAVE_MMX
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
484 if(gCpuCaps.hasMMX) qpel_li = qpel_li_MMX;
29639
26a355ffe458 Add several HAVE_EBX_AVAILABLE conditions where necessary
reimar
parents: 29263
diff changeset
485 #if HAVE_EBX_AVAILABLE
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
486 if(gCpuCaps.hasMMX) qpel_4tap = qpel_4tap_MMX;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
487 #endif
29639
26a355ffe458 Add several HAVE_EBX_AVAILABLE conditions where necessary
reimar
parents: 29263
diff changeset
488 #endif
28290
25337a2147e7 Lots and lots of #ifdef ARCH_... -> #if ARCH_...
reimar
parents: 28175
diff changeset
489 #if HAVE_MMX2
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
490 if(gCpuCaps.hasMMX2) qpel_li = qpel_li_MMX2;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
491 #endif
28335
31287e75b5d8 HAVE_3DNOW --> HAVE_AMD3DNOW
diego
parents: 28290
diff changeset
492 #if HAVE_AMD3DNOW
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
493 if(gCpuCaps.has3DNow) qpel_li = qpel_li_3DNOW;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
494 #endif
9514
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495 return 1;
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496 }
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497
25221
00fff9a3b735 Make all vf_info_t structs const
reimar
parents: 24605
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498 const vf_info_t vf_info_tfields = {
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499 "temporal field separation",
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500 "tfields",
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parents:
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501 "Rich Felker",
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502 "",
9593
e9a2af584986 Add the new -vf option wich is the same as vop in reverse order.
albeu
parents: 9514
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503 open,
e9a2af584986 Add the new -vf option wich is the same as vop in reverse order.
albeu
parents: 9514
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504 NULL
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505 };
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506
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parents:
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507