Mercurial > mplayer.hg
annotate postproc/swscale_template.c @ 15219:c931a567a395
Translation synced with 1.52
author | jheryan |
---|---|
date | Wed, 20 Apr 2005 07:41:24 +0000 |
parents | 1fab95e4513c |
children | 3486552cd33e |
rev | line source |
---|---|
4295 | 1 /* |
9476
eff727517e6b
yuv2rgb brightness/contrast/saturation/different colorspaces support finished
michael
parents:
9434
diff
changeset
|
2 Copyright (C) 2001-2003 Michael Niedermayer <michaelni@gmx.at> |
2216 | 3 |
4295 | 4 This program is free software; you can redistribute it and/or modify |
5 it under the terms of the GNU General Public License as published by | |
6 the Free Software Foundation; either version 2 of the License, or | |
7 (at your option) any later version. | |
2216 | 8 |
4295 | 9 This program is distributed in the hope that it will be useful, |
10 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 GNU General Public License for more details. | |
13 | |
14 You should have received a copy of the GNU General Public License | |
15 along with this program; if not, write to the Free Software | |
16 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 */ | |
2264
7851375ea156
increased precission of s_xinc s_xinc2 (needed for the mmx2 bugfix)
michael
parents:
2237
diff
changeset
|
18 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
19 #undef REAL_MOVNTQ |
2540 | 20 #undef MOVNTQ |
2680 | 21 #undef PAVGB |
3136 | 22 #undef PREFETCH |
23 #undef PREFETCHW | |
24 #undef EMMS | |
25 #undef SFENCE | |
26 | |
27 #ifdef HAVE_3DNOW | |
28 /* On K6 femms is faster of emms. On K7 femms is directly mapped on emms. */ | |
29 #define EMMS "femms" | |
30 #else | |
31 #define EMMS "emms" | |
32 #endif | |
33 | |
34 #ifdef HAVE_3DNOW | |
35 #define PREFETCH "prefetch" | |
36 #define PREFETCHW "prefetchw" | |
37 #elif defined ( HAVE_MMX2 ) | |
38 #define PREFETCH "prefetchnta" | |
39 #define PREFETCHW "prefetcht0" | |
40 #else | |
41 #define PREFETCH "/nop" | |
42 #define PREFETCHW "/nop" | |
43 #endif | |
44 | |
45 #ifdef HAVE_MMX2 | |
46 #define SFENCE "sfence" | |
47 #else | |
48 #define SFENCE "/nop" | |
49 #endif | |
2232
65996b3467d7
MMX & MMX2 optimizations (MMX2 is buggy and commented out)
michael
parents:
2230
diff
changeset
|
50 |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
51 #ifdef HAVE_MMX2 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
52 #define PAVGB(a,b) "pavgb " #a ", " #b " \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
53 #elif defined (HAVE_3DNOW) |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
54 #define PAVGB(a,b) "pavgusb " #a ", " #b " \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
55 #endif |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
56 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
57 #ifdef HAVE_MMX2 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
58 #define REAL_MOVNTQ(a,b) "movntq " #a ", " #b " \n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
59 #else |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
60 #define REAL_MOVNTQ(a,b) "movq " #a ", " #b " \n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
61 #endif |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
62 #define MOVNTQ(a,b) REAL_MOVNTQ(a,b) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
63 |
12017
21e5cb258a95
AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents:
11122
diff
changeset
|
64 #ifdef HAVE_ALTIVEC |
21e5cb258a95
AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents:
11122
diff
changeset
|
65 #include "swscale_altivec_template.c" |
21e5cb258a95
AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents:
11122
diff
changeset
|
66 #endif |
21e5cb258a95
AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents:
11122
diff
changeset
|
67 |
9413 | 68 #define YSCALEYUV2YV12X(x, offset) \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
69 "xor %%"REG_a", %%"REG_a" \n\t"\ |
11122 | 70 "movq "VROUNDER_OFFSET"(%0), %%mm3\n\t"\ |
71 "movq %%mm3, %%mm4 \n\t"\ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
72 "lea " offset "(%0), %%"REG_d" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
73 "mov (%%"REG_d"), %%"REG_S" \n\t"\ |
3344 | 74 ".balign 16 \n\t" /* FIXME Unroll? */\ |
75 "1: \n\t"\ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
76 "movq 8(%%"REG_d"), %%mm0 \n\t" /* filterCoeff */\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
77 "movq " #x "(%%"REG_S", %%"REG_a", 2), %%mm2\n\t" /* srcData */\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
78 "movq 8+" #x "(%%"REG_S", %%"REG_a", 2), %%mm5\n\t" /* srcData */\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
79 "add $16, %%"REG_d" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
80 "mov (%%"REG_d"), %%"REG_S" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
81 "test %%"REG_S", %%"REG_S" \n\t"\ |
3344 | 82 "pmulhw %%mm0, %%mm2 \n\t"\ |
83 "pmulhw %%mm0, %%mm5 \n\t"\ | |
84 "paddw %%mm2, %%mm3 \n\t"\ | |
85 "paddw %%mm5, %%mm4 \n\t"\ | |
86 " jnz 1b \n\t"\ | |
87 "psraw $3, %%mm3 \n\t"\ | |
88 "psraw $3, %%mm4 \n\t"\ | |
89 "packuswb %%mm4, %%mm3 \n\t"\ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
90 MOVNTQ(%%mm3, (%1, %%REGa))\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
91 "add $8, %%"REG_a" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
92 "cmp %2, %%"REG_a" \n\t"\ |
11122 | 93 "movq "VROUNDER_OFFSET"(%0), %%mm3\n\t"\ |
94 "movq %%mm3, %%mm4 \n\t"\ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
95 "lea " offset "(%0), %%"REG_d" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
96 "mov (%%"REG_d"), %%"REG_S" \n\t"\ |
3344 | 97 "jb 1b \n\t" |
98 | |
99 #define YSCALEYUV2YV121 \ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
100 "mov %2, %%"REG_a" \n\t"\ |
3344 | 101 ".balign 16 \n\t" /* FIXME Unroll? */\ |
102 "1: \n\t"\ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
103 "movq (%0, %%"REG_a", 2), %%mm0 \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
104 "movq 8(%0, %%"REG_a", 2), %%mm1\n\t"\ |
3344 | 105 "psraw $7, %%mm0 \n\t"\ |
106 "psraw $7, %%mm1 \n\t"\ | |
107 "packuswb %%mm1, %%mm0 \n\t"\ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
108 MOVNTQ(%%mm0, (%1, %%REGa))\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
109 "add $8, %%"REG_a" \n\t"\ |
3344 | 110 "jnc 1b \n\t" |
111 | |
112 /* | |
113 :: "m" (-lumFilterSize), "m" (-chrFilterSize), | |
114 "m" (lumMmxFilter+lumFilterSize*4), "m" (chrMmxFilter+chrFilterSize*4), | |
115 "r" (dest), "m" (dstW), | |
116 "m" (lumSrc+lumFilterSize), "m" (chrSrc+chrFilterSize) | |
117 : "%eax", "%ebx", "%ecx", "%edx", "%esi" | |
118 */ | |
7723 | 119 #define YSCALEYUV2PACKEDX \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
120 "xor %%"REG_a", %%"REG_a" \n\t"\ |
3344 | 121 ".balign 16 \n\t"\ |
9413 | 122 "nop \n\t"\ |
3344 | 123 "1: \n\t"\ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
124 "lea "CHR_MMX_FILTER_OFFSET"(%0), %%"REG_d"\n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
125 "mov (%%"REG_d"), %%"REG_S" \n\t"\ |
11122 | 126 "movq "VROUNDER_OFFSET"(%0), %%mm3\n\t"\ |
127 "movq %%mm3, %%mm4 \n\t"\ | |
9413 | 128 ".balign 16 \n\t"\ |
3344 | 129 "2: \n\t"\ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
130 "movq 8(%%"REG_d"), %%mm0 \n\t" /* filterCoeff */\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
131 "movq (%%"REG_S", %%"REG_a"), %%mm2 \n\t" /* UsrcData */\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
132 "movq 4096(%%"REG_S", %%"REG_a"), %%mm5 \n\t" /* VsrcData */\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
133 "add $16, %%"REG_d" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
134 "mov (%%"REG_d"), %%"REG_S" \n\t"\ |
3344 | 135 "pmulhw %%mm0, %%mm2 \n\t"\ |
136 "pmulhw %%mm0, %%mm5 \n\t"\ | |
137 "paddw %%mm2, %%mm3 \n\t"\ | |
138 "paddw %%mm5, %%mm4 \n\t"\ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
139 "test %%"REG_S", %%"REG_S" \n\t"\ |
3344 | 140 " jnz 2b \n\t"\ |
141 \ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
142 "lea "LUM_MMX_FILTER_OFFSET"(%0), %%"REG_d"\n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
143 "mov (%%"REG_d"), %%"REG_S" \n\t"\ |
11122 | 144 "movq "VROUNDER_OFFSET"(%0), %%mm1\n\t"\ |
145 "movq %%mm1, %%mm7 \n\t"\ | |
9413 | 146 ".balign 16 \n\t"\ |
3344 | 147 "2: \n\t"\ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
148 "movq 8(%%"REG_d"), %%mm0 \n\t" /* filterCoeff */\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
149 "movq (%%"REG_S", %%"REG_a", 2), %%mm2 \n\t" /* Y1srcData */\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
150 "movq 8(%%"REG_S", %%"REG_a", 2), %%mm5 \n\t" /* Y2srcData */\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
151 "add $16, %%"REG_d" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
152 "mov (%%"REG_d"), %%"REG_S" \n\t"\ |
3344 | 153 "pmulhw %%mm0, %%mm2 \n\t"\ |
154 "pmulhw %%mm0, %%mm5 \n\t"\ | |
155 "paddw %%mm2, %%mm1 \n\t"\ | |
156 "paddw %%mm5, %%mm7 \n\t"\ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
157 "test %%"REG_S", %%"REG_S" \n\t"\ |
3344 | 158 " jnz 2b \n\t"\ |
7723 | 159 |
160 | |
161 #define YSCALEYUV2RGBX \ | |
162 YSCALEYUV2PACKEDX\ | |
9413 | 163 "psubw "U_OFFSET"(%0), %%mm3 \n\t" /* (U-128)8*/\ |
164 "psubw "V_OFFSET"(%0), %%mm4 \n\t" /* (V-128)8*/\ | |
3344 | 165 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\ |
166 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\ | |
9413 | 167 "pmulhw "UG_COEFF"(%0), %%mm3 \n\t"\ |
168 "pmulhw "VG_COEFF"(%0), %%mm4 \n\t"\ | |
3344 | 169 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\ |
9413 | 170 "pmulhw "UB_COEFF"(%0), %%mm2 \n\t"\ |
171 "pmulhw "VR_COEFF"(%0), %%mm5 \n\t"\ | |
172 "psubw "Y_OFFSET"(%0), %%mm1 \n\t" /* 8(Y-16)*/\ | |
173 "psubw "Y_OFFSET"(%0), %%mm7 \n\t" /* 8(Y-16)*/\ | |
174 "pmulhw "Y_COEFF"(%0), %%mm1 \n\t"\ | |
175 "pmulhw "Y_COEFF"(%0), %%mm7 \n\t"\ | |
3344 | 176 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\ |
177 "paddw %%mm3, %%mm4 \n\t"\ | |
178 "movq %%mm2, %%mm0 \n\t"\ | |
179 "movq %%mm5, %%mm6 \n\t"\ | |
180 "movq %%mm4, %%mm3 \n\t"\ | |
181 "punpcklwd %%mm2, %%mm2 \n\t"\ | |
182 "punpcklwd %%mm5, %%mm5 \n\t"\ | |
183 "punpcklwd %%mm4, %%mm4 \n\t"\ | |
184 "paddw %%mm1, %%mm2 \n\t"\ | |
185 "paddw %%mm1, %%mm5 \n\t"\ | |
186 "paddw %%mm1, %%mm4 \n\t"\ | |
187 "punpckhwd %%mm0, %%mm0 \n\t"\ | |
188 "punpckhwd %%mm6, %%mm6 \n\t"\ | |
189 "punpckhwd %%mm3, %%mm3 \n\t"\ | |
190 "paddw %%mm7, %%mm0 \n\t"\ | |
191 "paddw %%mm7, %%mm6 \n\t"\ | |
192 "paddw %%mm7, %%mm3 \n\t"\ | |
193 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\ | |
194 "packuswb %%mm0, %%mm2 \n\t"\ | |
195 "packuswb %%mm6, %%mm5 \n\t"\ | |
196 "packuswb %%mm3, %%mm4 \n\t"\ | |
197 "pxor %%mm7, %%mm7 \n\t" | |
9413 | 198 #if 0 |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
199 #define FULL_YSCALEYUV2RGB \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
200 "pxor %%mm7, %%mm7 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
201 "movd %6, %%mm6 \n\t" /*yalpha1*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
202 "punpcklwd %%mm6, %%mm6 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
203 "punpcklwd %%mm6, %%mm6 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
204 "movd %7, %%mm5 \n\t" /*uvalpha1*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
205 "punpcklwd %%mm5, %%mm5 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
206 "punpcklwd %%mm5, %%mm5 \n\t"\ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
207 "xor %%"REG_a", %%"REG_a" \n\t"\ |
2800
7847d6b7ad3d
.balign or we¡ll align by 64kb on some architectures
michael
parents:
2799
diff
changeset
|
208 ".balign 16 \n\t"\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
209 "1: \n\t"\ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
210 "movq (%0, %%"REG_a", 2), %%mm0 \n\t" /*buf0[eax]*/\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
211 "movq (%1, %%"REG_a", 2), %%mm1 \n\t" /*buf1[eax]*/\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
212 "movq (%2, %%"REG_a",2), %%mm2 \n\t" /* uvbuf0[eax]*/\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
213 "movq (%3, %%"REG_a",2), %%mm3 \n\t" /* uvbuf1[eax]*/\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
214 "psubw %%mm1, %%mm0 \n\t" /* buf0[eax] - buf1[eax]*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
215 "psubw %%mm3, %%mm2 \n\t" /* uvbuf0[eax] - uvbuf1[eax]*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
216 "pmulhw %%mm6, %%mm0 \n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
217 "pmulhw %%mm5, %%mm2 \n\t" /* (uvbuf0[eax] - uvbuf1[eax])uvalpha1>>16*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
218 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
219 "movq 4096(%2, %%"REG_a",2), %%mm4 \n\t" /* uvbuf0[eax+2048]*/\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
220 "psraw $4, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
221 "paddw %%mm0, %%mm1 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
222 "movq 4096(%3, %%"REG_a",2), %%mm0 \n\t" /* uvbuf1[eax+2048]*/\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
223 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax]uvalpha1 - uvbuf1[eax](1-uvalpha1)*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
224 "psubw %%mm0, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048]*/\ |
4248 | 225 "psubw "MANGLE(w80)", %%mm1 \n\t" /* 8(Y-16)*/\ |
226 "psubw "MANGLE(w400)", %%mm3 \n\t" /* 8(U-128)*/\ | |
227 "pmulhw "MANGLE(yCoeff)", %%mm1 \n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
228 \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
229 \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
230 "pmulhw %%mm5, %%mm4 \n\t" /* (uvbuf0[eax+2048] - uvbuf1[eax+2048])uvalpha1>>16*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
231 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\ |
4248 | 232 "pmulhw "MANGLE(ubCoeff)", %%mm3\n\t"\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
233 "psraw $4, %%mm0 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\ |
4248 | 234 "pmulhw "MANGLE(ugCoeff)", %%mm2\n\t"\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
235 "paddw %%mm4, %%mm0 \n\t" /* uvbuf0[eax+2048]uvalpha1 - uvbuf1[eax+2048](1-uvalpha1)*/\ |
4248 | 236 "psubw "MANGLE(w400)", %%mm0 \n\t" /* (V-128)8*/\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
237 \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
238 \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
239 "movq %%mm0, %%mm4 \n\t" /* (V-128)8*/\ |
4248 | 240 "pmulhw "MANGLE(vrCoeff)", %%mm0\n\t"\ |
241 "pmulhw "MANGLE(vgCoeff)", %%mm4\n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
242 "paddw %%mm1, %%mm3 \n\t" /* B*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
243 "paddw %%mm1, %%mm0 \n\t" /* R*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
244 "packuswb %%mm3, %%mm3 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
245 \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
246 "packuswb %%mm0, %%mm0 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
247 "paddw %%mm4, %%mm2 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
248 "paddw %%mm2, %%mm1 \n\t" /* G*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
249 \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
250 "packuswb %%mm1, %%mm1 \n\t" |
9413 | 251 #endif |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
252 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
253 #define REAL_YSCALEYUV2PACKED(index, c) \ |
9414 | 254 "movq "CHR_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t"\ |
255 "movq "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm1\n\t"\ | |
256 "psraw $3, %%mm0 \n\t"\ | |
257 "psraw $3, %%mm1 \n\t"\ | |
258 "movq %%mm0, "CHR_MMX_FILTER_OFFSET"+8("#c")\n\t"\ | |
259 "movq %%mm1, "LUM_MMX_FILTER_OFFSET"+8("#c")\n\t"\ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
260 "xor "#index", "#index" \n\t"\ |
7723 | 261 ".balign 16 \n\t"\ |
262 "1: \n\t"\ | |
9414 | 263 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\ |
264 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\ | |
265 "movq 4096(%2, "#index"), %%mm5 \n\t" /* uvbuf0[eax+2048]*/\ | |
266 "movq 4096(%3, "#index"), %%mm4 \n\t" /* uvbuf1[eax+2048]*/\ | |
7723 | 267 "psubw %%mm3, %%mm2 \n\t" /* uvbuf0[eax] - uvbuf1[eax]*/\ |
268 "psubw %%mm4, %%mm5 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048]*/\ | |
9414 | 269 "movq "CHR_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t"\ |
7723 | 270 "pmulhw %%mm0, %%mm2 \n\t" /* (uvbuf0[eax] - uvbuf1[eax])uvalpha1>>16*/\ |
271 "pmulhw %%mm0, %%mm5 \n\t" /* (uvbuf0[eax+2048] - uvbuf1[eax+2048])uvalpha1>>16*/\ | |
272 "psraw $7, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\ | |
273 "psraw $7, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\ | |
274 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax]uvalpha1 - uvbuf1[eax](1-uvalpha1)*/\ | |
275 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048]uvalpha1 - uvbuf1[eax+2048](1-uvalpha1)*/\ | |
9414 | 276 "movq (%0, "#index", 2), %%mm0 \n\t" /*buf0[eax]*/\ |
277 "movq (%1, "#index", 2), %%mm1 \n\t" /*buf1[eax]*/\ | |
278 "movq 8(%0, "#index", 2), %%mm6 \n\t" /*buf0[eax]*/\ | |
279 "movq 8(%1, "#index", 2), %%mm7 \n\t" /*buf1[eax]*/\ | |
7723 | 280 "psubw %%mm1, %%mm0 \n\t" /* buf0[eax] - buf1[eax]*/\ |
281 "psubw %%mm7, %%mm6 \n\t" /* buf0[eax] - buf1[eax]*/\ | |
9414 | 282 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\ |
283 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm6\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\ | |
7723 | 284 "psraw $7, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\ |
285 "psraw $7, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\ | |
286 "paddw %%mm0, %%mm1 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\ | |
287 "paddw %%mm6, %%mm7 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\ | |
288 | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
289 #define YSCALEYUV2PACKED(index, c) REAL_YSCALEYUV2PACKED(index, c) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
290 |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
291 #define REAL_YSCALEYUV2RGB(index, c) \ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
292 "xor "#index", "#index" \n\t"\ |
2800
7847d6b7ad3d
.balign or we¡ll align by 64kb on some architectures
michael
parents:
2799
diff
changeset
|
293 ".balign 16 \n\t"\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
294 "1: \n\t"\ |
9414 | 295 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\ |
296 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\ | |
297 "movq 4096(%2, "#index"), %%mm5\n\t" /* uvbuf0[eax+2048]*/\ | |
298 "movq 4096(%3, "#index"), %%mm4\n\t" /* uvbuf1[eax+2048]*/\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
299 "psubw %%mm3, %%mm2 \n\t" /* uvbuf0[eax] - uvbuf1[eax]*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
300 "psubw %%mm4, %%mm5 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048]*/\ |
9414 | 301 "movq "CHR_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t"\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
302 "pmulhw %%mm0, %%mm2 \n\t" /* (uvbuf0[eax] - uvbuf1[eax])uvalpha1>>16*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
303 "pmulhw %%mm0, %%mm5 \n\t" /* (uvbuf0[eax+2048] - uvbuf1[eax+2048])uvalpha1>>16*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
304 "psraw $4, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
305 "psraw $4, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
306 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax]uvalpha1 - uvbuf1[eax](1-uvalpha1)*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
307 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048]uvalpha1 - uvbuf1[eax+2048](1-uvalpha1)*/\ |
9414 | 308 "psubw "U_OFFSET"("#c"), %%mm3 \n\t" /* (U-128)8*/\ |
309 "psubw "V_OFFSET"("#c"), %%mm4 \n\t" /* (V-128)8*/\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
310 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
311 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\ |
9414 | 312 "pmulhw "UG_COEFF"("#c"), %%mm3\n\t"\ |
313 "pmulhw "VG_COEFF"("#c"), %%mm4\n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
314 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\ |
9414 | 315 "movq (%0, "#index", 2), %%mm0 \n\t" /*buf0[eax]*/\ |
316 "movq (%1, "#index", 2), %%mm1 \n\t" /*buf1[eax]*/\ | |
317 "movq 8(%0, "#index", 2), %%mm6\n\t" /*buf0[eax]*/\ | |
318 "movq 8(%1, "#index", 2), %%mm7\n\t" /*buf1[eax]*/\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
319 "psubw %%mm1, %%mm0 \n\t" /* buf0[eax] - buf1[eax]*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
320 "psubw %%mm7, %%mm6 \n\t" /* buf0[eax] - buf1[eax]*/\ |
9414 | 321 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm0\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\ |
322 "pmulhw "LUM_MMX_FILTER_OFFSET"+8("#c"), %%mm6\n\t" /* (buf0[eax] - buf1[eax])yalpha1>>16*/\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
323 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
324 "psraw $4, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
325 "paddw %%mm0, %%mm1 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
326 "paddw %%mm6, %%mm7 \n\t" /* buf0[eax]yalpha1 + buf1[eax](1-yalpha1) >>16*/\ |
9414 | 327 "pmulhw "UB_COEFF"("#c"), %%mm2\n\t"\ |
328 "pmulhw "VR_COEFF"("#c"), %%mm5\n\t"\ | |
329 "psubw "Y_OFFSET"("#c"), %%mm1 \n\t" /* 8(Y-16)*/\ | |
330 "psubw "Y_OFFSET"("#c"), %%mm7 \n\t" /* 8(Y-16)*/\ | |
331 "pmulhw "Y_COEFF"("#c"), %%mm1 \n\t"\ | |
332 "pmulhw "Y_COEFF"("#c"), %%mm7 \n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
333 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
334 "paddw %%mm3, %%mm4 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
335 "movq %%mm2, %%mm0 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
336 "movq %%mm5, %%mm6 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
337 "movq %%mm4, %%mm3 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
338 "punpcklwd %%mm2, %%mm2 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
339 "punpcklwd %%mm5, %%mm5 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
340 "punpcklwd %%mm4, %%mm4 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
341 "paddw %%mm1, %%mm2 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
342 "paddw %%mm1, %%mm5 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
343 "paddw %%mm1, %%mm4 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
344 "punpckhwd %%mm0, %%mm0 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
345 "punpckhwd %%mm6, %%mm6 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
346 "punpckhwd %%mm3, %%mm3 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
347 "paddw %%mm7, %%mm0 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
348 "paddw %%mm7, %%mm6 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
349 "paddw %%mm7, %%mm3 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
350 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
351 "packuswb %%mm0, %%mm2 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
352 "packuswb %%mm6, %%mm5 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
353 "packuswb %%mm3, %%mm4 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
354 "pxor %%mm7, %%mm7 \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
355 #define YSCALEYUV2RGB(index, c) REAL_YSCALEYUV2RGB(index, c) |
7723 | 356 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
357 #define REAL_YSCALEYUV2PACKED1(index, c) \ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
358 "xor "#index", "#index" \n\t"\ |
7723 | 359 ".balign 16 \n\t"\ |
360 "1: \n\t"\ | |
9417 | 361 "movq (%2, "#index"), %%mm3 \n\t" /* uvbuf0[eax]*/\ |
362 "movq 4096(%2, "#index"), %%mm4 \n\t" /* uvbuf0[eax+2048]*/\ | |
7723 | 363 "psraw $7, %%mm3 \n\t" \ |
364 "psraw $7, %%mm4 \n\t" \ | |
9417 | 365 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\ |
366 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\ | |
7723 | 367 "psraw $7, %%mm1 \n\t" \ |
368 "psraw $7, %%mm7 \n\t" \ | |
369 | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
370 #define YSCALEYUV2PACKED1(index, c) REAL_YSCALEYUV2PACKED1(index, c) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
371 |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
372 #define REAL_YSCALEYUV2RGB1(index, c) \ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
373 "xor "#index", "#index" \n\t"\ |
2800
7847d6b7ad3d
.balign or we¡ll align by 64kb on some architectures
michael
parents:
2799
diff
changeset
|
374 ".balign 16 \n\t"\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
375 "1: \n\t"\ |
9417 | 376 "movq (%2, "#index"), %%mm3 \n\t" /* uvbuf0[eax]*/\ |
377 "movq 4096(%2, "#index"), %%mm4 \n\t" /* uvbuf0[eax+2048]*/\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
378 "psraw $4, %%mm3 \n\t" /* uvbuf0[eax] - uvbuf1[eax] >>4*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
379 "psraw $4, %%mm4 \n\t" /* uvbuf0[eax+2048] - uvbuf1[eax+2048] >>4*/\ |
9417 | 380 "psubw "U_OFFSET"("#c"), %%mm3 \n\t" /* (U-128)8*/\ |
381 "psubw "V_OFFSET"("#c"), %%mm4 \n\t" /* (V-128)8*/\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
382 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
383 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\ |
9417 | 384 "pmulhw "UG_COEFF"("#c"), %%mm3\n\t"\ |
385 "pmulhw "VG_COEFF"("#c"), %%mm4\n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
386 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\ |
9417 | 387 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\ |
388 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\ | |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
389 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
390 "psraw $4, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\ |
9417 | 391 "pmulhw "UB_COEFF"("#c"), %%mm2\n\t"\ |
392 "pmulhw "VR_COEFF"("#c"), %%mm5\n\t"\ | |
393 "psubw "Y_OFFSET"("#c"), %%mm1 \n\t" /* 8(Y-16)*/\ | |
394 "psubw "Y_OFFSET"("#c"), %%mm7 \n\t" /* 8(Y-16)*/\ | |
395 "pmulhw "Y_COEFF"("#c"), %%mm1 \n\t"\ | |
396 "pmulhw "Y_COEFF"("#c"), %%mm7 \n\t"\ | |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
397 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
398 "paddw %%mm3, %%mm4 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
399 "movq %%mm2, %%mm0 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
400 "movq %%mm5, %%mm6 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
401 "movq %%mm4, %%mm3 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
402 "punpcklwd %%mm2, %%mm2 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
403 "punpcklwd %%mm5, %%mm5 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
404 "punpcklwd %%mm4, %%mm4 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
405 "paddw %%mm1, %%mm2 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
406 "paddw %%mm1, %%mm5 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
407 "paddw %%mm1, %%mm4 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
408 "punpckhwd %%mm0, %%mm0 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
409 "punpckhwd %%mm6, %%mm6 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
410 "punpckhwd %%mm3, %%mm3 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
411 "paddw %%mm7, %%mm0 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
412 "paddw %%mm7, %%mm6 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
413 "paddw %%mm7, %%mm3 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
414 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
415 "packuswb %%mm0, %%mm2 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
416 "packuswb %%mm6, %%mm5 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
417 "packuswb %%mm3, %%mm4 \n\t"\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
418 "pxor %%mm7, %%mm7 \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
419 #define YSCALEYUV2RGB1(index, c) REAL_YSCALEYUV2RGB1(index, c) |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
420 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
421 #define REAL_YSCALEYUV2PACKED1b(index, c) \ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
422 "xor "#index", "#index" \n\t"\ |
7723 | 423 ".balign 16 \n\t"\ |
424 "1: \n\t"\ | |
9417 | 425 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\ |
426 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\ | |
427 "movq 4096(%2, "#index"), %%mm5 \n\t" /* uvbuf0[eax+2048]*/\ | |
428 "movq 4096(%3, "#index"), %%mm4 \n\t" /* uvbuf1[eax+2048]*/\ | |
7723 | 429 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax] + uvbuf1[eax]*/\ |
430 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048] + uvbuf1[eax+2048]*/\ | |
431 "psrlw $8, %%mm3 \n\t" \ | |
432 "psrlw $8, %%mm4 \n\t" \ | |
9417 | 433 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\ |
434 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\ | |
7723 | 435 "psraw $7, %%mm1 \n\t" \ |
436 "psraw $7, %%mm7 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
437 #define YSCALEYUV2PACKED1b(index, c) REAL_YSCALEYUV2PACKED1b(index, c) |
7723 | 438 |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
439 // do vertical chrominance interpolation |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
440 #define REAL_YSCALEYUV2RGB1b(index, c) \ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
441 "xor "#index", "#index" \n\t"\ |
2800
7847d6b7ad3d
.balign or we¡ll align by 64kb on some architectures
michael
parents:
2799
diff
changeset
|
442 ".balign 16 \n\t"\ |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
443 "1: \n\t"\ |
9417 | 444 "movq (%2, "#index"), %%mm2 \n\t" /* uvbuf0[eax]*/\ |
445 "movq (%3, "#index"), %%mm3 \n\t" /* uvbuf1[eax]*/\ | |
446 "movq 4096(%2, "#index"), %%mm5 \n\t" /* uvbuf0[eax+2048]*/\ | |
447 "movq 4096(%3, "#index"), %%mm4 \n\t" /* uvbuf1[eax+2048]*/\ | |
2576 | 448 "paddw %%mm2, %%mm3 \n\t" /* uvbuf0[eax] + uvbuf1[eax]*/\ |
449 "paddw %%mm5, %%mm4 \n\t" /* uvbuf0[eax+2048] + uvbuf1[eax+2048]*/\ | |
3344 | 450 "psrlw $5, %%mm3 \n\t" /*FIXME might overflow*/\ |
451 "psrlw $5, %%mm4 \n\t" /*FIXME might overflow*/\ | |
9417 | 452 "psubw "U_OFFSET"("#c"), %%mm3 \n\t" /* (U-128)8*/\ |
453 "psubw "V_OFFSET"("#c"), %%mm4 \n\t" /* (V-128)8*/\ | |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
454 "movq %%mm3, %%mm2 \n\t" /* (U-128)8*/\ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
455 "movq %%mm4, %%mm5 \n\t" /* (V-128)8*/\ |
9417 | 456 "pmulhw "UG_COEFF"("#c"), %%mm3\n\t"\ |
457 "pmulhw "VG_COEFF"("#c"), %%mm4\n\t"\ | |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
458 /* mm2=(U-128)8, mm3=ug, mm4=vg mm5=(V-128)8 */\ |
9417 | 459 "movq (%0, "#index", 2), %%mm1 \n\t" /*buf0[eax]*/\ |
460 "movq 8(%0, "#index", 2), %%mm7 \n\t" /*buf0[eax]*/\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
461 "psraw $4, %%mm1 \n\t" /* buf0[eax] - buf1[eax] >>4*/\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
462 "psraw $4, %%mm7 \n\t" /* buf0[eax] - buf1[eax] >>4*/\ |
9417 | 463 "pmulhw "UB_COEFF"("#c"), %%mm2\n\t"\ |
464 "pmulhw "VR_COEFF"("#c"), %%mm5\n\t"\ | |
465 "psubw "Y_OFFSET"("#c"), %%mm1 \n\t" /* 8(Y-16)*/\ | |
466 "psubw "Y_OFFSET"("#c"), %%mm7 \n\t" /* 8(Y-16)*/\ | |
467 "pmulhw "Y_COEFF"("#c"), %%mm1 \n\t"\ | |
468 "pmulhw "Y_COEFF"("#c"), %%mm7 \n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
469 /* mm1= Y1, mm2=ub, mm3=ug, mm4=vg mm5=vr, mm7=Y2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
470 "paddw %%mm3, %%mm4 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
471 "movq %%mm2, %%mm0 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
472 "movq %%mm5, %%mm6 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
473 "movq %%mm4, %%mm3 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
474 "punpcklwd %%mm2, %%mm2 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
475 "punpcklwd %%mm5, %%mm5 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
476 "punpcklwd %%mm4, %%mm4 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
477 "paddw %%mm1, %%mm2 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
478 "paddw %%mm1, %%mm5 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
479 "paddw %%mm1, %%mm4 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
480 "punpckhwd %%mm0, %%mm0 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
481 "punpckhwd %%mm6, %%mm6 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
482 "punpckhwd %%mm3, %%mm3 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
483 "paddw %%mm7, %%mm0 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
484 "paddw %%mm7, %%mm6 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
485 "paddw %%mm7, %%mm3 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
486 /* mm0=B1, mm2=B2, mm3=G2, mm4=G1, mm5=R1, mm6=R2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
487 "packuswb %%mm0, %%mm2 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
488 "packuswb %%mm6, %%mm5 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
489 "packuswb %%mm3, %%mm4 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
490 "pxor %%mm7, %%mm7 \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
491 #define YSCALEYUV2RGB1b(index, c) REAL_YSCALEYUV2RGB1b(index, c) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
492 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
493 #define REAL_WRITEBGR32(dst, dstw, index) \ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
494 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
495 "movq %%mm2, %%mm1 \n\t" /* B */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
496 "movq %%mm5, %%mm6 \n\t" /* R */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
497 "punpcklbw %%mm4, %%mm2 \n\t" /* GBGBGBGB 0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
498 "punpcklbw %%mm7, %%mm5 \n\t" /* 0R0R0R0R 0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
499 "punpckhbw %%mm4, %%mm1 \n\t" /* GBGBGBGB 2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
500 "punpckhbw %%mm7, %%mm6 \n\t" /* 0R0R0R0R 2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
501 "movq %%mm2, %%mm0 \n\t" /* GBGBGBGB 0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
502 "movq %%mm1, %%mm3 \n\t" /* GBGBGBGB 2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
503 "punpcklwd %%mm5, %%mm0 \n\t" /* 0RGB0RGB 0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
504 "punpckhwd %%mm5, %%mm2 \n\t" /* 0RGB0RGB 1 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
505 "punpcklwd %%mm6, %%mm1 \n\t" /* 0RGB0RGB 2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
506 "punpckhwd %%mm6, %%mm3 \n\t" /* 0RGB0RGB 3 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
507 \ |
9414 | 508 MOVNTQ(%%mm0, (dst, index, 4))\ |
509 MOVNTQ(%%mm2, 8(dst, index, 4))\ | |
510 MOVNTQ(%%mm1, 16(dst, index, 4))\ | |
511 MOVNTQ(%%mm3, 24(dst, index, 4))\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
512 \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
513 "add $8, "#index" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
514 "cmp "#dstw", "#index" \n\t"\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
515 " jb 1b \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
516 #define WRITEBGR32(dst, dstw, index) REAL_WRITEBGR32(dst, dstw, index) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
517 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
518 #define REAL_WRITEBGR16(dst, dstw, index) \ |
4248 | 519 "pand "MANGLE(bF8)", %%mm2 \n\t" /* B */\ |
520 "pand "MANGLE(bFC)", %%mm4 \n\t" /* G */\ | |
521 "pand "MANGLE(bF8)", %%mm5 \n\t" /* R */\ | |
2669 | 522 "psrlq $3, %%mm2 \n\t"\ |
523 \ | |
524 "movq %%mm2, %%mm1 \n\t"\ | |
525 "movq %%mm4, %%mm3 \n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
526 \ |
2669 | 527 "punpcklbw %%mm7, %%mm3 \n\t"\ |
528 "punpcklbw %%mm5, %%mm2 \n\t"\ | |
529 "punpckhbw %%mm7, %%mm4 \n\t"\ | |
530 "punpckhbw %%mm5, %%mm1 \n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
531 \ |
2669 | 532 "psllq $3, %%mm3 \n\t"\ |
533 "psllq $3, %%mm4 \n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
534 \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
535 "por %%mm3, %%mm2 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
536 "por %%mm4, %%mm1 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
537 \ |
9414 | 538 MOVNTQ(%%mm2, (dst, index, 2))\ |
539 MOVNTQ(%%mm1, 8(dst, index, 2))\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
540 \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
541 "add $8, "#index" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
542 "cmp "#dstw", "#index" \n\t"\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
543 " jb 1b \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
544 #define WRITEBGR16(dst, dstw, index) REAL_WRITEBGR16(dst, dstw, index) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
545 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
546 #define REAL_WRITEBGR15(dst, dstw, index) \ |
4248 | 547 "pand "MANGLE(bF8)", %%mm2 \n\t" /* B */\ |
548 "pand "MANGLE(bF8)", %%mm4 \n\t" /* G */\ | |
549 "pand "MANGLE(bF8)", %%mm5 \n\t" /* R */\ | |
2669 | 550 "psrlq $3, %%mm2 \n\t"\ |
551 "psrlq $1, %%mm5 \n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
552 \ |
2669 | 553 "movq %%mm2, %%mm1 \n\t"\ |
554 "movq %%mm4, %%mm3 \n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
555 \ |
2669 | 556 "punpcklbw %%mm7, %%mm3 \n\t"\ |
557 "punpcklbw %%mm5, %%mm2 \n\t"\ | |
558 "punpckhbw %%mm7, %%mm4 \n\t"\ | |
559 "punpckhbw %%mm5, %%mm1 \n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
560 \ |
2669 | 561 "psllq $2, %%mm3 \n\t"\ |
562 "psllq $2, %%mm4 \n\t"\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
563 \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
564 "por %%mm3, %%mm2 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
565 "por %%mm4, %%mm1 \n\t"\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
566 \ |
9414 | 567 MOVNTQ(%%mm2, (dst, index, 2))\ |
568 MOVNTQ(%%mm1, 8(dst, index, 2))\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
569 \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
570 "add $8, "#index" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
571 "cmp "#dstw", "#index" \n\t"\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
572 " jb 1b \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
573 #define WRITEBGR15(dst, dstw, index) REAL_WRITEBGR15(dst, dstw, index) |
2669 | 574 |
9414 | 575 #define WRITEBGR24OLD(dst, dstw, index) \ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
576 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
577 "movq %%mm2, %%mm1 \n\t" /* B */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
578 "movq %%mm5, %%mm6 \n\t" /* R */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
579 "punpcklbw %%mm4, %%mm2 \n\t" /* GBGBGBGB 0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
580 "punpcklbw %%mm7, %%mm5 \n\t" /* 0R0R0R0R 0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
581 "punpckhbw %%mm4, %%mm1 \n\t" /* GBGBGBGB 2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
582 "punpckhbw %%mm7, %%mm6 \n\t" /* 0R0R0R0R 2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
583 "movq %%mm2, %%mm0 \n\t" /* GBGBGBGB 0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
584 "movq %%mm1, %%mm3 \n\t" /* GBGBGBGB 2 */\ |
2326 | 585 "punpcklwd %%mm5, %%mm0 \n\t" /* 0RGB0RGB 0 */\ |
586 "punpckhwd %%mm5, %%mm2 \n\t" /* 0RGB0RGB 1 */\ | |
587 "punpcklwd %%mm6, %%mm1 \n\t" /* 0RGB0RGB 2 */\ | |
588 "punpckhwd %%mm6, %%mm3 \n\t" /* 0RGB0RGB 3 */\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
589 \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
590 "movq %%mm0, %%mm4 \n\t" /* 0RGB0RGB 0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
591 "psrlq $8, %%mm0 \n\t" /* 00RGB0RG 0 */\ |
4248 | 592 "pand "MANGLE(bm00000111)", %%mm4\n\t" /* 00000RGB 0 */\ |
593 "pand "MANGLE(bm11111000)", %%mm0\n\t" /* 00RGB000 0.5 */\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
594 "por %%mm4, %%mm0 \n\t" /* 00RGBRGB 0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
595 "movq %%mm2, %%mm4 \n\t" /* 0RGB0RGB 1 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
596 "psllq $48, %%mm2 \n\t" /* GB000000 1 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
597 "por %%mm2, %%mm0 \n\t" /* GBRGBRGB 0 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
598 \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
599 "movq %%mm4, %%mm2 \n\t" /* 0RGB0RGB 1 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
600 "psrld $16, %%mm4 \n\t" /* 000R000R 1 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
601 "psrlq $24, %%mm2 \n\t" /* 0000RGB0 1.5 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
602 "por %%mm4, %%mm2 \n\t" /* 000RRGBR 1 */\ |
4248 | 603 "pand "MANGLE(bm00001111)", %%mm2\n\t" /* 0000RGBR 1 */\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
604 "movq %%mm1, %%mm4 \n\t" /* 0RGB0RGB 2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
605 "psrlq $8, %%mm1 \n\t" /* 00RGB0RG 2 */\ |
4248 | 606 "pand "MANGLE(bm00000111)", %%mm4\n\t" /* 00000RGB 2 */\ |
607 "pand "MANGLE(bm11111000)", %%mm1\n\t" /* 00RGB000 2.5 */\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
608 "por %%mm4, %%mm1 \n\t" /* 00RGBRGB 2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
609 "movq %%mm1, %%mm4 \n\t" /* 00RGBRGB 2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
610 "psllq $32, %%mm1 \n\t" /* BRGB0000 2 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
611 "por %%mm1, %%mm2 \n\t" /* BRGBRGBR 1 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
612 \ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
613 "psrlq $32, %%mm4 \n\t" /* 000000RG 2.5 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
614 "movq %%mm3, %%mm5 \n\t" /* 0RGB0RGB 3 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
615 "psrlq $8, %%mm3 \n\t" /* 00RGB0RG 3 */\ |
4248 | 616 "pand "MANGLE(bm00000111)", %%mm5\n\t" /* 00000RGB 3 */\ |
617 "pand "MANGLE(bm11111000)", %%mm3\n\t" /* 00RGB000 3.5 */\ | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
618 "por %%mm5, %%mm3 \n\t" /* 00RGBRGB 3 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
619 "psllq $16, %%mm3 \n\t" /* RGBRGB00 3 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
620 "por %%mm4, %%mm3 \n\t" /* RGBRGBRG 2.5 */\ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
621 \ |
9414 | 622 MOVNTQ(%%mm0, (dst))\ |
623 MOVNTQ(%%mm2, 8(dst))\ | |
624 MOVNTQ(%%mm3, 16(dst))\ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
625 "add $24, "#dst" \n\t"\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
626 \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
627 "add $8, "#index" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
628 "cmp "#dstw", "#index" \n\t"\ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
629 " jb 1b \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
630 |
9414 | 631 #define WRITEBGR24MMX(dst, dstw, index) \ |
2730 | 632 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\ |
633 "movq %%mm2, %%mm1 \n\t" /* B */\ | |
634 "movq %%mm5, %%mm6 \n\t" /* R */\ | |
635 "punpcklbw %%mm4, %%mm2 \n\t" /* GBGBGBGB 0 */\ | |
636 "punpcklbw %%mm7, %%mm5 \n\t" /* 0R0R0R0R 0 */\ | |
637 "punpckhbw %%mm4, %%mm1 \n\t" /* GBGBGBGB 2 */\ | |
638 "punpckhbw %%mm7, %%mm6 \n\t" /* 0R0R0R0R 2 */\ | |
639 "movq %%mm2, %%mm0 \n\t" /* GBGBGBGB 0 */\ | |
640 "movq %%mm1, %%mm3 \n\t" /* GBGBGBGB 2 */\ | |
641 "punpcklwd %%mm5, %%mm0 \n\t" /* 0RGB0RGB 0 */\ | |
642 "punpckhwd %%mm5, %%mm2 \n\t" /* 0RGB0RGB 1 */\ | |
643 "punpcklwd %%mm6, %%mm1 \n\t" /* 0RGB0RGB 2 */\ | |
644 "punpckhwd %%mm6, %%mm3 \n\t" /* 0RGB0RGB 3 */\ | |
645 \ | |
646 "movq %%mm0, %%mm4 \n\t" /* 0RGB0RGB 0 */\ | |
647 "movq %%mm2, %%mm6 \n\t" /* 0RGB0RGB 1 */\ | |
648 "movq %%mm1, %%mm5 \n\t" /* 0RGB0RGB 2 */\ | |
649 "movq %%mm3, %%mm7 \n\t" /* 0RGB0RGB 3 */\ | |
650 \ | |
651 "psllq $40, %%mm0 \n\t" /* RGB00000 0 */\ | |
652 "psllq $40, %%mm2 \n\t" /* RGB00000 1 */\ | |
653 "psllq $40, %%mm1 \n\t" /* RGB00000 2 */\ | |
654 "psllq $40, %%mm3 \n\t" /* RGB00000 3 */\ | |
655 \ | |
656 "punpckhdq %%mm4, %%mm0 \n\t" /* 0RGBRGB0 0 */\ | |
657 "punpckhdq %%mm6, %%mm2 \n\t" /* 0RGBRGB0 1 */\ | |
658 "punpckhdq %%mm5, %%mm1 \n\t" /* 0RGBRGB0 2 */\ | |
659 "punpckhdq %%mm7, %%mm3 \n\t" /* 0RGBRGB0 3 */\ | |
660 \ | |
661 "psrlq $8, %%mm0 \n\t" /* 00RGBRGB 0 */\ | |
662 "movq %%mm2, %%mm6 \n\t" /* 0RGBRGB0 1 */\ | |
663 "psllq $40, %%mm2 \n\t" /* GB000000 1 */\ | |
664 "por %%mm2, %%mm0 \n\t" /* GBRGBRGB 0 */\ | |
9414 | 665 MOVNTQ(%%mm0, (dst))\ |
2730 | 666 \ |
667 "psrlq $24, %%mm6 \n\t" /* 0000RGBR 1 */\ | |
668 "movq %%mm1, %%mm5 \n\t" /* 0RGBRGB0 2 */\ | |
669 "psllq $24, %%mm1 \n\t" /* BRGB0000 2 */\ | |
670 "por %%mm1, %%mm6 \n\t" /* BRGBRGBR 1 */\ | |
9414 | 671 MOVNTQ(%%mm6, 8(dst))\ |
2730 | 672 \ |
673 "psrlq $40, %%mm5 \n\t" /* 000000RG 2 */\ | |
674 "psllq $8, %%mm3 \n\t" /* RGBRGB00 3 */\ | |
675 "por %%mm3, %%mm5 \n\t" /* RGBRGBRG 2 */\ | |
9414 | 676 MOVNTQ(%%mm5, 16(dst))\ |
2730 | 677 \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
678 "add $24, "#dst" \n\t"\ |
2730 | 679 \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
680 "add $8, "#index" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
681 "cmp "#dstw", "#index" \n\t"\ |
2730 | 682 " jb 1b \n\t" |
683 | |
9414 | 684 #define WRITEBGR24MMX2(dst, dstw, index) \ |
2730 | 685 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\ |
4248 | 686 "movq "MANGLE(M24A)", %%mm0 \n\t"\ |
687 "movq "MANGLE(M24C)", %%mm7 \n\t"\ | |
2730 | 688 "pshufw $0x50, %%mm2, %%mm1 \n\t" /* B3 B2 B3 B2 B1 B0 B1 B0 */\ |
689 "pshufw $0x50, %%mm4, %%mm3 \n\t" /* G3 G2 G3 G2 G1 G0 G1 G0 */\ | |
690 "pshufw $0x00, %%mm5, %%mm6 \n\t" /* R1 R0 R1 R0 R1 R0 R1 R0 */\ | |
691 \ | |
692 "pand %%mm0, %%mm1 \n\t" /* B2 B1 B0 */\ | |
693 "pand %%mm0, %%mm3 \n\t" /* G2 G1 G0 */\ | |
694 "pand %%mm7, %%mm6 \n\t" /* R1 R0 */\ | |
695 \ | |
696 "psllq $8, %%mm3 \n\t" /* G2 G1 G0 */\ | |
697 "por %%mm1, %%mm6 \n\t"\ | |
698 "por %%mm3, %%mm6 \n\t"\ | |
9414 | 699 MOVNTQ(%%mm6, (dst))\ |
2730 | 700 \ |
701 "psrlq $8, %%mm4 \n\t" /* 00 G7 G6 G5 G4 G3 G2 G1 */\ | |
702 "pshufw $0xA5, %%mm2, %%mm1 \n\t" /* B5 B4 B5 B4 B3 B2 B3 B2 */\ | |
703 "pshufw $0x55, %%mm4, %%mm3 \n\t" /* G4 G3 G4 G3 G4 G3 G4 G3 */\ | |
704 "pshufw $0xA5, %%mm5, %%mm6 \n\t" /* R5 R4 R5 R4 R3 R2 R3 R2 */\ | |
705 \ | |
4248 | 706 "pand "MANGLE(M24B)", %%mm1 \n\t" /* B5 B4 B3 */\ |
2730 | 707 "pand %%mm7, %%mm3 \n\t" /* G4 G3 */\ |
708 "pand %%mm0, %%mm6 \n\t" /* R4 R3 R2 */\ | |
709 \ | |
710 "por %%mm1, %%mm3 \n\t" /* B5 G4 B4 G3 B3 */\ | |
711 "por %%mm3, %%mm6 \n\t"\ | |
9414 | 712 MOVNTQ(%%mm6, 8(dst))\ |
2730 | 713 \ |
714 "pshufw $0xFF, %%mm2, %%mm1 \n\t" /* B7 B6 B7 B6 B7 B6 B6 B7 */\ | |
715 "pshufw $0xFA, %%mm4, %%mm3 \n\t" /* 00 G7 00 G7 G6 G5 G6 G5 */\ | |
716 "pshufw $0xFA, %%mm5, %%mm6 \n\t" /* R7 R6 R7 R6 R5 R4 R5 R4 */\ | |
717 \ | |
718 "pand %%mm7, %%mm1 \n\t" /* B7 B6 */\ | |
719 "pand %%mm0, %%mm3 \n\t" /* G7 G6 G5 */\ | |
4248 | 720 "pand "MANGLE(M24B)", %%mm6 \n\t" /* R7 R6 R5 */\ |
2730 | 721 \ |
722 "por %%mm1, %%mm3 \n\t"\ | |
723 "por %%mm3, %%mm6 \n\t"\ | |
9414 | 724 MOVNTQ(%%mm6, 16(dst))\ |
2730 | 725 \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
726 "add $24, "#dst" \n\t"\ |
2730 | 727 \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
728 "add $8, "#index" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
729 "cmp "#dstw", "#index" \n\t"\ |
2730 | 730 " jb 1b \n\t" |
731 | |
732 #ifdef HAVE_MMX2 | |
3126 | 733 #undef WRITEBGR24 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
734 #define WRITEBGR24(dst, dstw, index) WRITEBGR24MMX2(dst, dstw, index) |
2730 | 735 #else |
3126 | 736 #undef WRITEBGR24 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
737 #define WRITEBGR24(dst, dstw, index) WRITEBGR24MMX(dst, dstw, index) |
2730 | 738 #endif |
739 | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
740 #define REAL_WRITEYUY2(dst, dstw, index) \ |
7723 | 741 "packuswb %%mm3, %%mm3 \n\t"\ |
742 "packuswb %%mm4, %%mm4 \n\t"\ | |
743 "packuswb %%mm7, %%mm1 \n\t"\ | |
744 "punpcklbw %%mm4, %%mm3 \n\t"\ | |
745 "movq %%mm1, %%mm7 \n\t"\ | |
746 "punpcklbw %%mm3, %%mm1 \n\t"\ | |
747 "punpckhbw %%mm3, %%mm7 \n\t"\ | |
748 \ | |
9414 | 749 MOVNTQ(%%mm1, (dst, index, 2))\ |
750 MOVNTQ(%%mm7, 8(dst, index, 2))\ | |
7723 | 751 \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
752 "add $8, "#index" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
753 "cmp "#dstw", "#index" \n\t"\ |
7723 | 754 " jb 1b \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
755 #define WRITEYUY2(dst, dstw, index) REAL_WRITEYUY2(dst, dstw, index) |
7723 | 756 |
757 | |
9413 | 758 static inline void RENAME(yuv2yuvX)(SwsContext *c, int16_t *lumFilter, int16_t **lumSrc, int lumFilterSize, |
3344 | 759 int16_t *chrFilter, int16_t **chrSrc, int chrFilterSize, |
9414 | 760 uint8_t *dest, uint8_t *uDest, uint8_t *vDest, int dstW, int chrDstW) |
2519 | 761 { |
3344 | 762 #ifdef HAVE_MMX |
763 if(uDest != NULL) | |
764 { | |
765 asm volatile( | |
9413 | 766 YSCALEYUV2YV12X(0, CHR_MMX_FILTER_OFFSET) |
767 :: "r" (&c->redDither), | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
768 "r" (uDest), "m" ((long)chrDstW) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
769 : "%"REG_a, "%"REG_d, "%"REG_S |
3344 | 770 ); |
2519 | 771 |
3344 | 772 asm volatile( |
9413 | 773 YSCALEYUV2YV12X(4096, CHR_MMX_FILTER_OFFSET) |
774 :: "r" (&c->redDither), | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
775 "r" (vDest), "m" ((long)chrDstW) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
776 : "%"REG_a, "%"REG_d, "%"REG_S |
3344 | 777 ); |
778 } | |
2521 | 779 |
3344 | 780 asm volatile( |
9413 | 781 YSCALEYUV2YV12X(0, LUM_MMX_FILTER_OFFSET) |
782 :: "r" (&c->redDither), | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
783 "r" (dest), "m" ((long)dstW) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
784 : "%"REG_a, "%"REG_d, "%"REG_S |
3344 | 785 ); |
786 #else | |
12017
21e5cb258a95
AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents:
11122
diff
changeset
|
787 #ifdef HAVE_ALTIVEC |
21e5cb258a95
AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents:
11122
diff
changeset
|
788 yuv2yuvX_altivec_real(lumFilter, lumSrc, lumFilterSize, |
21e5cb258a95
AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents:
11122
diff
changeset
|
789 chrFilter, chrSrc, chrFilterSize, |
21e5cb258a95
AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents:
11122
diff
changeset
|
790 dest, uDest, vDest, dstW, chrDstW); |
21e5cb258a95
AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents:
11122
diff
changeset
|
791 #else //HAVE_ALTIVEC |
6540 | 792 yuv2yuvXinC(lumFilter, lumSrc, lumFilterSize, |
3352 | 793 chrFilter, chrSrc, chrFilterSize, |
6540 | 794 dest, uDest, vDest, dstW, chrDstW); |
12017
21e5cb258a95
AltiVec support in postproc/ + altivec optimizations for yuv2yuvX patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michael
parents:
11122
diff
changeset
|
795 #endif //!HAVE_ALTIVEC |
3344 | 796 #endif |
797 } | |
798 | |
14715 | 799 static inline void RENAME(yuv2nv12X)(SwsContext *c, int16_t *lumFilter, int16_t **lumSrc, int lumFilterSize, |
800 int16_t *chrFilter, int16_t **chrSrc, int chrFilterSize, | |
801 uint8_t *dest, uint8_t *uDest, int dstW, int chrDstW, int dstFormat) | |
802 { | |
803 yuv2nv12XinC(lumFilter, lumSrc, lumFilterSize, | |
804 chrFilter, chrSrc, chrFilterSize, | |
805 dest, uDest, dstW, chrDstW, dstFormat); | |
806 } | |
807 | |
3344 | 808 static inline void RENAME(yuv2yuv1)(int16_t *lumSrc, int16_t *chrSrc, |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
809 uint8_t *dest, uint8_t *uDest, uint8_t *vDest, int dstW, int chrDstW) |
3344 | 810 { |
811 #ifdef HAVE_MMX | |
812 if(uDest != NULL) | |
813 { | |
814 asm volatile( | |
815 YSCALEYUV2YV121 | |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
816 :: "r" (chrSrc + chrDstW), "r" (uDest + chrDstW), |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
817 "g" ((long)-chrDstW) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
818 : "%"REG_a |
3344 | 819 ); |
820 | |
821 asm volatile( | |
822 YSCALEYUV2YV121 | |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
823 :: "r" (chrSrc + 2048 + chrDstW), "r" (vDest + chrDstW), |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
824 "g" ((long)-chrDstW) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
825 : "%"REG_a |
3344 | 826 ); |
2519 | 827 } |
3344 | 828 |
829 asm volatile( | |
830 YSCALEYUV2YV121 | |
831 :: "r" (lumSrc + dstW), "r" (dest + dstW), | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
832 "g" ((long)-dstW) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
833 : "%"REG_a |
3344 | 834 ); |
835 #else | |
836 int i; | |
837 for(i=0; i<dstW; i++) | |
838 { | |
839 int val= lumSrc[i]>>7; | |
6503 | 840 |
841 if(val&256){ | |
842 if(val<0) val=0; | |
843 else val=255; | |
844 } | |
3344 | 845 |
6503 | 846 dest[i]= val; |
3344 | 847 } |
848 | |
849 if(uDest != NULL) | |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
850 for(i=0; i<chrDstW; i++) |
3344 | 851 { |
852 int u=chrSrc[i]>>7; | |
853 int v=chrSrc[i + 2048]>>7; | |
854 | |
6503 | 855 if((u|v)&256){ |
856 if(u<0) u=0; | |
857 else if (u>255) u=255; | |
858 if(v<0) v=0; | |
859 else if (v>255) v=255; | |
860 } | |
861 | |
862 uDest[i]= u; | |
863 vDest[i]= v; | |
3344 | 864 } |
865 #endif | |
2519 | 866 } |
867 | |
3344 | 868 |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
869 /** |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
870 * vertical scale YV12 to RGB |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
871 */ |
7723 | 872 static inline void RENAME(yuv2packedX)(SwsContext *c, int16_t *lumFilter, int16_t **lumSrc, int lumFilterSize, |
3344 | 873 int16_t *chrFilter, int16_t **chrSrc, int chrFilterSize, |
9413 | 874 uint8_t *dest, int dstW, int dstY) |
3344 | 875 { |
9413 | 876 int dummy=0; |
6578 | 877 switch(c->dstFormat) |
3344 | 878 { |
879 #ifdef HAVE_MMX | |
6578 | 880 case IMGFMT_BGR32: |
3344 | 881 { |
882 asm volatile( | |
883 YSCALEYUV2RGBX | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
884 WRITEBGR32(%4, %5, %%REGa) |
3344 | 885 |
9413 | 886 :: "r" (&c->redDither), |
887 "m" (dummy), "m" (dummy), "m" (dummy), | |
888 "r" (dest), "m" (dstW) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
889 : "%"REG_a, "%"REG_d, "%"REG_S |
3344 | 890 ); |
891 } | |
6578 | 892 break; |
893 case IMGFMT_BGR24: | |
3344 | 894 { |
895 asm volatile( | |
896 YSCALEYUV2RGBX | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
897 "lea (%%"REG_a", %%"REG_a", 2), %%"REG_b"\n\t" //FIXME optimize |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
898 "add %4, %%"REG_b" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
899 WRITEBGR24(%%REGb, %5, %%REGa) |
3344 | 900 |
9413 | 901 :: "r" (&c->redDither), |
902 "m" (dummy), "m" (dummy), "m" (dummy), | |
903 "r" (dest), "m" (dstW) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
904 : "%"REG_a, "%"REG_b, "%"REG_d, "%"REG_S //FIXME ebx |
3344 | 905 ); |
906 } | |
6578 | 907 break; |
908 case IMGFMT_BGR15: | |
3344 | 909 { |
910 asm volatile( | |
911 YSCALEYUV2RGBX | |
912 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */ | |
913 #ifdef DITHER1XBPP | |
4248 | 914 "paddusb "MANGLE(b5Dither)", %%mm2\n\t" |
915 "paddusb "MANGLE(g5Dither)", %%mm4\n\t" | |
916 "paddusb "MANGLE(r5Dither)", %%mm5\n\t" | |
3344 | 917 #endif |
918 | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
919 WRITEBGR15(%4, %5, %%REGa) |
3344 | 920 |
9413 | 921 :: "r" (&c->redDither), |
922 "m" (dummy), "m" (dummy), "m" (dummy), | |
923 "r" (dest), "m" (dstW) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
924 : "%"REG_a, "%"REG_d, "%"REG_S |
3344 | 925 ); |
926 } | |
6578 | 927 break; |
928 case IMGFMT_BGR16: | |
3344 | 929 { |
930 asm volatile( | |
931 YSCALEYUV2RGBX | |
932 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */ | |
933 #ifdef DITHER1XBPP | |
4248 | 934 "paddusb "MANGLE(b5Dither)", %%mm2\n\t" |
935 "paddusb "MANGLE(g6Dither)", %%mm4\n\t" | |
936 "paddusb "MANGLE(r5Dither)", %%mm5\n\t" | |
3344 | 937 #endif |
938 | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
939 WRITEBGR16(%4, %5, %%REGa) |
3344 | 940 |
9413 | 941 :: "r" (&c->redDither), |
942 "m" (dummy), "m" (dummy), "m" (dummy), | |
943 "r" (dest), "m" (dstW) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
944 : "%"REG_a, "%"REG_d, "%"REG_S |
3344 | 945 ); |
946 } | |
6578 | 947 break; |
7723 | 948 case IMGFMT_YUY2: |
949 { | |
950 asm volatile( | |
951 YSCALEYUV2PACKEDX | |
952 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */ | |
953 | |
954 "psraw $3, %%mm3 \n\t" | |
955 "psraw $3, %%mm4 \n\t" | |
956 "psraw $3, %%mm1 \n\t" | |
957 "psraw $3, %%mm7 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
958 WRITEYUY2(%4, %5, %%REGa) |
7723 | 959 |
9413 | 960 :: "r" (&c->redDither), |
961 "m" (dummy), "m" (dummy), "m" (dummy), | |
962 "r" (dest), "m" (dstW) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
963 : "%"REG_a, "%"REG_d, "%"REG_S |
7723 | 964 ); |
965 } | |
966 break; | |
3344 | 967 #endif |
6578 | 968 default: |
12698 | 969 #ifdef HAVE_ALTIVEC |
970 altivec_yuv2packedX (c, lumFilter, lumSrc, lumFilterSize, | |
971 chrFilter, chrSrc, chrFilterSize, | |
972 dest, dstW, dstY); | |
973 #else | |
7723 | 974 yuv2packedXinC(c, lumFilter, lumSrc, lumFilterSize, |
6578 | 975 chrFilter, chrSrc, chrFilterSize, |
976 dest, dstW, dstY); | |
12698 | 977 #endif |
6578 | 978 break; |
979 } | |
3344 | 980 } |
981 | |
982 /** | |
983 * vertical bilinear scale YV12 to RGB | |
984 */ | |
7723 | 985 static inline void RENAME(yuv2packed2)(SwsContext *c, uint16_t *buf0, uint16_t *buf1, uint16_t *uvbuf0, uint16_t *uvbuf1, |
6578 | 986 uint8_t *dest, int dstW, int yalpha, int uvalpha, int y) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
987 { |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
988 int yalpha1=yalpha^4095; |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
989 int uvalpha1=uvalpha^4095; |
6578 | 990 int i; |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
991 |
11000 | 992 #if 0 //isn't used |
4467 | 993 if(flags&SWS_FULL_CHR_H_INT) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
994 { |
6578 | 995 switch(dstFormat) |
996 { | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
997 #ifdef HAVE_MMX |
6578 | 998 case IMGFMT_BGR32: |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
999 asm volatile( |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1000 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1001 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1002 FULL_YSCALEYUV2RGB |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1003 "punpcklbw %%mm1, %%mm3 \n\t" // BGBGBGBG |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1004 "punpcklbw %%mm7, %%mm0 \n\t" // R0R0R0R0 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1005 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1006 "movq %%mm3, %%mm1 \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1007 "punpcklwd %%mm0, %%mm3 \n\t" // BGR0BGR0 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1008 "punpckhwd %%mm0, %%mm1 \n\t" // BGR0BGR0 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1009 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1010 MOVNTQ(%%mm3, (%4, %%REGa, 4)) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1011 MOVNTQ(%%mm1, 8(%4, %%REGa, 4)) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1012 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1013 "add $4, %%"REG_a" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1014 "cmp %5, %%"REG_a" \n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1015 " jb 1b \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1016 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1017 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1018 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" ((long)dstW), |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1019 "m" (yalpha1), "m" (uvalpha1) |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1020 : "%"REG_a |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1021 ); |
6578 | 1022 break; |
1023 case IMGFMT_BGR24: | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1024 asm volatile( |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1025 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1026 FULL_YSCALEYUV2RGB |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1027 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1028 // lsb ... msb |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1029 "punpcklbw %%mm1, %%mm3 \n\t" // BGBGBGBG |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1030 "punpcklbw %%mm7, %%mm0 \n\t" // R0R0R0R0 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1031 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1032 "movq %%mm3, %%mm1 \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1033 "punpcklwd %%mm0, %%mm3 \n\t" // BGR0BGR0 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1034 "punpckhwd %%mm0, %%mm1 \n\t" // BGR0BGR0 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1035 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1036 "movq %%mm3, %%mm2 \n\t" // BGR0BGR0 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1037 "psrlq $8, %%mm3 \n\t" // GR0BGR00 |
4248 | 1038 "pand "MANGLE(bm00000111)", %%mm2\n\t" // BGR00000 |
1039 "pand "MANGLE(bm11111000)", %%mm3\n\t" // 000BGR00 | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1040 "por %%mm2, %%mm3 \n\t" // BGRBGR00 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1041 "movq %%mm1, %%mm2 \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1042 "psllq $48, %%mm1 \n\t" // 000000BG |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1043 "por %%mm1, %%mm3 \n\t" // BGRBGRBG |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1044 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1045 "movq %%mm2, %%mm1 \n\t" // BGR0BGR0 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1046 "psrld $16, %%mm2 \n\t" // R000R000 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1047 "psrlq $24, %%mm1 \n\t" // 0BGR0000 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1048 "por %%mm2, %%mm1 \n\t" // RBGRR000 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1049 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1050 "mov %4, %%"REG_b" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1051 "add %%"REG_a", %%"REG_b" \n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1052 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1053 #ifdef HAVE_MMX2 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1054 //FIXME Alignment |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1055 "movntq %%mm3, (%%"REG_b", %%"REG_a", 2)\n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1056 "movntq %%mm1, 8(%%"REG_b", %%"REG_a", 2)\n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1057 #else |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1058 "movd %%mm3, (%%"REG_b", %%"REG_a", 2) \n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1059 "psrlq $32, %%mm3 \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1060 "movd %%mm3, 4(%%"REG_b", %%"REG_a", 2) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1061 "movd %%mm1, 8(%%"REG_b", %%"REG_a", 2) \n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1062 #endif |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1063 "add $4, %%"REG_a" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1064 "cmp %5, %%"REG_a" \n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1065 " jb 1b \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1066 |
3209 | 1067 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), "m" (dstW), |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1068 "m" (yalpha1), "m" (uvalpha1) |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1069 : "%"REG_a, "%"REG_b |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1070 ); |
6578 | 1071 break; |
1072 case IMGFMT_BGR15: | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1073 asm volatile( |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1074 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1075 FULL_YSCALEYUV2RGB |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1076 #ifdef DITHER1XBPP |
4248 | 1077 "paddusb "MANGLE(g5Dither)", %%mm1\n\t" |
1078 "paddusb "MANGLE(r5Dither)", %%mm0\n\t" | |
1079 "paddusb "MANGLE(b5Dither)", %%mm3\n\t" | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1080 #endif |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1081 "punpcklbw %%mm7, %%mm1 \n\t" // 0G0G0G0G |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1082 "punpcklbw %%mm7, %%mm3 \n\t" // 0B0B0B0B |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1083 "punpcklbw %%mm7, %%mm0 \n\t" // 0R0R0R0R |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1084 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1085 "psrlw $3, %%mm3 \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1086 "psllw $2, %%mm1 \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1087 "psllw $7, %%mm0 \n\t" |
4248 | 1088 "pand "MANGLE(g15Mask)", %%mm1 \n\t" |
1089 "pand "MANGLE(r15Mask)", %%mm0 \n\t" | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1090 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1091 "por %%mm3, %%mm1 \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1092 "por %%mm1, %%mm0 \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1093 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1094 MOVNTQ(%%mm0, (%4, %%REGa, 2)) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1095 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1096 "add $4, %%"REG_a" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1097 "cmp %5, %%"REG_a" \n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1098 " jb 1b \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1099 |
3209 | 1100 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstW), |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1101 "m" (yalpha1), "m" (uvalpha1) |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1102 : "%"REG_a |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1103 ); |
6578 | 1104 break; |
1105 case IMGFMT_BGR16: | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1106 asm volatile( |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1107 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1108 FULL_YSCALEYUV2RGB |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1109 #ifdef DITHER1XBPP |
4248 | 1110 "paddusb "MANGLE(g6Dither)", %%mm1\n\t" |
1111 "paddusb "MANGLE(r5Dither)", %%mm0\n\t" | |
1112 "paddusb "MANGLE(b5Dither)", %%mm3\n\t" | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1113 #endif |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1114 "punpcklbw %%mm7, %%mm1 \n\t" // 0G0G0G0G |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1115 "punpcklbw %%mm7, %%mm3 \n\t" // 0B0B0B0B |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1116 "punpcklbw %%mm7, %%mm0 \n\t" // 0R0R0R0R |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1117 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1118 "psrlw $3, %%mm3 \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1119 "psllw $3, %%mm1 \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1120 "psllw $8, %%mm0 \n\t" |
4248 | 1121 "pand "MANGLE(g16Mask)", %%mm1 \n\t" |
1122 "pand "MANGLE(r16Mask)", %%mm0 \n\t" | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1123 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1124 "por %%mm3, %%mm1 \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1125 "por %%mm1, %%mm0 \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1126 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1127 MOVNTQ(%%mm0, (%4, %%REGa, 2)) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1128 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1129 "add $4, %%"REG_a" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1130 "cmp %5, %%"REG_a" \n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1131 " jb 1b \n\t" |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1132 |
3209 | 1133 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstW), |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1134 "m" (yalpha1), "m" (uvalpha1) |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1135 : "%"REG_a |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1136 ); |
6578 | 1137 break; |
1138 #endif | |
1139 case IMGFMT_RGB32: | |
1140 #ifndef HAVE_MMX | |
1141 case IMGFMT_BGR32: | |
1142 #endif | |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1143 if(dstFormat==IMGFMT_BGR32) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1144 { |
4794 | 1145 int i; |
4793 | 1146 #ifdef WORDS_BIGENDIAN |
1147 dest++; | |
1148 #endif | |
3209 | 1149 for(i=0;i<dstW;i++){ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1150 // vertical linear interpolation && yuv2rgb in a single step: |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1151 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)]; |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1152 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19); |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1153 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19); |
2503 | 1154 dest[0]=clip_table[((Y + yuvtab_40cf[U]) >>13)]; |
1155 dest[1]=clip_table[((Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13)]; | |
1156 dest[2]=clip_table[((Y + yuvtab_3343[V]) >>13)]; | |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1157 dest+= 4; |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1158 } |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1159 } |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1160 else if(dstFormat==IMGFMT_BGR24) |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1161 { |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1162 int i; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1163 for(i=0;i<dstW;i++){ |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1164 // vertical linear interpolation && yuv2rgb in a single step: |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1165 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)]; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1166 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19); |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1167 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19); |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1168 dest[0]=clip_table[((Y + yuvtab_40cf[U]) >>13)]; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1169 dest[1]=clip_table[((Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13)]; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1170 dest[2]=clip_table[((Y + yuvtab_3343[V]) >>13)]; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1171 dest+= 3; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1172 } |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1173 } |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1174 else if(dstFormat==IMGFMT_BGR16) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1175 { |
2671 | 1176 int i; |
3209 | 1177 for(i=0;i<dstW;i++){ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1178 // vertical linear interpolation && yuv2rgb in a single step: |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1179 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)]; |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1180 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19); |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1181 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19); |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1182 |
2572
f2353173d52c
c optimizations (array is faster than pointer) (16bpp variants tested and 2% faster)
michael
parents:
2569
diff
changeset
|
1183 ((uint16_t*)dest)[i] = |
2584 | 1184 clip_table16b[(Y + yuvtab_40cf[U]) >>13] | |
1185 clip_table16g[(Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13] | | |
1186 clip_table16r[(Y + yuvtab_3343[V]) >>13]; | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1187 } |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1188 } |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
1189 else if(dstFormat==IMGFMT_BGR15) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1190 { |
2671 | 1191 int i; |
3209 | 1192 for(i=0;i<dstW;i++){ |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1193 // vertical linear interpolation && yuv2rgb in a single step: |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1194 int Y=yuvtab_2568[((buf0[i]*yalpha1+buf1[i]*yalpha)>>19)]; |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1195 int U=((uvbuf0[i]*uvalpha1+uvbuf1[i]*uvalpha)>>19); |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1196 int V=((uvbuf0[i+2048]*uvalpha1+uvbuf1[i+2048]*uvalpha)>>19); |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1197 |
2572
f2353173d52c
c optimizations (array is faster than pointer) (16bpp variants tested and 2% faster)
michael
parents:
2569
diff
changeset
|
1198 ((uint16_t*)dest)[i] = |
2584 | 1199 clip_table15b[(Y + yuvtab_40cf[U]) >>13] | |
1200 clip_table15g[(Y + yuvtab_1a1e[V] + yuvtab_0c92[U]) >>13] | | |
1201 clip_table15r[(Y + yuvtab_3343[V]) >>13]; | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1202 } |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1203 } |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1204 }//FULL_UV_IPOL |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1205 else |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1206 { |
6578 | 1207 #endif // if 0 |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1208 #ifdef HAVE_MMX |
6578 | 1209 switch(c->dstFormat) |
1210 { | |
11000 | 1211 //Note 8280 == DSTW_OFFSET but the preprocessor can't handle that there :( |
6578 | 1212 case IMGFMT_BGR32: |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1213 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1214 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1215 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1216 YSCALEYUV2RGB(%%REGa, %5) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1217 WRITEBGR32(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1218 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1219 |
9414 | 1220 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), |
1221 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1222 : "%"REG_a |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1223 ); |
6578 | 1224 return; |
1225 case IMGFMT_BGR24: | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1226 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1227 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1228 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1229 YSCALEYUV2RGB(%%REGa, %5) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1230 WRITEBGR24(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1231 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9414 | 1232 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), |
1233 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1234 : "%"REG_a |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1235 ); |
6578 | 1236 return; |
1237 case IMGFMT_BGR15: | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1238 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1239 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1240 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1241 YSCALEYUV2RGB(%%REGa, %5) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1242 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1243 #ifdef DITHER1XBPP |
4248 | 1244 "paddusb "MANGLE(b5Dither)", %%mm2\n\t" |
1245 "paddusb "MANGLE(g5Dither)", %%mm4\n\t" | |
1246 "paddusb "MANGLE(r5Dither)", %%mm5\n\t" | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1247 #endif |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1248 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1249 WRITEBGR15(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1250 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1251 |
9414 | 1252 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), |
1253 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1254 : "%"REG_a |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1255 ); |
6578 | 1256 return; |
1257 case IMGFMT_BGR16: | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1258 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1259 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1260 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1261 YSCALEYUV2RGB(%%REGa, %5) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1262 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1263 #ifdef DITHER1XBPP |
4248 | 1264 "paddusb "MANGLE(b5Dither)", %%mm2\n\t" |
1265 "paddusb "MANGLE(g6Dither)", %%mm4\n\t" | |
1266 "paddusb "MANGLE(r5Dither)", %%mm5\n\t" | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1267 #endif |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1268 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1269 WRITEBGR16(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1270 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9414 | 1271 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), |
1272 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1273 : "%"REG_a |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1274 ); |
6578 | 1275 return; |
7723 | 1276 case IMGFMT_YUY2: |
1277 asm volatile( | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1278 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1279 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1280 YSCALEYUV2PACKED(%%REGa, %5) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1281 WRITEYUY2(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1282 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9414 | 1283 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), |
1284 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1285 : "%"REG_a |
7723 | 1286 ); |
1287 return; | |
6578 | 1288 default: break; |
1289 } | |
1290 #endif //HAVE_MMX | |
7723 | 1291 YSCALE_YUV_2_ANYRGB_C(YSCALE_YUV_2_RGB2_C, YSCALE_YUV_2_PACKED2_C) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1292 } |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1293 |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1294 /** |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1295 * YV12 to RGB without scaling or interpolating |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1296 */ |
7723 | 1297 static inline void RENAME(yuv2packed1)(SwsContext *c, uint16_t *buf0, uint16_t *uvbuf0, uint16_t *uvbuf1, |
6578 | 1298 uint8_t *dest, int dstW, int uvalpha, int dstFormat, int flags, int y) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1299 { |
3344 | 1300 const int yalpha1=0; |
6578 | 1301 int i; |
1302 | |
1303 uint16_t *buf1= buf0; //FIXME needed for the rgb1/bgr1 | |
1304 const int yalpha= 4096; //FIXME ... | |
2671 | 1305 |
4467 | 1306 if(flags&SWS_FULL_CHR_H_INT) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1307 { |
7723 | 1308 RENAME(yuv2packed2)(c, buf0, buf0, uvbuf0, uvbuf1, dest, dstW, 0, uvalpha, y); |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1309 return; |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1310 } |
2576 | 1311 |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1312 #ifdef HAVE_MMX |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1313 if( uvalpha < 2048 ) // note this is not correct (shifts chrominance by 0.5 pixels) but its a bit faster |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1314 { |
6578 | 1315 switch(dstFormat) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1316 { |
6578 | 1317 case IMGFMT_BGR32: |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1318 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1319 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1320 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1321 YSCALEYUV2RGB1(%%REGa, %5) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1322 WRITEBGR32(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1323 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9417 | 1324 |
1325 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), | |
1326 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1327 : "%"REG_a |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1328 ); |
6578 | 1329 return; |
1330 case IMGFMT_BGR24: | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1331 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1332 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1333 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1334 YSCALEYUV2RGB1(%%REGa, %5) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1335 WRITEBGR24(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1336 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9417 | 1337 |
1338 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), | |
1339 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1340 : "%"REG_a |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1341 ); |
6578 | 1342 return; |
1343 case IMGFMT_BGR15: | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1344 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1345 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1346 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1347 YSCALEYUV2RGB1(%%REGa, %5) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1348 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1349 #ifdef DITHER1XBPP |
4248 | 1350 "paddusb "MANGLE(b5Dither)", %%mm2\n\t" |
1351 "paddusb "MANGLE(g5Dither)", %%mm4\n\t" | |
1352 "paddusb "MANGLE(r5Dither)", %%mm5\n\t" | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1353 #endif |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1354 WRITEBGR15(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1355 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9417 | 1356 |
1357 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), | |
1358 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1359 : "%"REG_a |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1360 ); |
6578 | 1361 return; |
1362 case IMGFMT_BGR16: | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1363 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1364 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1365 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1366 YSCALEYUV2RGB1(%%REGa, %5) |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1367 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */ |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1368 #ifdef DITHER1XBPP |
4248 | 1369 "paddusb "MANGLE(b5Dither)", %%mm2\n\t" |
1370 "paddusb "MANGLE(g6Dither)", %%mm4\n\t" | |
1371 "paddusb "MANGLE(r5Dither)", %%mm5\n\t" | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1372 #endif |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1373 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1374 WRITEBGR16(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1375 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9417 | 1376 |
1377 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), | |
1378 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1379 : "%"REG_a |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1380 ); |
6578 | 1381 return; |
7723 | 1382 case IMGFMT_YUY2: |
1383 asm volatile( | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1384 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1385 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1386 YSCALEYUV2PACKED1(%%REGa, %5) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1387 WRITEYUY2(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1388 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9417 | 1389 |
1390 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), | |
1391 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1392 : "%"REG_a |
7723 | 1393 ); |
1394 return; | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1395 } |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1396 } |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1397 else |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1398 { |
6578 | 1399 switch(dstFormat) |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1400 { |
6578 | 1401 case IMGFMT_BGR32: |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1402 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1403 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1404 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1405 YSCALEYUV2RGB1b(%%REGa, %5) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1406 WRITEBGR32(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1407 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9417 | 1408 |
1409 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), | |
1410 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1411 : "%"REG_a |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1412 ); |
6578 | 1413 return; |
1414 case IMGFMT_BGR24: | |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1415 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1416 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1417 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1418 YSCALEYUV2RGB1b(%%REGa, %5) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1419 WRITEBGR24(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1420 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9417 | 1421 |
1422 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), | |
1423 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1424 : "%"REG_a |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1425 ); |
6578 | 1426 return; |
1427 case IMGFMT_BGR15: | |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1428 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1429 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1430 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1431 YSCALEYUV2RGB1b(%%REGa, %5) |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1432 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1433 #ifdef DITHER1XBPP |
4248 | 1434 "paddusb "MANGLE(b5Dither)", %%mm2\n\t" |
1435 "paddusb "MANGLE(g5Dither)", %%mm4\n\t" | |
1436 "paddusb "MANGLE(r5Dither)", %%mm5\n\t" | |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1437 #endif |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1438 WRITEBGR15(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1439 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9417 | 1440 |
1441 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), | |
1442 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1443 : "%"REG_a |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1444 ); |
6578 | 1445 return; |
1446 case IMGFMT_BGR16: | |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1447 asm volatile( |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1448 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1449 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1450 YSCALEYUV2RGB1b(%%REGa, %5) |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1451 /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */ |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1452 #ifdef DITHER1XBPP |
4248 | 1453 "paddusb "MANGLE(b5Dither)", %%mm2\n\t" |
1454 "paddusb "MANGLE(g6Dither)", %%mm4\n\t" | |
1455 "paddusb "MANGLE(r5Dither)", %%mm5\n\t" | |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1456 #endif |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1457 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1458 WRITEBGR16(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1459 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9417 | 1460 |
1461 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), | |
1462 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1463 : "%"REG_a |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1464 ); |
6578 | 1465 return; |
7723 | 1466 case IMGFMT_YUY2: |
1467 asm volatile( | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1468 "mov %%"REG_SP", "ESP_OFFSET"(%5) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1469 "mov %4, %%"REG_SP" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1470 YSCALEYUV2PACKED1b(%%REGa, %5) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1471 WRITEYUY2(%%REGSP, 8280(%5), %%REGa) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1472 "mov "ESP_OFFSET"(%5), %%"REG_SP" \n\t" |
9417 | 1473 |
1474 :: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), | |
1475 "r" (&c->redDither) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1476 : "%"REG_a |
7723 | 1477 ); |
1478 return; | |
2569
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1479 } |
30b736e7feef
interpolate chrominance for every second line in the 1:1 vertical scale function
michael
parents:
2566
diff
changeset
|
1480 } |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1481 #endif |
6578 | 1482 if( uvalpha < 2048 ) |
1483 { | |
7723 | 1484 YSCALE_YUV_2_ANYRGB_C(YSCALE_YUV_2_RGB1_C, YSCALE_YUV_2_PACKED1_C) |
6578 | 1485 }else{ |
7723 | 1486 YSCALE_YUV_2_ANYRGB_C(YSCALE_YUV_2_RGB1B_C, YSCALE_YUV_2_PACKED1B_C) |
6578 | 1487 } |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1488 } |
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
1489 |
4481 | 1490 //FIXME yuy2* can read upto 7 samples to much |
1491 | |
4467 | 1492 static inline void RENAME(yuy2ToY)(uint8_t *dst, uint8_t *src, int width) |
1493 { | |
4481 | 1494 #ifdef HAVE_MMX |
1495 asm volatile( | |
1496 "movq "MANGLE(bm01010101)", %%mm2\n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1497 "mov %0, %%"REG_a" \n\t" |
4481 | 1498 "1: \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1499 "movq (%1, %%"REG_a",2), %%mm0 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1500 "movq 8(%1, %%"REG_a",2), %%mm1 \n\t" |
4481 | 1501 "pand %%mm2, %%mm0 \n\t" |
1502 "pand %%mm2, %%mm1 \n\t" | |
1503 "packuswb %%mm1, %%mm0 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1504 "movq %%mm0, (%2, %%"REG_a") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1505 "add $8, %%"REG_a" \n\t" |
4481 | 1506 " js 1b \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1507 : : "g" ((long)-width), "r" (src+width*2), "r" (dst+width) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1508 : "%"REG_a |
4481 | 1509 ); |
4467 | 1510 #else |
1511 int i; | |
1512 for(i=0; i<width; i++) | |
1513 dst[i]= src[2*i]; | |
1514 #endif | |
1515 } | |
1516 | |
1517 static inline void RENAME(yuy2ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width) | |
1518 { | |
4481 | 1519 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW) |
1520 asm volatile( | |
1521 "movq "MANGLE(bm01010101)", %%mm4\n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1522 "mov %0, %%"REG_a" \n\t" |
4481 | 1523 "1: \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1524 "movq (%1, %%"REG_a",4), %%mm0 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1525 "movq 8(%1, %%"REG_a",4), %%mm1 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1526 "movq (%2, %%"REG_a",4), %%mm2 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1527 "movq 8(%2, %%"REG_a",4), %%mm3 \n\t" |
4481 | 1528 PAVGB(%%mm2, %%mm0) |
1529 PAVGB(%%mm3, %%mm1) | |
1530 "psrlw $8, %%mm0 \n\t" | |
1531 "psrlw $8, %%mm1 \n\t" | |
1532 "packuswb %%mm1, %%mm0 \n\t" | |
1533 "movq %%mm0, %%mm1 \n\t" | |
1534 "psrlw $8, %%mm0 \n\t" | |
1535 "pand %%mm4, %%mm1 \n\t" | |
1536 "packuswb %%mm0, %%mm0 \n\t" | |
1537 "packuswb %%mm1, %%mm1 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1538 "movd %%mm0, (%4, %%"REG_a") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1539 "movd %%mm1, (%3, %%"REG_a") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1540 "add $4, %%"REG_a" \n\t" |
4481 | 1541 " js 1b \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1542 : : "g" ((long)-width), "r" (src1+width*4), "r" (src2+width*4), "r" (dstU+width), "r" (dstV+width) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1543 : "%"REG_a |
4481 | 1544 ); |
4467 | 1545 #else |
1546 int i; | |
1547 for(i=0; i<width; i++) | |
1548 { | |
1549 dstU[i]= (src1[4*i + 1] + src2[4*i + 1])>>1; | |
1550 dstV[i]= (src1[4*i + 3] + src2[4*i + 3])>>1; | |
1551 } | |
1552 #endif | |
1553 } | |
1554 | |
9071 | 1555 //this is allmost identical to the previous, end exists only cuz yuy2ToY/UV)(dst, src+1, ...) would have 100% unaligned accesses |
1556 static inline void RENAME(uyvyToY)(uint8_t *dst, uint8_t *src, int width) | |
1557 { | |
1558 #ifdef HAVE_MMX | |
1559 asm volatile( | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1560 "mov %0, %%"REG_a" \n\t" |
9071 | 1561 "1: \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1562 "movq (%1, %%"REG_a",2), %%mm0 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1563 "movq 8(%1, %%"REG_a",2), %%mm1 \n\t" |
9071 | 1564 "psrlw $8, %%mm0 \n\t" |
1565 "psrlw $8, %%mm1 \n\t" | |
1566 "packuswb %%mm1, %%mm0 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1567 "movq %%mm0, (%2, %%"REG_a") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1568 "add $8, %%"REG_a" \n\t" |
9071 | 1569 " js 1b \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1570 : : "g" ((long)-width), "r" (src+width*2), "r" (dst+width) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1571 : "%"REG_a |
9071 | 1572 ); |
1573 #else | |
1574 int i; | |
1575 for(i=0; i<width; i++) | |
1576 dst[i]= src[2*i+1]; | |
1577 #endif | |
1578 } | |
1579 | |
1580 static inline void RENAME(uyvyToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width) | |
1581 { | |
1582 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW) | |
1583 asm volatile( | |
1584 "movq "MANGLE(bm01010101)", %%mm4\n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1585 "mov %0, %%"REG_a" \n\t" |
9071 | 1586 "1: \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1587 "movq (%1, %%"REG_a",4), %%mm0 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1588 "movq 8(%1, %%"REG_a",4), %%mm1 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1589 "movq (%2, %%"REG_a",4), %%mm2 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1590 "movq 8(%2, %%"REG_a",4), %%mm3 \n\t" |
9071 | 1591 PAVGB(%%mm2, %%mm0) |
1592 PAVGB(%%mm3, %%mm1) | |
1593 "pand %%mm4, %%mm0 \n\t" | |
1594 "pand %%mm4, %%mm1 \n\t" | |
1595 "packuswb %%mm1, %%mm0 \n\t" | |
1596 "movq %%mm0, %%mm1 \n\t" | |
1597 "psrlw $8, %%mm0 \n\t" | |
1598 "pand %%mm4, %%mm1 \n\t" | |
1599 "packuswb %%mm0, %%mm0 \n\t" | |
1600 "packuswb %%mm1, %%mm1 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1601 "movd %%mm0, (%4, %%"REG_a") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1602 "movd %%mm1, (%3, %%"REG_a") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1603 "add $4, %%"REG_a" \n\t" |
9071 | 1604 " js 1b \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1605 : : "g" ((long)-width), "r" (src1+width*4), "r" (src2+width*4), "r" (dstU+width), "r" (dstV+width) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1606 : "%"REG_a |
9071 | 1607 ); |
1608 #else | |
1609 int i; | |
1610 for(i=0; i<width; i++) | |
1611 { | |
1612 dstU[i]= (src1[4*i + 0] + src2[4*i + 0])>>1; | |
1613 dstV[i]= (src1[4*i + 2] + src2[4*i + 2])>>1; | |
1614 } | |
1615 #endif | |
1616 } | |
1617 | |
4467 | 1618 static inline void RENAME(bgr32ToY)(uint8_t *dst, uint8_t *src, int width) |
1619 { | |
1620 #ifdef HAVE_MMXFIXME | |
1621 #else | |
1622 int i; | |
1623 for(i=0; i<width; i++) | |
1624 { | |
9433 | 1625 int b= ((uint32_t*)src)[i]&0xFF; |
1626 int g= (((uint32_t*)src)[i]>>8)&0xFF; | |
9499 | 1627 int r= (((uint32_t*)src)[i]>>16)&0xFF; |
4467 | 1628 |
9433 | 1629 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT); |
4467 | 1630 } |
1631 #endif | |
1632 } | |
1633 | |
1634 static inline void RENAME(bgr32ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width) | |
1635 { | |
1636 #ifdef HAVE_MMXFIXME | |
1637 #else | |
1638 int i; | |
1639 for(i=0; i<width; i++) | |
1640 { | |
9433 | 1641 const int a= ((uint32_t*)src1)[2*i+0]; |
1642 const int e= ((uint32_t*)src1)[2*i+1]; | |
1643 const int c= ((uint32_t*)src2)[2*i+0]; | |
1644 const int d= ((uint32_t*)src2)[2*i+1]; | |
1645 const int l= (a&0xFF00FF) + (e&0xFF00FF) + (c&0xFF00FF) + (d&0xFF00FF); | |
1646 const int h= (a&0x00FF00) + (e&0x00FF00) + (c&0x00FF00) + (d&0x00FF00); | |
1647 const int b= l&0x3FF; | |
1648 const int g= h>>8; | |
1649 const int r= l>>16; | |
4467 | 1650 |
1651 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128; | |
1652 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128; | |
1653 } | |
1654 #endif | |
1655 } | |
1656 | |
1657 static inline void RENAME(bgr24ToY)(uint8_t *dst, uint8_t *src, int width) | |
1658 { | |
4612 | 1659 #ifdef HAVE_MMX |
1660 asm volatile( | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1661 "mov %2, %%"REG_a" \n\t" |
4923 | 1662 "movq "MANGLE(bgr2YCoeff)", %%mm6 \n\t" |
1663 "movq "MANGLE(w1111)", %%mm5 \n\t" | |
4612 | 1664 "pxor %%mm7, %%mm7 \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1665 "lea (%%"REG_a", %%"REG_a", 2), %%"REG_b"\n\t" |
4612 | 1666 ".balign 16 \n\t" |
1667 "1: \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1668 PREFETCH" 64(%0, %%"REG_b") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1669 "movd (%0, %%"REG_b"), %%mm0 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1670 "movd 3(%0, %%"REG_b"), %%mm1 \n\t" |
4612 | 1671 "punpcklbw %%mm7, %%mm0 \n\t" |
1672 "punpcklbw %%mm7, %%mm1 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1673 "movd 6(%0, %%"REG_b"), %%mm2 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1674 "movd 9(%0, %%"REG_b"), %%mm3 \n\t" |
4612 | 1675 "punpcklbw %%mm7, %%mm2 \n\t" |
1676 "punpcklbw %%mm7, %%mm3 \n\t" | |
1677 "pmaddwd %%mm6, %%mm0 \n\t" | |
1678 "pmaddwd %%mm6, %%mm1 \n\t" | |
1679 "pmaddwd %%mm6, %%mm2 \n\t" | |
1680 "pmaddwd %%mm6, %%mm3 \n\t" | |
1681 #ifndef FAST_BGR2YV12 | |
1682 "psrad $8, %%mm0 \n\t" | |
1683 "psrad $8, %%mm1 \n\t" | |
1684 "psrad $8, %%mm2 \n\t" | |
1685 "psrad $8, %%mm3 \n\t" | |
1686 #endif | |
1687 "packssdw %%mm1, %%mm0 \n\t" | |
1688 "packssdw %%mm3, %%mm2 \n\t" | |
1689 "pmaddwd %%mm5, %%mm0 \n\t" | |
1690 "pmaddwd %%mm5, %%mm2 \n\t" | |
1691 "packssdw %%mm2, %%mm0 \n\t" | |
1692 "psraw $7, %%mm0 \n\t" | |
1693 | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1694 "movd 12(%0, %%"REG_b"), %%mm4 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1695 "movd 15(%0, %%"REG_b"), %%mm1 \n\t" |
4612 | 1696 "punpcklbw %%mm7, %%mm4 \n\t" |
1697 "punpcklbw %%mm7, %%mm1 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1698 "movd 18(%0, %%"REG_b"), %%mm2 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1699 "movd 21(%0, %%"REG_b"), %%mm3 \n\t" |
4612 | 1700 "punpcklbw %%mm7, %%mm2 \n\t" |
1701 "punpcklbw %%mm7, %%mm3 \n\t" | |
1702 "pmaddwd %%mm6, %%mm4 \n\t" | |
1703 "pmaddwd %%mm6, %%mm1 \n\t" | |
1704 "pmaddwd %%mm6, %%mm2 \n\t" | |
1705 "pmaddwd %%mm6, %%mm3 \n\t" | |
1706 #ifndef FAST_BGR2YV12 | |
1707 "psrad $8, %%mm4 \n\t" | |
1708 "psrad $8, %%mm1 \n\t" | |
1709 "psrad $8, %%mm2 \n\t" | |
1710 "psrad $8, %%mm3 \n\t" | |
1711 #endif | |
1712 "packssdw %%mm1, %%mm4 \n\t" | |
1713 "packssdw %%mm3, %%mm2 \n\t" | |
1714 "pmaddwd %%mm5, %%mm4 \n\t" | |
1715 "pmaddwd %%mm5, %%mm2 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1716 "add $24, %%"REG_b" \n\t" |
4612 | 1717 "packssdw %%mm2, %%mm4 \n\t" |
1718 "psraw $7, %%mm4 \n\t" | |
1719 | |
1720 "packuswb %%mm4, %%mm0 \n\t" | |
4923 | 1721 "paddusb "MANGLE(bgr2YOffset)", %%mm0 \n\t" |
4612 | 1722 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1723 "movq %%mm0, (%1, %%"REG_a") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1724 "add $8, %%"REG_a" \n\t" |
4612 | 1725 " js 1b \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1726 : : "r" (src+width*3), "r" (dst+width), "g" ((long)-width) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1727 : "%"REG_a, "%"REG_b |
4612 | 1728 ); |
4467 | 1729 #else |
1730 int i; | |
1731 for(i=0; i<width; i++) | |
1732 { | |
1733 int b= src[i*3+0]; | |
1734 int g= src[i*3+1]; | |
1735 int r= src[i*3+2]; | |
1736 | |
9434 | 1737 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT); |
4467 | 1738 } |
1739 #endif | |
1740 } | |
1741 | |
1742 static inline void RENAME(bgr24ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width) | |
1743 { | |
4619 | 1744 #ifdef HAVE_MMX |
1745 asm volatile( | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1746 "mov %4, %%"REG_a" \n\t" |
4923 | 1747 "movq "MANGLE(w1111)", %%mm5 \n\t" |
1748 "movq "MANGLE(bgr2UCoeff)", %%mm6 \n\t" | |
4619 | 1749 "pxor %%mm7, %%mm7 \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1750 "lea (%%"REG_a", %%"REG_a", 2), %%"REG_b" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1751 "add %%"REG_b", %%"REG_b" \n\t" |
4619 | 1752 ".balign 16 \n\t" |
1753 "1: \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1754 PREFETCH" 64(%0, %%"REG_b") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1755 PREFETCH" 64(%1, %%"REG_b") \n\t" |
4619 | 1756 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW) |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1757 "movq (%0, %%"REG_b"), %%mm0 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1758 "movq (%1, %%"REG_b"), %%mm1 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1759 "movq 6(%0, %%"REG_b"), %%mm2 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1760 "movq 6(%1, %%"REG_b"), %%mm3 \n\t" |
4619 | 1761 PAVGB(%%mm1, %%mm0) |
1762 PAVGB(%%mm3, %%mm2) | |
1763 "movq %%mm0, %%mm1 \n\t" | |
1764 "movq %%mm2, %%mm3 \n\t" | |
1765 "psrlq $24, %%mm0 \n\t" | |
1766 "psrlq $24, %%mm2 \n\t" | |
1767 PAVGB(%%mm1, %%mm0) | |
1768 PAVGB(%%mm3, %%mm2) | |
1769 "punpcklbw %%mm7, %%mm0 \n\t" | |
1770 "punpcklbw %%mm7, %%mm2 \n\t" | |
1771 #else | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1772 "movd (%0, %%"REG_b"), %%mm0 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1773 "movd (%1, %%"REG_b"), %%mm1 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1774 "movd 3(%0, %%"REG_b"), %%mm2 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1775 "movd 3(%1, %%"REG_b"), %%mm3 \n\t" |
4619 | 1776 "punpcklbw %%mm7, %%mm0 \n\t" |
1777 "punpcklbw %%mm7, %%mm1 \n\t" | |
1778 "punpcklbw %%mm7, %%mm2 \n\t" | |
1779 "punpcklbw %%mm7, %%mm3 \n\t" | |
1780 "paddw %%mm1, %%mm0 \n\t" | |
1781 "paddw %%mm3, %%mm2 \n\t" | |
1782 "paddw %%mm2, %%mm0 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1783 "movd 6(%0, %%"REG_b"), %%mm4 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1784 "movd 6(%1, %%"REG_b"), %%mm1 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1785 "movd 9(%0, %%"REG_b"), %%mm2 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1786 "movd 9(%1, %%"REG_b"), %%mm3 \n\t" |
4619 | 1787 "punpcklbw %%mm7, %%mm4 \n\t" |
1788 "punpcklbw %%mm7, %%mm1 \n\t" | |
1789 "punpcklbw %%mm7, %%mm2 \n\t" | |
1790 "punpcklbw %%mm7, %%mm3 \n\t" | |
1791 "paddw %%mm1, %%mm4 \n\t" | |
1792 "paddw %%mm3, %%mm2 \n\t" | |
1793 "paddw %%mm4, %%mm2 \n\t" | |
1794 "psrlw $2, %%mm0 \n\t" | |
1795 "psrlw $2, %%mm2 \n\t" | |
1796 #endif | |
4923 | 1797 "movq "MANGLE(bgr2VCoeff)", %%mm1 \n\t" |
1798 "movq "MANGLE(bgr2VCoeff)", %%mm3 \n\t" | |
4619 | 1799 |
1800 "pmaddwd %%mm0, %%mm1 \n\t" | |
1801 "pmaddwd %%mm2, %%mm3 \n\t" | |
1802 "pmaddwd %%mm6, %%mm0 \n\t" | |
1803 "pmaddwd %%mm6, %%mm2 \n\t" | |
1804 #ifndef FAST_BGR2YV12 | |
1805 "psrad $8, %%mm0 \n\t" | |
1806 "psrad $8, %%mm1 \n\t" | |
1807 "psrad $8, %%mm2 \n\t" | |
1808 "psrad $8, %%mm3 \n\t" | |
1809 #endif | |
1810 "packssdw %%mm2, %%mm0 \n\t" | |
1811 "packssdw %%mm3, %%mm1 \n\t" | |
1812 "pmaddwd %%mm5, %%mm0 \n\t" | |
1813 "pmaddwd %%mm5, %%mm1 \n\t" | |
1814 "packssdw %%mm1, %%mm0 \n\t" // V1 V0 U1 U0 | |
1815 "psraw $7, %%mm0 \n\t" | |
1816 | |
1817 #if defined (HAVE_MMX2) || defined (HAVE_3DNOW) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1818 "movq 12(%0, %%"REG_b"), %%mm4 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1819 "movq 12(%1, %%"REG_b"), %%mm1 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1820 "movq 18(%0, %%"REG_b"), %%mm2 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1821 "movq 18(%1, %%"REG_b"), %%mm3 \n\t" |
4619 | 1822 PAVGB(%%mm1, %%mm4) |
1823 PAVGB(%%mm3, %%mm2) | |
1824 "movq %%mm4, %%mm1 \n\t" | |
1825 "movq %%mm2, %%mm3 \n\t" | |
1826 "psrlq $24, %%mm4 \n\t" | |
1827 "psrlq $24, %%mm2 \n\t" | |
1828 PAVGB(%%mm1, %%mm4) | |
1829 PAVGB(%%mm3, %%mm2) | |
1830 "punpcklbw %%mm7, %%mm4 \n\t" | |
1831 "punpcklbw %%mm7, %%mm2 \n\t" | |
1832 #else | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1833 "movd 12(%0, %%"REG_b"), %%mm4 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1834 "movd 12(%1, %%"REG_b"), %%mm1 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1835 "movd 15(%0, %%"REG_b"), %%mm2 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1836 "movd 15(%1, %%"REG_b"), %%mm3 \n\t" |
4619 | 1837 "punpcklbw %%mm7, %%mm4 \n\t" |
1838 "punpcklbw %%mm7, %%mm1 \n\t" | |
1839 "punpcklbw %%mm7, %%mm2 \n\t" | |
1840 "punpcklbw %%mm7, %%mm3 \n\t" | |
1841 "paddw %%mm1, %%mm4 \n\t" | |
1842 "paddw %%mm3, %%mm2 \n\t" | |
1843 "paddw %%mm2, %%mm4 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1844 "movd 18(%0, %%"REG_b"), %%mm5 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1845 "movd 18(%1, %%"REG_b"), %%mm1 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1846 "movd 21(%0, %%"REG_b"), %%mm2 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1847 "movd 21(%1, %%"REG_b"), %%mm3 \n\t" |
4619 | 1848 "punpcklbw %%mm7, %%mm5 \n\t" |
1849 "punpcklbw %%mm7, %%mm1 \n\t" | |
1850 "punpcklbw %%mm7, %%mm2 \n\t" | |
1851 "punpcklbw %%mm7, %%mm3 \n\t" | |
1852 "paddw %%mm1, %%mm5 \n\t" | |
1853 "paddw %%mm3, %%mm2 \n\t" | |
1854 "paddw %%mm5, %%mm2 \n\t" | |
4923 | 1855 "movq "MANGLE(w1111)", %%mm5 \n\t" |
4619 | 1856 "psrlw $2, %%mm4 \n\t" |
1857 "psrlw $2, %%mm2 \n\t" | |
1858 #endif | |
4923 | 1859 "movq "MANGLE(bgr2VCoeff)", %%mm1 \n\t" |
1860 "movq "MANGLE(bgr2VCoeff)", %%mm3 \n\t" | |
4619 | 1861 |
1862 "pmaddwd %%mm4, %%mm1 \n\t" | |
1863 "pmaddwd %%mm2, %%mm3 \n\t" | |
1864 "pmaddwd %%mm6, %%mm4 \n\t" | |
1865 "pmaddwd %%mm6, %%mm2 \n\t" | |
1866 #ifndef FAST_BGR2YV12 | |
1867 "psrad $8, %%mm4 \n\t" | |
1868 "psrad $8, %%mm1 \n\t" | |
1869 "psrad $8, %%mm2 \n\t" | |
1870 "psrad $8, %%mm3 \n\t" | |
1871 #endif | |
1872 "packssdw %%mm2, %%mm4 \n\t" | |
1873 "packssdw %%mm3, %%mm1 \n\t" | |
1874 "pmaddwd %%mm5, %%mm4 \n\t" | |
1875 "pmaddwd %%mm5, %%mm1 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1876 "add $24, %%"REG_b" \n\t" |
4619 | 1877 "packssdw %%mm1, %%mm4 \n\t" // V3 V2 U3 U2 |
1878 "psraw $7, %%mm4 \n\t" | |
1879 | |
1880 "movq %%mm0, %%mm1 \n\t" | |
1881 "punpckldq %%mm4, %%mm0 \n\t" | |
1882 "punpckhdq %%mm4, %%mm1 \n\t" | |
1883 "packsswb %%mm1, %%mm0 \n\t" | |
4923 | 1884 "paddb "MANGLE(bgr2UVOffset)", %%mm0 \n\t" |
4619 | 1885 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1886 "movd %%mm0, (%2, %%"REG_a") \n\t" |
4619 | 1887 "punpckhdq %%mm0, %%mm0 \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1888 "movd %%mm0, (%3, %%"REG_a") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1889 "add $4, %%"REG_a" \n\t" |
4619 | 1890 " js 1b \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1891 : : "r" (src1+width*6), "r" (src2+width*6), "r" (dstU+width), "r" (dstV+width), "g" ((long)-width) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
1892 : "%"REG_a, "%"REG_b |
4619 | 1893 ); |
4467 | 1894 #else |
1895 int i; | |
1896 for(i=0; i<width; i++) | |
1897 { | |
1898 int b= src1[6*i + 0] + src1[6*i + 3] + src2[6*i + 0] + src2[6*i + 3]; | |
1899 int g= src1[6*i + 1] + src1[6*i + 4] + src2[6*i + 1] + src2[6*i + 4]; | |
1900 int r= src1[6*i + 2] + src1[6*i + 5] + src2[6*i + 2] + src2[6*i + 5]; | |
1901 | |
1902 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128; | |
1903 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128; | |
1904 } | |
1905 #endif | |
1906 } | |
1907 | |
4578 | 1908 static inline void RENAME(bgr16ToY)(uint8_t *dst, uint8_t *src, int width) |
1909 { | |
1910 int i; | |
1911 for(i=0; i<width; i++) | |
1912 { | |
9433 | 1913 int d= ((uint16_t*)src)[i]; |
4578 | 1914 int b= d&0x1F; |
1915 int g= (d>>5)&0x3F; | |
1916 int r= (d>>11)&0x1F; | |
1917 | |
1918 dst[i]= ((2*RY*r + GY*g + 2*BY*b)>>(RGB2YUV_SHIFT-2)) + 16; | |
1919 } | |
1920 } | |
1921 | |
1922 static inline void RENAME(bgr16ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width) | |
1923 { | |
1924 int i; | |
1925 for(i=0; i<width; i++) | |
1926 { | |
9433 | 1927 int d0= ((uint32_t*)src1)[i]; |
1928 int d1= ((uint32_t*)src2)[i]; | |
4579 | 1929 |
1930 int dl= (d0&0x07E0F81F) + (d1&0x07E0F81F); | |
1931 int dh= ((d0>>5)&0x07C0F83F) + ((d1>>5)&0x07C0F83F); | |
1932 | |
1933 int dh2= (dh>>11) + (dh<<21); | |
1934 int d= dh2 + dl; | |
1935 | |
1936 int b= d&0x7F; | |
1937 int r= (d>>11)&0x7F; | |
1938 int g= d>>21; | |
4578 | 1939 dstU[i]= ((2*RU*r + GU*g + 2*BU*b)>>(RGB2YUV_SHIFT+2-2)) + 128; |
1940 dstV[i]= ((2*RV*r + GV*g + 2*BV*b)>>(RGB2YUV_SHIFT+2-2)) + 128; | |
1941 } | |
1942 } | |
1943 | |
4580 | 1944 static inline void RENAME(bgr15ToY)(uint8_t *dst, uint8_t *src, int width) |
1945 { | |
1946 int i; | |
1947 for(i=0; i<width; i++) | |
1948 { | |
9433 | 1949 int d= ((uint16_t*)src)[i]; |
4580 | 1950 int b= d&0x1F; |
1951 int g= (d>>5)&0x1F; | |
1952 int r= (d>>10)&0x1F; | |
1953 | |
1954 dst[i]= ((RY*r + GY*g + BY*b)>>(RGB2YUV_SHIFT-3)) + 16; | |
1955 } | |
1956 } | |
1957 | |
1958 static inline void RENAME(bgr15ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width) | |
1959 { | |
1960 int i; | |
1961 for(i=0; i<width; i++) | |
1962 { | |
9433 | 1963 int d0= ((uint32_t*)src1)[i]; |
1964 int d1= ((uint32_t*)src2)[i]; | |
4580 | 1965 |
1966 int dl= (d0&0x03E07C1F) + (d1&0x03E07C1F); | |
1967 int dh= ((d0>>5)&0x03E0F81F) + ((d1>>5)&0x03E0F81F); | |
1968 | |
1969 int dh2= (dh>>11) + (dh<<21); | |
1970 int d= dh2 + dl; | |
1971 | |
1972 int b= d&0x7F; | |
1973 int r= (d>>10)&0x7F; | |
1974 int g= d>>21; | |
1975 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2-3)) + 128; | |
1976 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2-3)) + 128; | |
1977 } | |
1978 } | |
1979 | |
1980 | |
4558 | 1981 static inline void RENAME(rgb32ToY)(uint8_t *dst, uint8_t *src, int width) |
1982 { | |
1983 int i; | |
1984 for(i=0; i<width; i++) | |
1985 { | |
9433 | 1986 int r= ((uint32_t*)src)[i]&0xFF; |
1987 int g= (((uint32_t*)src)[i]>>8)&0xFF; | |
9499 | 1988 int b= (((uint32_t*)src)[i]>>16)&0xFF; |
4558 | 1989 |
9433 | 1990 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT); |
4558 | 1991 } |
1992 } | |
1993 | |
1994 static inline void RENAME(rgb32ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width) | |
1995 { | |
1996 int i; | |
1997 for(i=0; i<width; i++) | |
1998 { | |
9433 | 1999 const int a= ((uint32_t*)src1)[2*i+0]; |
2000 const int e= ((uint32_t*)src1)[2*i+1]; | |
2001 const int c= ((uint32_t*)src2)[2*i+0]; | |
2002 const int d= ((uint32_t*)src2)[2*i+1]; | |
2003 const int l= (a&0xFF00FF) + (e&0xFF00FF) + (c&0xFF00FF) + (d&0xFF00FF); | |
2004 const int h= (a&0x00FF00) + (e&0x00FF00) + (c&0x00FF00) + (d&0x00FF00); | |
2005 const int r= l&0x3FF; | |
2006 const int g= h>>8; | |
2007 const int b= l>>16; | |
4558 | 2008 |
2009 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128; | |
2010 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128; | |
2011 } | |
2012 } | |
2013 | |
2014 static inline void RENAME(rgb24ToY)(uint8_t *dst, uint8_t *src, int width) | |
2015 { | |
2016 int i; | |
2017 for(i=0; i<width; i++) | |
2018 { | |
2019 int r= src[i*3+0]; | |
2020 int g= src[i*3+1]; | |
2021 int b= src[i*3+2]; | |
2022 | |
9433 | 2023 dst[i]= ((RY*r + GY*g + BY*b + (33<<(RGB2YUV_SHIFT-1)) )>>RGB2YUV_SHIFT); |
4558 | 2024 } |
2025 } | |
2026 | |
2027 static inline void RENAME(rgb24ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width) | |
2028 { | |
2029 int i; | |
2030 for(i=0; i<width; i++) | |
2031 { | |
2032 int r= src1[6*i + 0] + src1[6*i + 3] + src2[6*i + 0] + src2[6*i + 3]; | |
2033 int g= src1[6*i + 1] + src1[6*i + 4] + src2[6*i + 1] + src2[6*i + 4]; | |
2034 int b= src1[6*i + 2] + src1[6*i + 5] + src2[6*i + 2] + src2[6*i + 5]; | |
2035 | |
2036 dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+2)) + 128; | |
2037 dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+2)) + 128; | |
2038 } | |
2039 } | |
2040 | |
4467 | 2041 |
3272 | 2042 // Bilinear / Bicubic scaling |
2043 static inline void RENAME(hScale)(int16_t *dst, int dstW, uint8_t *src, int srcW, int xInc, | |
2044 int16_t *filter, int16_t *filterPos, int filterSize) | |
2045 { | |
2046 #ifdef HAVE_MMX | |
9921
61057de81510
mplayer idependant (not really yet) swscale example
michael
parents:
9499
diff
changeset
|
2047 assert(filterSize % 4 == 0 && filterSize>0); |
3272 | 2048 if(filterSize==4) // allways true for upscaling, sometimes for down too |
2049 { | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2050 long counter= -2*dstW; |
3272 | 2051 filter-= counter*2; |
2052 filterPos-= counter/2; | |
2053 dst-= counter/2; | |
2054 asm volatile( | |
2055 "pxor %%mm7, %%mm7 \n\t" | |
4248 | 2056 "movq "MANGLE(w02)", %%mm6 \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2057 "push %%"REG_BP" \n\t" // we use 7 regs here ... |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2058 "mov %%"REG_a", %%"REG_BP" \n\t" |
3272 | 2059 ".balign 16 \n\t" |
2060 "1: \n\t" | |
13733
c45cf718dfe8
10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents:
13720
diff
changeset
|
2061 "movzwl (%2, %%"REG_BP"), %%eax \n\t" |
c45cf718dfe8
10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents:
13720
diff
changeset
|
2062 "movzwl 2(%2, %%"REG_BP"), %%ebx\n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2063 "movq (%1, %%"REG_BP", 4), %%mm1\n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2064 "movq 8(%1, %%"REG_BP", 4), %%mm3\n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2065 "movd (%3, %%"REG_a"), %%mm0 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2066 "movd (%3, %%"REG_b"), %%mm2 \n\t" |
3272 | 2067 "punpcklbw %%mm7, %%mm0 \n\t" |
2068 "punpcklbw %%mm7, %%mm2 \n\t" | |
2069 "pmaddwd %%mm1, %%mm0 \n\t" | |
2070 "pmaddwd %%mm2, %%mm3 \n\t" | |
2071 "psrad $8, %%mm0 \n\t" | |
2072 "psrad $8, %%mm3 \n\t" | |
2073 "packssdw %%mm3, %%mm0 \n\t" | |
2074 "pmaddwd %%mm6, %%mm0 \n\t" | |
2075 "packssdw %%mm0, %%mm0 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2076 "movd %%mm0, (%4, %%"REG_BP") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2077 "add $4, %%"REG_BP" \n\t" |
3272 | 2078 " jnc 1b \n\t" |
3352 | 2079 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2080 "pop %%"REG_BP" \n\t" |
3272 | 2081 : "+a" (counter) |
2082 : "c" (filter), "d" (filterPos), "S" (src), "D" (dst) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2083 : "%"REG_b |
3272 | 2084 ); |
2085 } | |
2086 else if(filterSize==8) | |
2087 { | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2088 long counter= -2*dstW; |
3272 | 2089 filter-= counter*4; |
2090 filterPos-= counter/2; | |
2091 dst-= counter/2; | |
2092 asm volatile( | |
2093 "pxor %%mm7, %%mm7 \n\t" | |
4248 | 2094 "movq "MANGLE(w02)", %%mm6 \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2095 "push %%"REG_BP" \n\t" // we use 7 regs here ... |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2096 "mov %%"REG_a", %%"REG_BP" \n\t" |
3272 | 2097 ".balign 16 \n\t" |
2098 "1: \n\t" | |
13733
c45cf718dfe8
10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents:
13720
diff
changeset
|
2099 "movzwl (%2, %%"REG_BP"), %%eax \n\t" |
c45cf718dfe8
10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents:
13720
diff
changeset
|
2100 "movzwl 2(%2, %%"REG_BP"), %%ebx\n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2101 "movq (%1, %%"REG_BP", 8), %%mm1\n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2102 "movq 16(%1, %%"REG_BP", 8), %%mm3\n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2103 "movd (%3, %%"REG_a"), %%mm0 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2104 "movd (%3, %%"REG_b"), %%mm2 \n\t" |
3272 | 2105 "punpcklbw %%mm7, %%mm0 \n\t" |
2106 "punpcklbw %%mm7, %%mm2 \n\t" | |
2107 "pmaddwd %%mm1, %%mm0 \n\t" | |
2108 "pmaddwd %%mm2, %%mm3 \n\t" | |
2316
bcb229557e9b
fixed alignment (static variables where sometimes not 8-byte aligned)
michael
parents:
2297
diff
changeset
|
2109 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2110 "movq 8(%1, %%"REG_BP", 8), %%mm1\n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2111 "movq 24(%1, %%"REG_BP", 8), %%mm5\n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2112 "movd 4(%3, %%"REG_a"), %%mm4 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2113 "movd 4(%3, %%"REG_b"), %%mm2 \n\t" |
3272 | 2114 "punpcklbw %%mm7, %%mm4 \n\t" |
2115 "punpcklbw %%mm7, %%mm2 \n\t" | |
2116 "pmaddwd %%mm1, %%mm4 \n\t" | |
2117 "pmaddwd %%mm2, %%mm5 \n\t" | |
2118 "paddd %%mm4, %%mm0 \n\t" | |
2119 "paddd %%mm5, %%mm3 \n\t" | |
2120 | |
2121 "psrad $8, %%mm0 \n\t" | |
2122 "psrad $8, %%mm3 \n\t" | |
2123 "packssdw %%mm3, %%mm0 \n\t" | |
2124 "pmaddwd %%mm6, %%mm0 \n\t" | |
2125 "packssdw %%mm0, %%mm0 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2126 "movd %%mm0, (%4, %%"REG_BP") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2127 "add $4, %%"REG_BP" \n\t" |
3272 | 2128 " jnc 1b \n\t" |
3344 | 2129 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2130 "pop %%"REG_BP" \n\t" |
3272 | 2131 : "+a" (counter) |
2132 : "c" (filter), "d" (filterPos), "S" (src), "D" (dst) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2133 : "%"REG_b |
3272 | 2134 ); |
2135 } | |
2136 else | |
2137 { | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2138 long counter= -2*dstW; |
3272 | 2139 // filter-= counter*filterSize/2; |
2140 filterPos-= counter/2; | |
2141 dst-= counter/2; | |
2142 asm volatile( | |
2143 "pxor %%mm7, %%mm7 \n\t" | |
4248 | 2144 "movq "MANGLE(w02)", %%mm6 \n\t" |
3272 | 2145 ".balign 16 \n\t" |
2146 "1: \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2147 "mov %2, %%"REG_c" \n\t" |
13733
c45cf718dfe8
10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents:
13720
diff
changeset
|
2148 "movzwl (%%"REG_c", %0), %%eax \n\t" |
c45cf718dfe8
10000l : fix a crash on x86 due to an horrible mistake in my x86_64 patch
aurel
parents:
13720
diff
changeset
|
2149 "movzwl 2(%%"REG_c", %0), %%ebx \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2150 "mov %5, %%"REG_c" \n\t" |
3272 | 2151 "pxor %%mm4, %%mm4 \n\t" |
2152 "pxor %%mm5, %%mm5 \n\t" | |
2153 "2: \n\t" | |
2154 "movq (%1), %%mm1 \n\t" | |
2155 "movq (%1, %6), %%mm3 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2156 "movd (%%"REG_c", %%"REG_a"), %%mm0\n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2157 "movd (%%"REG_c", %%"REG_b"), %%mm2\n\t" |
3272 | 2158 "punpcklbw %%mm7, %%mm0 \n\t" |
2159 "punpcklbw %%mm7, %%mm2 \n\t" | |
2160 "pmaddwd %%mm1, %%mm0 \n\t" | |
2161 "pmaddwd %%mm2, %%mm3 \n\t" | |
2162 "paddd %%mm3, %%mm5 \n\t" | |
2163 "paddd %%mm0, %%mm4 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2164 "add $8, %1 \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2165 "add $4, %%"REG_c" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2166 "cmp %4, %%"REG_c" \n\t" |
3272 | 2167 " jb 2b \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2168 "add %6, %1 \n\t" |
3272 | 2169 "psrad $8, %%mm4 \n\t" |
2170 "psrad $8, %%mm5 \n\t" | |
2171 "packssdw %%mm5, %%mm4 \n\t" | |
2172 "pmaddwd %%mm6, %%mm4 \n\t" | |
2173 "packssdw %%mm4, %%mm4 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2174 "mov %3, %%"REG_a" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2175 "movd %%mm4, (%%"REG_a", %0) \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2176 "add $4, %0 \n\t" |
3272 | 2177 " jnc 1b \n\t" |
3344 | 2178 |
3641 | 2179 : "+r" (counter), "+r" (filter) |
2180 : "m" (filterPos), "m" (dst), "m"(src+filterSize), | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2181 "m" (src), "r" ((long)filterSize*2) |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2182 : "%"REG_b, "%"REG_a, "%"REG_c |
3272 | 2183 ); |
2184 } | |
2185 #else | |
12130
2ef24558b732
AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents:
12017
diff
changeset
|
2186 #ifdef HAVE_ALTIVEC |
2ef24558b732
AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents:
12017
diff
changeset
|
2187 hScale_altivec_real(dst, dstW, src, srcW, xInc, filter, filterPos, filterSize); |
2ef24558b732
AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents:
12017
diff
changeset
|
2188 #else |
3272 | 2189 int i; |
2190 for(i=0; i<dstW; i++) | |
2191 { | |
2192 int j; | |
2193 int srcPos= filterPos[i]; | |
2194 int val=0; | |
3344 | 2195 // printf("filterPos: %d\n", filterPos[i]); |
3272 | 2196 for(j=0; j<filterSize; j++) |
2197 { | |
2198 // printf("filter: %d, src: %d\n", filter[i], src[srcPos + j]); | |
2199 val += ((int)src[srcPos + j])*filter[filterSize*i + j]; | |
2200 } | |
2201 // filter += hFilterSize; | |
2202 dst[i] = MIN(MAX(0, val>>7), (1<<15)-1); // the cubic equation does overflow ... | |
2203 // dst[i] = val>>7; | |
2204 } | |
2205 #endif | |
12130
2ef24558b732
AltiVec hScale, all size patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michael
parents:
12017
diff
changeset
|
2206 #endif |
3272 | 2207 } |
2208 // *** horizontal scale Y line to temp buffer | |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2209 static inline void RENAME(hyscale)(uint16_t *dst, int dstWidth, uint8_t *src, int srcW, int xInc, |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2210 int flags, int canMMX2BeUsed, int16_t *hLumFilter, |
4467 | 2211 int16_t *hLumFilterPos, int hLumFilterSize, void *funnyYCode, |
5452 | 2212 int srcFormat, uint8_t *formatConvBuffer, int16_t *mmx2Filter, |
2213 int32_t *mmx2FilterPos) | |
2469 | 2214 { |
4467 | 2215 if(srcFormat==IMGFMT_YUY2) |
2216 { | |
2217 RENAME(yuy2ToY)(formatConvBuffer, src, srcW); | |
2218 src= formatConvBuffer; | |
2219 } | |
9071 | 2220 else if(srcFormat==IMGFMT_UYVY) |
2221 { | |
2222 RENAME(uyvyToY)(formatConvBuffer, src, srcW); | |
2223 src= formatConvBuffer; | |
2224 } | |
4467 | 2225 else if(srcFormat==IMGFMT_BGR32) |
2226 { | |
2227 RENAME(bgr32ToY)(formatConvBuffer, src, srcW); | |
2228 src= formatConvBuffer; | |
2229 } | |
2230 else if(srcFormat==IMGFMT_BGR24) | |
2231 { | |
2232 RENAME(bgr24ToY)(formatConvBuffer, src, srcW); | |
2233 src= formatConvBuffer; | |
2234 } | |
4578 | 2235 else if(srcFormat==IMGFMT_BGR16) |
2236 { | |
2237 RENAME(bgr16ToY)(formatConvBuffer, src, srcW); | |
2238 src= formatConvBuffer; | |
2239 } | |
4580 | 2240 else if(srcFormat==IMGFMT_BGR15) |
2241 { | |
2242 RENAME(bgr15ToY)(formatConvBuffer, src, srcW); | |
2243 src= formatConvBuffer; | |
2244 } | |
4558 | 2245 else if(srcFormat==IMGFMT_RGB32) |
2246 { | |
2247 RENAME(rgb32ToY)(formatConvBuffer, src, srcW); | |
2248 src= formatConvBuffer; | |
2249 } | |
2250 else if(srcFormat==IMGFMT_RGB24) | |
2251 { | |
2252 RENAME(rgb24ToY)(formatConvBuffer, src, srcW); | |
2253 src= formatConvBuffer; | |
2254 } | |
4467 | 2255 |
3352 | 2256 #ifdef HAVE_MMX |
11000 | 2257 // use the new MMX scaler if the mmx2 can't be used (its faster than the x86asm one) |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2258 if(!(flags&SWS_FAST_BILINEAR) || (!canMMX2BeUsed)) |
3352 | 2259 #else |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2260 if(!(flags&SWS_FAST_BILINEAR)) |
3352 | 2261 #endif |
3272 | 2262 { |
2263 RENAME(hScale)(dst, dstWidth, src, srcW, xInc, hLumFilter, hLumFilterPos, hLumFilterSize); | |
2264 } | |
2265 else // Fast Bilinear upscale / crap downscale | |
2266 { | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2267 #if defined(ARCH_X86) || defined(ARCH_X86_64) |
2469 | 2268 #ifdef HAVE_MMX2 |
2671 | 2269 int i; |
2469 | 2270 if(canMMX2BeUsed) |
2271 { | |
2272 asm volatile( | |
2273 "pxor %%mm7, %%mm7 \n\t" | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2274 "mov %0, %%"REG_c" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2275 "mov %1, %%"REG_D" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2276 "mov %2, %%"REG_d" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2277 "mov %3, %%"REG_b" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2278 "xor %%"REG_a", %%"REG_a" \n\t" // i |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2279 PREFETCH" (%%"REG_c") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2280 PREFETCH" 32(%%"REG_c") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2281 PREFETCH" 64(%%"REG_c") \n\t" |
2520 | 2282 |
14556 | 2283 #ifdef ARCH_X86_64 |
2284 | |
2469 | 2285 #define FUNNY_Y_CODE \ |
14556 | 2286 "movl (%%"REG_b"), %%esi \n\t"\ |
5452 | 2287 "call *%4 \n\t"\ |
14556 | 2288 "movl (%%"REG_b", %%"REG_a"), %%esi\n\t"\ |
2289 "add %%"REG_S", %%"REG_c" \n\t"\ | |
14536
6f13379b1464
100l, fix broken AMD64 patch. To whoever applied it: Did you actually _try_
reimar
parents:
13733
diff
changeset
|
2290 "add %%"REG_a", %%"REG_D" \n\t"\ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2291 "xor %%"REG_a", %%"REG_a" \n\t"\ |
2520 | 2292 |
14556 | 2293 #else |
2294 | |
2295 #define FUNNY_Y_CODE \ | |
2296 "movl (%%"REG_b"), %%esi \n\t"\ | |
2297 "call *%4 \n\t"\ | |
2298 "addl (%%"REG_b", %%"REG_a"), %%"REG_c"\n\t"\ | |
2299 "add %%"REG_a", %%"REG_D" \n\t"\ | |
2300 "xor %%"REG_a", %%"REG_a" \n\t"\ | |
2301 | |
2302 #endif | |
2303 | |
2469 | 2304 FUNNY_Y_CODE |
2305 FUNNY_Y_CODE | |
2306 FUNNY_Y_CODE | |
2307 FUNNY_Y_CODE | |
2308 FUNNY_Y_CODE | |
2309 FUNNY_Y_CODE | |
2310 FUNNY_Y_CODE | |
2311 FUNNY_Y_CODE | |
2312 | |
5452 | 2313 :: "m" (src), "m" (dst), "m" (mmx2Filter), "m" (mmx2FilterPos), |
2314 "m" (funnyYCode) | |
14536
6f13379b1464
100l, fix broken AMD64 patch. To whoever applied it: Did you actually _try_
reimar
parents:
13733
diff
changeset
|
2315 : "%"REG_a, "%"REG_b, "%"REG_c, "%"REG_d, "%"REG_S, "%"REG_D |
2469 | 2316 ); |
3215 | 2317 for(i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--) dst[i] = src[srcW-1]*128; |
2469 | 2318 } |
2319 else | |
2320 { | |
2321 #endif | |
2322 //NO MMX just normal asm ... | |
2323 asm volatile( | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2324 "xor %%"REG_a", %%"REG_a" \n\t" // i |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2325 "xor %%"REG_b", %%"REG_b" \n\t" // xx |
2469 | 2326 "xorl %%ecx, %%ecx \n\t" // 2*xalpha |
2800
7847d6b7ad3d
.balign or we¡ll align by 64kb on some architectures
michael
parents:
2799
diff
changeset
|
2327 ".balign 16 \n\t" |
2469 | 2328 "1: \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2329 "movzbl (%0, %%"REG_b"), %%edi \n\t" //src[xx] |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2330 "movzbl 1(%0, %%"REG_b"), %%esi \n\t" //src[xx+1] |
2469 | 2331 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx] |
2332 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha | |
2333 "shll $16, %%edi \n\t" | |
2334 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2335 "mov %1, %%"REG_D" \n\t" |
2469 | 2336 "shrl $9, %%esi \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2337 "movw %%si, (%%"REG_D", %%"REG_a", 2)\n\t" |
2469 | 2338 "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2339 "adc %3, %%"REG_b" \n\t" //xx+= xInc>>8 + carry |
2469 | 2340 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2341 "movzbl (%0, %%"REG_b"), %%edi \n\t" //src[xx] |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2342 "movzbl 1(%0, %%"REG_b"), %%esi \n\t" //src[xx+1] |
2469 | 2343 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx] |
2344 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha | |
2345 "shll $16, %%edi \n\t" | |
2346 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2347 "mov %1, %%"REG_D" \n\t" |
2469 | 2348 "shrl $9, %%esi \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2349 "movw %%si, 2(%%"REG_D", %%"REG_a", 2)\n\t" |
2469 | 2350 "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2351 "adc %3, %%"REG_b" \n\t" //xx+= xInc>>8 + carry |
2469 | 2352 |
2353 | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2354 "add $2, %%"REG_a" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2355 "cmp %2, %%"REG_a" \n\t" |
2469 | 2356 " jb 1b \n\t" |
2357 | |
2358 | |
2359 :: "r" (src), "m" (dst), "m" (dstWidth), "m" (xInc>>16), "m" (xInc&0xFFFF) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2360 : "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi" |
2469 | 2361 ); |
2362 #ifdef HAVE_MMX2 | |
11000 | 2363 } //if MMX2 can't be used |
2469 | 2364 #endif |
2365 #else | |
2671 | 2366 int i; |
2367 unsigned int xpos=0; | |
2368 for(i=0;i<dstWidth;i++) | |
2369 { | |
2370 register unsigned int xx=xpos>>16; | |
2371 register unsigned int xalpha=(xpos&0xFFFF)>>9; | |
2372 dst[i]= (src[xx]<<7) + (src[xx+1] - src[xx])*xalpha; | |
2373 xpos+=xInc; | |
2374 } | |
2469 | 2375 #endif |
3272 | 2376 } |
2469 | 2377 } |
2378 | |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2379 inline static void RENAME(hcscale)(uint16_t *dst, int dstWidth, uint8_t *src1, uint8_t *src2, |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2380 int srcW, int xInc, int flags, int canMMX2BeUsed, int16_t *hChrFilter, |
4467 | 2381 int16_t *hChrFilterPos, int hChrFilterSize, void *funnyUVCode, |
5452 | 2382 int srcFormat, uint8_t *formatConvBuffer, int16_t *mmx2Filter, |
2383 int32_t *mmx2FilterPos) | |
2469 | 2384 { |
4467 | 2385 if(srcFormat==IMGFMT_YUY2) |
2386 { | |
2387 RENAME(yuy2ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); | |
2388 src1= formatConvBuffer; | |
2389 src2= formatConvBuffer+2048; | |
2390 } | |
9071 | 2391 else if(srcFormat==IMGFMT_UYVY) |
2392 { | |
2393 RENAME(uyvyToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); | |
2394 src1= formatConvBuffer; | |
2395 src2= formatConvBuffer+2048; | |
2396 } | |
4467 | 2397 else if(srcFormat==IMGFMT_BGR32) |
2398 { | |
2399 RENAME(bgr32ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); | |
2400 src1= formatConvBuffer; | |
2401 src2= formatConvBuffer+2048; | |
2402 } | |
2403 else if(srcFormat==IMGFMT_BGR24) | |
2404 { | |
2405 RENAME(bgr24ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); | |
2406 src1= formatConvBuffer; | |
2407 src2= formatConvBuffer+2048; | |
2408 } | |
4578 | 2409 else if(srcFormat==IMGFMT_BGR16) |
2410 { | |
2411 RENAME(bgr16ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); | |
2412 src1= formatConvBuffer; | |
2413 src2= formatConvBuffer+2048; | |
2414 } | |
4580 | 2415 else if(srcFormat==IMGFMT_BGR15) |
2416 { | |
2417 RENAME(bgr15ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); | |
2418 src1= formatConvBuffer; | |
2419 src2= formatConvBuffer+2048; | |
2420 } | |
4558 | 2421 else if(srcFormat==IMGFMT_RGB32) |
2422 { | |
2423 RENAME(rgb32ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); | |
2424 src1= formatConvBuffer; | |
2425 src2= formatConvBuffer+2048; | |
2426 } | |
2427 else if(srcFormat==IMGFMT_RGB24) | |
2428 { | |
2429 RENAME(rgb24ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); | |
2430 src1= formatConvBuffer; | |
2431 src2= formatConvBuffer+2048; | |
2432 } | |
4481 | 2433 else if(isGray(srcFormat)) |
2434 { | |
2435 return; | |
2436 } | |
4467 | 2437 |
3352 | 2438 #ifdef HAVE_MMX |
11000 | 2439 // use the new MMX scaler if the mmx2 can't be used (its faster than the x86asm one) |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2440 if(!(flags&SWS_FAST_BILINEAR) || (!canMMX2BeUsed)) |
3352 | 2441 #else |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2442 if(!(flags&SWS_FAST_BILINEAR)) |
3352 | 2443 #endif |
3272 | 2444 { |
2445 RENAME(hScale)(dst , dstWidth, src1, srcW, xInc, hChrFilter, hChrFilterPos, hChrFilterSize); | |
2446 RENAME(hScale)(dst+2048, dstWidth, src2, srcW, xInc, hChrFilter, hChrFilterPos, hChrFilterSize); | |
2447 } | |
2448 else // Fast Bilinear upscale / crap downscale | |
2449 { | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2450 #if defined(ARCH_X86) || defined(ARCH_X86_64) |
2469 | 2451 #ifdef HAVE_MMX2 |
2671 | 2452 int i; |
2469 | 2453 if(canMMX2BeUsed) |
2454 { | |
2455 asm volatile( | |
5452 | 2456 "pxor %%mm7, %%mm7 \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2457 "mov %0, %%"REG_c" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2458 "mov %1, %%"REG_D" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2459 "mov %2, %%"REG_d" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2460 "mov %3, %%"REG_b" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2461 "xor %%"REG_a", %%"REG_a" \n\t" // i |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2462 PREFETCH" (%%"REG_c") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2463 PREFETCH" 32(%%"REG_c") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2464 PREFETCH" 64(%%"REG_c") \n\t" |
5452 | 2465 |
14556 | 2466 #ifdef ARCH_X86_64 |
2467 | |
5452 | 2468 #define FUNNY_UV_CODE \ |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2469 "movl (%%"REG_b"), %%esi \n\t"\ |
5452 | 2470 "call *%4 \n\t"\ |
14556 | 2471 "movl (%%"REG_b", %%"REG_a"), %%esi\n\t"\ |
2472 "add %%"REG_S", %%"REG_c" \n\t"\ | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2473 "add %%"REG_a", %%"REG_D" \n\t"\ |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2474 "xor %%"REG_a", %%"REG_a" \n\t"\ |
2469 | 2475 |
14556 | 2476 #else |
2477 | |
2478 #define FUNNY_UV_CODE \ | |
2479 "movl (%%"REG_b"), %%esi \n\t"\ | |
2480 "call *%4 \n\t"\ | |
2481 "addl (%%"REG_b", %%"REG_a"), %%"REG_c"\n\t"\ | |
2482 "add %%"REG_a", %%"REG_D" \n\t"\ | |
2483 "xor %%"REG_a", %%"REG_a" \n\t"\ | |
2484 | |
2485 #endif | |
2486 | |
5452 | 2487 FUNNY_UV_CODE |
2488 FUNNY_UV_CODE | |
2489 FUNNY_UV_CODE | |
2490 FUNNY_UV_CODE | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2491 "xor %%"REG_a", %%"REG_a" \n\t" // i |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2492 "mov %5, %%"REG_c" \n\t" // src |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2493 "mov %1, %%"REG_D" \n\t" // buf1 |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2494 "add $4096, %%"REG_D" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2495 PREFETCH" (%%"REG_c") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2496 PREFETCH" 32(%%"REG_c") \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2497 PREFETCH" 64(%%"REG_c") \n\t" |
2469 | 2498 |
5452 | 2499 FUNNY_UV_CODE |
2500 FUNNY_UV_CODE | |
2501 FUNNY_UV_CODE | |
2502 FUNNY_UV_CODE | |
2469 | 2503 |
5452 | 2504 :: "m" (src1), "m" (dst), "m" (mmx2Filter), "m" (mmx2FilterPos), |
2505 "m" (funnyUVCode), "m" (src2) | |
14556 | 2506 : "%"REG_a, "%"REG_b, "%"REG_c, "%"REG_d, "%"REG_S, "%"REG_D |
5452 | 2507 ); |
3344 | 2508 for(i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--) |
2469 | 2509 { |
3344 | 2510 // printf("%d %d %d\n", dstWidth, i, srcW); |
2511 dst[i] = src1[srcW-1]*128; | |
2512 dst[i+2048] = src2[srcW-1]*128; | |
2469 | 2513 } |
2514 } | |
2515 else | |
2516 { | |
2517 #endif | |
2518 asm volatile( | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2519 "xor %%"REG_a", %%"REG_a" \n\t" // i |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2520 "xor %%"REG_b", %%"REG_b" \n\t" // xx |
2469 | 2521 "xorl %%ecx, %%ecx \n\t" // 2*xalpha |
2800
7847d6b7ad3d
.balign or we¡ll align by 64kb on some architectures
michael
parents:
2799
diff
changeset
|
2522 ".balign 16 \n\t" |
2469 | 2523 "1: \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2524 "mov %0, %%"REG_S" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2525 "movzbl (%%"REG_S", %%"REG_b"), %%edi \n\t" //src[xx] |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2526 "movzbl 1(%%"REG_S", %%"REG_b"), %%esi \n\t" //src[xx+1] |
2469 | 2527 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx] |
2528 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha | |
2529 "shll $16, %%edi \n\t" | |
2530 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2531 "mov %1, %%"REG_D" \n\t" |
2469 | 2532 "shrl $9, %%esi \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2533 "movw %%si, (%%"REG_d", %%"REG_a", 2)\n\t" |
2469 | 2534 |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2535 "movzbl (%5, %%"REG_b"), %%edi \n\t" //src[xx] |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2536 "movzbl 1(%5, %%"REG_b"), %%esi \n\t" //src[xx+1] |
2469 | 2537 "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx] |
2538 "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha | |
2539 "shll $16, %%edi \n\t" | |
2540 "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha) | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2541 "mov %1, %%"REG_D" \n\t" |
2469 | 2542 "shrl $9, %%esi \n\t" |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2543 "movw %%si, 4096(%%"REG_D", %%"REG_a", 2)\n\t" |
2469 | 2544 |
2545 "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2546 "adc %3, %%"REG_b" \n\t" //xx+= xInc>>8 + carry |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2547 "add $1, %%"REG_a" \n\t" |
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2548 "cmp %2, %%"REG_a" \n\t" |
2469 | 2549 " jb 1b \n\t" |
2550 | |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2551 :: "m" (src1), "m" (dst), "m" ((long)dstWidth), "m" ((long)(xInc>>16)), "m" ((xInc&0xFFFF)), |
2469 | 2552 "r" (src2) |
13720
821f464b4d90
adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents:
12698
diff
changeset
|
2553 : "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi" |
2469 | 2554 ); |
2555 #ifdef HAVE_MMX2 | |
11000 | 2556 } //if MMX2 can't be used |
2469 | 2557 #endif |
2558 #else | |
2671 | 2559 int i; |
2560 unsigned int xpos=0; | |
2561 for(i=0;i<dstWidth;i++) | |
2562 { | |
2563 register unsigned int xx=xpos>>16; | |
2564 register unsigned int xalpha=(xpos&0xFFFF)>>9; | |
2565 dst[i]=(src1[xx]*(xalpha^127)+src1[xx+1]*xalpha); | |
2566 dst[i+2048]=(src2[xx]*(xalpha^127)+src2[xx+1]*xalpha); | |
2566 | 2567 /* slower |
2568 dst[i]= (src1[xx]<<7) + (src1[xx+1] - src1[xx])*xalpha; | |
2569 dst[i+2048]=(src2[xx]<<7) + (src2[xx+1] - src2[xx])*xalpha; | |
2570 */ | |
2671 | 2571 xpos+=xInc; |
2572 } | |
2469 | 2573 #endif |
3272 | 2574 } |
2575 } | |
2576 | |
9499 | 2577 static int RENAME(swScale)(SwsContext *c, uint8_t* src[], int srcStride[], int srcSliceY, |
2578 int srcSliceH, uint8_t* dst[], int dstStride[]){ | |
3344 | 2579 |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2580 /* load a few things into local vars to make the code more readable? and faster */ |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2581 const int srcW= c->srcW; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2582 const int dstW= c->dstW; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2583 const int dstH= c->dstH; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2584 const int chrDstW= c->chrDstW; |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2585 const int chrSrcW= c->chrSrcW; |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2586 const int lumXInc= c->lumXInc; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2587 const int chrXInc= c->chrXInc; |
4295 | 2588 const int dstFormat= c->dstFormat; |
6503 | 2589 const int srcFormat= c->srcFormat; |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2590 const int flags= c->flags; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2591 const int canMMX2BeUsed= c->canMMX2BeUsed; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2592 int16_t *vLumFilterPos= c->vLumFilterPos; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2593 int16_t *vChrFilterPos= c->vChrFilterPos; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2594 int16_t *hLumFilterPos= c->hLumFilterPos; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2595 int16_t *hChrFilterPos= c->hChrFilterPos; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2596 int16_t *vLumFilter= c->vLumFilter; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2597 int16_t *vChrFilter= c->vChrFilter; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2598 int16_t *hLumFilter= c->hLumFilter; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2599 int16_t *hChrFilter= c->hChrFilter; |
9413 | 2600 int32_t *lumMmxFilter= c->lumMmxFilter; |
2601 int32_t *chrMmxFilter= c->chrMmxFilter; | |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2602 const int vLumFilterSize= c->vLumFilterSize; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2603 const int vChrFilterSize= c->vChrFilterSize; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2604 const int hLumFilterSize= c->hLumFilterSize; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2605 const int hChrFilterSize= c->hChrFilterSize; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2606 int16_t **lumPixBuf= c->lumPixBuf; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2607 int16_t **chrPixBuf= c->chrPixBuf; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2608 const int vLumBufSize= c->vLumBufSize; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2609 const int vChrBufSize= c->vChrBufSize; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2610 uint8_t *funnyYCode= c->funnyYCode; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2611 uint8_t *funnyUVCode= c->funnyUVCode; |
4467 | 2612 uint8_t *formatConvBuffer= c->formatConvBuffer; |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2613 const int chrSrcSliceY= srcSliceY >> c->chrSrcVSubSample; |
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2614 const int chrSrcSliceH= -((-srcSliceH) >> c->chrSrcVSubSample); |
9494
543ab3909b78
sws_ prefix, more seperation between internal & external swscaler API
michael
parents:
9476
diff
changeset
|
2615 int lastDstY; |
3344 | 2616 |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2617 /* vars whch will change and which we need to storw back in the context */ |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2618 int dstY= c->dstY; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2619 int lumBufIndex= c->lumBufIndex; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2620 int chrBufIndex= c->chrBufIndex; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2621 int lastInLumBuf= c->lastInLumBuf; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2622 int lastInChrBuf= c->lastInChrBuf; |
6540 | 2623 |
2624 if(isPacked(c->srcFormat)){ | |
4467 | 2625 src[0]= |
2626 src[1]= | |
9499 | 2627 src[2]= src[0]; |
6540 | 2628 srcStride[0]= |
4467 | 2629 srcStride[1]= |
9499 | 2630 srcStride[2]= srcStride[0]; |
4467 | 2631 } |
6540 | 2632 srcStride[1]<<= c->vChrDrop; |
2633 srcStride[2]<<= c->vChrDrop; | |
4419 | 2634 |
6517 | 2635 // printf("swscale %X %X %X -> %X %X %X\n", (int)src[0], (int)src[1], (int)src[2], |
2636 // (int)dst[0], (int)dst[1], (int)dst[2]); | |
2637 | |
2638 #if 0 //self test FIXME move to a vfilter or something | |
2639 { | |
2640 static volatile int i=0; | |
2641 i++; | |
2642 if(srcFormat==IMGFMT_YV12 && i==1 && srcSliceH>= c->srcH) | |
2643 selfTest(src, srcStride, c->srcW, c->srcH); | |
2644 i--; | |
2645 } | |
2646 #endif | |
4554 | 2647 |
2648 //printf("sws Strides:%d %d %d -> %d %d %d\n", srcStride[0],srcStride[1],srcStride[2], | |
2649 //dstStride[0],dstStride[1],dstStride[2]); | |
4419 | 2650 |
2651 if(dstStride[0]%8 !=0 || dstStride[1]%8 !=0 || dstStride[2]%8 !=0) | |
2652 { | |
2653 static int firstTime=1; //FIXME move this into the context perhaps | |
2654 if(flags & SWS_PRINT_INFO && firstTime) | |
2655 { | |
9970 | 2656 MSG_WARN("SwScaler: Warning: dstStride is not aligned!\n" |
4419 | 2657 "SwScaler: ->cannot do aligned memory acesses anymore\n"); |
2658 firstTime=0; | |
2659 } | |
2660 } | |
3344 | 2661 |
4467 | 2662 /* Note the user might start scaling the picture in the middle so this will not get executed |
2663 this is not really intended but works currently, so ppl might do it */ | |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2664 if(srcSliceY ==0){ |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2665 lumBufIndex=0; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2666 chrBufIndex=0; |
4467 | 2667 dstY=0; |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2668 lastInLumBuf= -1; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2669 lastInChrBuf= -1; |
3272 | 2670 } |
3344 | 2671 |
9494
543ab3909b78
sws_ prefix, more seperation between internal & external swscaler API
michael
parents:
9476
diff
changeset
|
2672 lastDstY= dstY; |
543ab3909b78
sws_ prefix, more seperation between internal & external swscaler API
michael
parents:
9476
diff
changeset
|
2673 |
3344 | 2674 for(;dstY < dstH; dstY++){ |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2675 unsigned char *dest =dst[0]+dstStride[0]*dstY; |
6520 | 2676 const int chrDstY= dstY>>c->chrDstVSubSample; |
2677 unsigned char *uDest=dst[1]+dstStride[1]*chrDstY; | |
2678 unsigned char *vDest=dst[2]+dstStride[2]*chrDstY; | |
3344 | 2679 |
2680 const int firstLumSrcY= vLumFilterPos[dstY]; //First line needed as input | |
2681 const int firstChrSrcY= vChrFilterPos[chrDstY]; //First line needed as input | |
2682 const int lastLumSrcY= firstLumSrcY + vLumFilterSize -1; // Last line needed as input | |
2683 const int lastChrSrcY= firstChrSrcY + vChrFilterSize -1; // Last line needed as input | |
2684 | |
11122 | 2685 //printf("dstY:%d dstH:%d firstLumSrcY:%d lastInLumBuf:%d vLumBufSize: %d vChrBufSize: %d slice: %d %d vLumFilterSize: %d firstChrSrcY: %d vChrFilterSize: %d c->chrSrcVSubSample: %d\n", |
2686 // dstY, dstH, firstLumSrcY, lastInLumBuf, vLumBufSize, vChrBufSize, srcSliceY, srcSliceH, vLumFilterSize, firstChrSrcY, vChrFilterSize, c->chrSrcVSubSample); | |
4290
1f8ceb12284d
general convolution filtering of the source picture
michael
parents:
4276
diff
changeset
|
2687 //handle holes (FAST_BILINEAR & weird filters) |
1f8ceb12284d
general convolution filtering of the source picture
michael
parents:
4276
diff
changeset
|
2688 if(firstLumSrcY > lastInLumBuf) lastInLumBuf= firstLumSrcY-1; |
1f8ceb12284d
general convolution filtering of the source picture
michael
parents:
4276
diff
changeset
|
2689 if(firstChrSrcY > lastInChrBuf) lastInChrBuf= firstChrSrcY-1; |
1f8ceb12284d
general convolution filtering of the source picture
michael
parents:
4276
diff
changeset
|
2690 //printf("%d %d %d\n", firstChrSrcY, lastInChrBuf, vChrBufSize); |
3344 | 2691 ASSERT(firstLumSrcY >= lastInLumBuf - vLumBufSize + 1) |
2692 ASSERT(firstChrSrcY >= lastInChrBuf - vChrBufSize + 1) | |
2216 | 2693 |
3344 | 2694 // Do we have enough lines in this slice to output the dstY line |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2695 if(lastLumSrcY < srcSliceY + srcSliceH && lastChrSrcY < -((-srcSliceY - srcSliceH)>>c->chrSrcVSubSample)) |
2469 | 2696 { |
3344 | 2697 //Do horizontal scaling |
2698 while(lastInLumBuf < lastLumSrcY) | |
2699 { | |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2700 uint8_t *s= src[0]+(lastInLumBuf + 1 - srcSliceY)*srcStride[0]; |
3344 | 2701 lumBufIndex++; |
4290
1f8ceb12284d
general convolution filtering of the source picture
michael
parents:
4276
diff
changeset
|
2702 // printf("%d %d %d %d\n", lumBufIndex, vLumBufSize, lastInLumBuf, lastLumSrcY); |
3344 | 2703 ASSERT(lumBufIndex < 2*vLumBufSize) |
2704 ASSERT(lastInLumBuf + 1 - srcSliceY < srcSliceH) | |
2705 ASSERT(lastInLumBuf + 1 - srcSliceY >= 0) | |
2706 // printf("%d %d\n", lumBufIndex, vLumBufSize); | |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2707 RENAME(hyscale)(lumPixBuf[ lumBufIndex ], dstW, s, srcW, lumXInc, |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2708 flags, canMMX2BeUsed, hLumFilter, hLumFilterPos, hLumFilterSize, |
5452 | 2709 funnyYCode, c->srcFormat, formatConvBuffer, |
2710 c->lumMmx2Filter, c->lumMmx2FilterPos); | |
3344 | 2711 lastInLumBuf++; |
2712 } | |
2713 while(lastInChrBuf < lastChrSrcY) | |
2714 { | |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2715 uint8_t *src1= src[1]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[1]; |
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2716 uint8_t *src2= src[2]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[2]; |
3344 | 2717 chrBufIndex++; |
2718 ASSERT(chrBufIndex < 2*vChrBufSize) | |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2719 ASSERT(lastInChrBuf + 1 - chrSrcSliceY < (chrSrcSliceH)) |
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2720 ASSERT(lastInChrBuf + 1 - chrSrcSliceY >= 0) |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2721 //FIXME replace parameters through context struct (some at least) |
6503 | 2722 |
2723 if(!(isGray(srcFormat) || isGray(dstFormat))) | |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2724 RENAME(hcscale)(chrPixBuf[ chrBufIndex ], chrDstW, src1, src2, chrSrcW, chrXInc, |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2725 flags, canMMX2BeUsed, hChrFilter, hChrFilterPos, hChrFilterSize, |
5452 | 2726 funnyUVCode, c->srcFormat, formatConvBuffer, |
2727 c->chrMmx2Filter, c->chrMmx2FilterPos); | |
3344 | 2728 lastInChrBuf++; |
2729 } | |
2730 //wrap buf index around to stay inside the ring buffer | |
2731 if(lumBufIndex >= vLumBufSize ) lumBufIndex-= vLumBufSize; | |
2732 if(chrBufIndex >= vChrBufSize ) chrBufIndex-= vChrBufSize; | |
2469 | 2733 } |
3344 | 2734 else // not enough lines left in this slice -> load the rest in the buffer |
2469 | 2735 { |
3344 | 2736 /* printf("%d %d Last:%d %d LastInBuf:%d %d Index:%d %d Y:%d FSize: %d %d BSize: %d %d\n", |
2737 firstChrSrcY,firstLumSrcY,lastChrSrcY,lastLumSrcY, | |
2738 lastInChrBuf,lastInLumBuf,chrBufIndex,lumBufIndex,dstY,vChrFilterSize,vLumFilterSize, | |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2739 vChrBufSize, vLumBufSize);*/ |
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2740 |
3344 | 2741 //Do horizontal scaling |
2742 while(lastInLumBuf+1 < srcSliceY + srcSliceH) | |
2469 | 2743 { |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2744 uint8_t *s= src[0]+(lastInLumBuf + 1 - srcSliceY)*srcStride[0]; |
3344 | 2745 lumBufIndex++; |
2746 ASSERT(lumBufIndex < 2*vLumBufSize) | |
2747 ASSERT(lastInLumBuf + 1 - srcSliceY < srcSliceH) | |
2748 ASSERT(lastInLumBuf + 1 - srcSliceY >= 0) | |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2749 RENAME(hyscale)(lumPixBuf[ lumBufIndex ], dstW, s, srcW, lumXInc, |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2750 flags, canMMX2BeUsed, hLumFilter, hLumFilterPos, hLumFilterSize, |
5452 | 2751 funnyYCode, c->srcFormat, formatConvBuffer, |
2752 c->lumMmx2Filter, c->lumMmx2FilterPos); | |
3344 | 2753 lastInLumBuf++; |
2469 | 2754 } |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2755 while(lastInChrBuf+1 < (chrSrcSliceY + chrSrcSliceH)) |
3344 | 2756 { |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2757 uint8_t *src1= src[1]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[1]; |
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2758 uint8_t *src2= src[2]+(lastInChrBuf + 1 - chrSrcSliceY)*srcStride[2]; |
3344 | 2759 chrBufIndex++; |
2760 ASSERT(chrBufIndex < 2*vChrBufSize) | |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2761 ASSERT(lastInChrBuf + 1 - chrSrcSliceY < chrSrcSliceH) |
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2762 ASSERT(lastInChrBuf + 1 - chrSrcSliceY >= 0) |
6503 | 2763 |
2764 if(!(isGray(srcFormat) || isGray(dstFormat))) | |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2765 RENAME(hcscale)(chrPixBuf[ chrBufIndex ], chrDstW, src1, src2, chrSrcW, chrXInc, |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2766 flags, canMMX2BeUsed, hChrFilter, hChrFilterPos, hChrFilterSize, |
5452 | 2767 funnyUVCode, c->srcFormat, formatConvBuffer, |
2768 c->chrMmx2Filter, c->chrMmx2FilterPos); | |
3344 | 2769 lastInChrBuf++; |
2770 } | |
2771 //wrap buf index around to stay inside the ring buffer | |
2772 if(lumBufIndex >= vLumBufSize ) lumBufIndex-= vLumBufSize; | |
2773 if(chrBufIndex >= vChrBufSize ) chrBufIndex-= vChrBufSize; | |
11000 | 2774 break; //we can't output a dstY line so let's try with the next slice |
2469 | 2775 } |
2264
7851375ea156
increased precission of s_xinc s_xinc2 (needed for the mmx2 bugfix)
michael
parents:
2237
diff
changeset
|
2776 |
2748 | 2777 #ifdef HAVE_MMX |
3344 | 2778 b5Dither= dither8[dstY&1]; |
2779 g6Dither= dither4[dstY&1]; | |
2780 g5Dither= dither8[dstY&1]; | |
2781 r5Dither= dither8[(dstY+1)&1]; | |
2748 | 2782 #endif |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2783 if(dstY < dstH-2) |
3352 | 2784 { |
9414 | 2785 int16_t **lumSrcPtr= lumPixBuf + lumBufIndex + firstLumSrcY - lastInLumBuf + vLumBufSize; |
2786 int16_t **chrSrcPtr= chrPixBuf + chrBufIndex + firstChrSrcY - lastInChrBuf + vChrBufSize; | |
2787 #ifdef HAVE_MMX | |
2788 int i; | |
2789 for(i=0; i<vLumFilterSize; i++) | |
2790 { | |
2791 lumMmxFilter[4*i+0]= (int32_t)lumSrcPtr[i]; | |
2792 lumMmxFilter[4*i+2]= | |
2793 lumMmxFilter[4*i+3]= | |
2794 ((uint16_t)vLumFilter[dstY*vLumFilterSize + i])*0x10001; | |
2795 } | |
2796 for(i=0; i<vChrFilterSize; i++) | |
2797 { | |
2798 chrMmxFilter[4*i+0]= (int32_t)chrSrcPtr[i]; | |
2799 chrMmxFilter[4*i+2]= | |
2800 chrMmxFilter[4*i+3]= | |
2801 ((uint16_t)vChrFilter[chrDstY*vChrFilterSize + i])*0x10001; | |
2802 } | |
2803 #endif | |
14715 | 2804 if(dstFormat == IMGFMT_NV12 || dstFormat == IMGFMT_NV21){ |
2805 const int chrSkipMask= (1<<c->chrDstVSubSample)-1; | |
2806 if(dstY&chrSkipMask) uDest= NULL; //FIXME split functions in lumi / chromi | |
2807 RENAME(yuv2nv12X)(c, | |
2808 vLumFilter+dstY*vLumFilterSize , lumSrcPtr, vLumFilterSize, | |
2809 vChrFilter+chrDstY*vChrFilterSize, chrSrcPtr, vChrFilterSize, | |
2810 dest, uDest, dstW, chrDstW, dstFormat); | |
2811 } | |
2812 else if(isPlanarYUV(dstFormat) || isGray(dstFormat)) //YV12 like | |
3344 | 2813 { |
7351 | 2814 const int chrSkipMask= (1<<c->chrDstVSubSample)-1; |
2815 if((dstY&chrSkipMask) || isGray(dstFormat)) uDest=vDest= NULL; //FIXME split functions in lumi / chromi | |
3344 | 2816 if(vLumFilterSize == 1 && vChrFilterSize == 1) // Unscaled YV12 |
2817 { | |
2818 int16_t *lumBuf = lumPixBuf[0]; | |
2819 int16_t *chrBuf= chrPixBuf[0]; | |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2820 RENAME(yuv2yuv1)(lumBuf, chrBuf, dest, uDest, vDest, dstW, chrDstW); |
3344 | 2821 } |
2822 else //General YV12 | |
2823 { | |
9413 | 2824 RENAME(yuv2yuvX)(c, |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2825 vLumFilter+dstY*vLumFilterSize , lumSrcPtr, vLumFilterSize, |
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2826 vChrFilter+chrDstY*vChrFilterSize, chrSrcPtr, vChrFilterSize, |
9414 | 2827 dest, uDest, vDest, dstW, chrDstW); |
3344 | 2828 } |
2829 } | |
2830 else | |
2831 { | |
2832 ASSERT(lumSrcPtr + vLumFilterSize - 1 < lumPixBuf + vLumBufSize*2); | |
2833 ASSERT(chrSrcPtr + vChrFilterSize - 1 < chrPixBuf + vChrBufSize*2); | |
2834 if(vLumFilterSize == 1 && vChrFilterSize == 2) //Unscaled RGB | |
2835 { | |
2836 int chrAlpha= vChrFilter[2*dstY+1]; | |
7723 | 2837 RENAME(yuv2packed1)(c, *lumSrcPtr, *chrSrcPtr, *(chrSrcPtr+1), |
6578 | 2838 dest, dstW, chrAlpha, dstFormat, flags, dstY); |
3344 | 2839 } |
2840 else if(vLumFilterSize == 2 && vChrFilterSize == 2) //BiLinear Upscale RGB | |
2841 { | |
2842 int lumAlpha= vLumFilter[2*dstY+1]; | |
2843 int chrAlpha= vChrFilter[2*dstY+1]; | |
7723 | 2844 RENAME(yuv2packed2)(c, *lumSrcPtr, *(lumSrcPtr+1), *chrSrcPtr, *(chrSrcPtr+1), |
6578 | 2845 dest, dstW, lumAlpha, chrAlpha, dstY); |
3344 | 2846 } |
2847 else //General RGB | |
2848 { | |
7723 | 2849 RENAME(yuv2packedX)(c, |
3344 | 2850 vLumFilter+dstY*vLumFilterSize, lumSrcPtr, vLumFilterSize, |
2851 vChrFilter+dstY*vChrFilterSize, chrSrcPtr, vChrFilterSize, | |
9413 | 2852 dest, dstW, dstY); |
3344 | 2853 } |
2854 } | |
3352 | 2855 } |
11000 | 2856 else // hmm looks like we can't use MMX here without overwriting this array's tail |
3352 | 2857 { |
2858 int16_t **lumSrcPtr= lumPixBuf + lumBufIndex + firstLumSrcY - lastInLumBuf + vLumBufSize; | |
2859 int16_t **chrSrcPtr= chrPixBuf + chrBufIndex + firstChrSrcY - lastInChrBuf + vChrBufSize; | |
14715 | 2860 if(dstFormat == IMGFMT_NV12 || dstFormat == IMGFMT_NV21){ |
2861 const int chrSkipMask= (1<<c->chrDstVSubSample)-1; | |
2862 if(dstY&chrSkipMask) uDest= NULL; //FIXME split functions in lumi / chromi | |
2863 yuv2nv12XinC( | |
2864 vLumFilter+dstY*vLumFilterSize , lumSrcPtr, vLumFilterSize, | |
2865 vChrFilter+chrDstY*vChrFilterSize, chrSrcPtr, vChrFilterSize, | |
2866 dest, uDest, dstW, chrDstW, dstFormat); | |
2867 } | |
2868 else if(isPlanarYUV(dstFormat) || isGray(dstFormat)) //YV12 | |
3352 | 2869 { |
7351 | 2870 const int chrSkipMask= (1<<c->chrDstVSubSample)-1; |
2871 if((dstY&chrSkipMask) || isGray(dstFormat)) uDest=vDest= NULL; //FIXME split functions in lumi / chromi | |
6540 | 2872 yuv2yuvXinC( |
6532
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2873 vLumFilter+dstY*vLumFilterSize , lumSrcPtr, vLumFilterSize, |
9834d9980c45
yvu9 support (other planar yuv formats with other chroma subsamplings should be trivial to add, if they had a IMGFMT)
michael
parents:
6520
diff
changeset
|
2874 vChrFilter+chrDstY*vChrFilterSize, chrSrcPtr, vChrFilterSize, |
6540 | 2875 dest, uDest, vDest, dstW, chrDstW); |
3352 | 2876 } |
2877 else | |
2878 { | |
2879 ASSERT(lumSrcPtr + vLumFilterSize - 1 < lumPixBuf + vLumBufSize*2); | |
2880 ASSERT(chrSrcPtr + vChrFilterSize - 1 < chrPixBuf + vChrBufSize*2); | |
7723 | 2881 yuv2packedXinC(c, |
3352 | 2882 vLumFilter+dstY*vLumFilterSize, lumSrcPtr, vLumFilterSize, |
2883 vChrFilter+dstY*vChrFilterSize, chrSrcPtr, vChrFilterSize, | |
6578 | 2884 dest, dstW, dstY); |
3352 | 2885 } |
2886 } | |
3344 | 2887 } |
2534
cc9d3fd626f0
patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents:
2521
diff
changeset
|
2888 |
cc9d3fd626f0
patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents:
2521
diff
changeset
|
2889 #ifdef HAVE_MMX |
cc9d3fd626f0
patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents:
2521
diff
changeset
|
2890 __asm __volatile(SFENCE:::"memory"); |
2566 | 2891 __asm __volatile(EMMS:::"memory"); |
2534
cc9d3fd626f0
patch from Martin Decky <deckm1am@ss1000.ms.mff.cuni.cz> applied and unnecassery "memory" removed
michael
parents:
2521
diff
changeset
|
2892 #endif |
4276
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2893 /* store changed local vars back in the context */ |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2894 c->dstY= dstY; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2895 c->lumBufIndex= lumBufIndex; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2896 c->chrBufIndex= chrBufIndex; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2897 c->lastInLumBuf= lastInLumBuf; |
9199d15cb4e0
removed global vars so that multiple swscalers can be used
michael
parents:
4248
diff
changeset
|
2898 c->lastInChrBuf= lastInChrBuf; |
9494
543ab3909b78
sws_ prefix, more seperation between internal & external swscaler API
michael
parents:
9476
diff
changeset
|
2899 |
543ab3909b78
sws_ prefix, more seperation between internal & external swscaler API
michael
parents:
9476
diff
changeset
|
2900 return dstY - lastDstY; |
3641 | 2901 } |