annotate libmpcodecs/vf_tfields.c @ 15453:d7a2ffc6e694

compilation/link fix with --disable-qtx --disable-dshow patch by Gianluigi Tiesi <mplayer at netfarm dot it>
author diego
date Sat, 14 May 2005 09:03:00 +0000
parents 0bb95cd581b6
children 6ff3379a0862
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1 #include <stdio.h>
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2 #include <stdlib.h>
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3 #include <string.h>
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4
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5 #include "../config.h"
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6 #include "../mp_msg.h"
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7 #include "../cpudetect.h"
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8
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9 #include "img_format.h"
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10 #include "mp_image.h"
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11 #include "vf.h"
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12
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13 #include "../libvo/fastmemcpy.h"
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14
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15 struct vf_priv_s {
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16 int mode;
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17 int parity;
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18 };
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19
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20 static inline void *my_memcpy_pic(void * dst, void * src, int bytesPerLine, int height, int dstStride, int srcStride)
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21 {
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22 int i;
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23 void *retval=dst;
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24
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25 for(i=0; i<height; i++)
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26 {
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27 memcpy(dst, src, bytesPerLine);
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28 src+= srcStride;
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29 dst+= dstStride;
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30 }
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31
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32 return retval;
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33 }
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34
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35 static void deint(unsigned char *dest, int ds, unsigned char *src, int ss, int w, int h, int field)
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36 {
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37 int x, y;
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38 src += ss;
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39 dest += ds;
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40 if (field) {
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41 src += ss;
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42 dest += ds;
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43 h -= 2;
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44 }
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45 for (y=h/2; y; y--) {
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46 for (x=0; x<w; x++) {
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47 if (((src[x-ss] < src[x]) && (src[x+ss] < src[x])) ||
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48 ((src[x-ss] > src[x]) && (src[x+ss] > src[x]))) {
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49 //dest[x] = (src[x+ss] + src[x-ss])>>1;
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50 dest[x] = ((src[x+ss]<<1) + (src[x-ss]<<1)
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51 + src[x+ss+1] + src[x-ss+1]
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52 + src[x+ss-1] + src[x-ss-1])>>3;
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53 }
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54 else dest[x] = src[x];
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55 }
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56 dest += ds<<1;
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57 src += ss<<1;
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58 }
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59 }
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60
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61 #ifdef HAVE_3DNOW
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62 static void qpel_li_3DNOW(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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63 {
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64 int i, j, ssd=ss;
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65 long crap1, crap2;
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66 if (up) {
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67 ssd = -ss;
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68 memcpy(d, s, w);
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69 d += ds;
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70 s += ss;
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71 }
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72 for (i=h-1; i; i--) {
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73 asm volatile(
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74 "1: \n\t"
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75 "movq (%%"REG_S"), %%mm0 \n\t"
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76 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
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77 "pavgusb %%mm0, %%mm1 \n\t"
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78 "add $8, %%"REG_S" \n\t"
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79 "pavgusb %%mm0, %%mm1 \n\t"
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80 "movq %%mm1, (%%"REG_D") \n\t"
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81 "add $8, %%"REG_D" \n\t"
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82 "decl %%ecx \n\t"
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83 "jnz 1b \n\t"
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84 : "=S"(crap1), "=D"(crap2)
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85 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
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86 );
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87 for (j=w-(w&7); j<w; j++)
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88 d[j] = (s[j+ssd] + 3*s[j])>>2;
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89 d += ds;
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90 s += ss;
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91 }
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92 if (!up) memcpy(d, s, w);
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93 asm volatile("emms \n\t" : : : "memory");
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94 }
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95 #endif
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96
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97 #ifdef HAVE_MMX2
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98 static void qpel_li_MMX2(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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99 {
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100 int i, j, ssd=ss;
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101 long crap1, crap2;
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102 if (up) {
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103 ssd = -ss;
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104 memcpy(d, s, w);
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105 d += ds;
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106 s += ss;
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107 }
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108 for (i=h-1; i; i--) {
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109 asm volatile(
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110 "pxor %%mm7, %%mm7 \n\t"
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111 "2: \n\t"
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112 "movq (%%"REG_S"), %%mm0 \n\t"
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113 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
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114 "pavgb %%mm0, %%mm1 \n\t"
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115 "add $8, %%"REG_S" \n\t"
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116 "pavgb %%mm0, %%mm1 \n\t"
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117 "movq %%mm1, (%%"REG_D") \n\t"
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118 "add $8, %%"REG_D" \n\t"
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119 "decl %%ecx \n\t"
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120 "jnz 2b \n\t"
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121 : "=S"(crap1), "=D"(crap2)
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122 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
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123 );
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124 for (j=w-(w&7); j<w; j++)
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125 d[j] = (s[j+ssd] + 3*s[j])>>2;
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126 d += ds;
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127 s += ss;
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128 }
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129 if (!up) memcpy(d, s, w);
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130 asm volatile("emms \n\t" : : : "memory");
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131 }
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132 #endif
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133
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134 #ifdef HAVE_MMX
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135 static void qpel_li_MMX(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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136 {
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137 int i, j, ssd=ss;
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138 int crap1, crap2;
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139 if (up) {
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140 ssd = -ss;
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141 memcpy(d, s, w);
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142 d += ds;
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143 s += ss;
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144 }
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145 for (i=h-1; i; i--) {
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146 asm volatile(
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147 "pxor %%mm7, %%mm7 \n\t"
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148 "3: \n\t"
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149 "movq (%%"REG_S"), %%mm0 \n\t"
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150 "movq (%%"REG_S"), %%mm1 \n\t"
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151 "movq (%%"REG_S",%%"REG_a"), %%mm2 \n\t"
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152 "movq (%%"REG_S",%%"REG_a"), %%mm3 \n\t"
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153 "add $8, %%"REG_S" \n\t"
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154 "punpcklbw %%mm7, %%mm0 \n\t"
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155 "punpckhbw %%mm7, %%mm1 \n\t"
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156 "punpcklbw %%mm7, %%mm2 \n\t"
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157 "punpckhbw %%mm7, %%mm3 \n\t"
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158 "paddw %%mm0, %%mm2 \n\t"
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159 "paddw %%mm1, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
160 "paddw %%mm0, %%mm2 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
161 "paddw %%mm1, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
162 "paddw %%mm0, %%mm2 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
163 "paddw %%mm1, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
164 "psrlw $2, %%mm2 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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parents: 10009
diff changeset
165 "psrlw $2, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
166 "packsswb %%mm3, %%mm2 \n\t"
13720
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diff changeset
167 "movq %%mm2, (%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
168 "add $8, %%"REG_D" \n\t"
10020
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diff changeset
169 "decl %%ecx \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
170 "jnz 3b \n\t"
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diff changeset
171 : "=S"(crap1), "=D"(crap2)
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172 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
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diff changeset
173 );
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
174 for (j=w-(w&7); j<w; j++)
10020
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diff changeset
175 d[j] = (s[j+ssd] + 3*s[j])>>2;
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176 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
177 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
178 }
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
179 if (!up) memcpy(d, s, w);
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
180 asm volatile("emms \n\t" : : : "memory");
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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181 }
10049
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diff changeset
182
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
183 static void qpel_4tap_MMX(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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184 {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
185 int i, j, ssd=ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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186 static const short filter[] = {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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187 29, 29, 29, 29, 110, 110, 110, 110,
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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188 9, 9, 9, 9, 3, 3, 3, 3,
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189 64, 64, 64, 64 };
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
190 int crap1, crap2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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191 if (up) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
192 ssd = -ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
193 memcpy(d, s, w);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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194 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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195 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
196 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
197 d[j] = (s[j+ssd] + 3*s[j])>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
198 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
199 for (i=h-3; i; i--) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
200 asm volatile(
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
201 "pxor %%mm0, %%mm0 \n\t"
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diff changeset
202 "movq (%%"REG_d"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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diff changeset
203 "movq 8(%%"REG_d"), %%mm5 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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diff changeset
204 "movq 16(%%"REG_d"), %%mm6 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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diff changeset
205 "movq 24(%%"REG_d"), %%mm7 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
206 "4: \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
207
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diff changeset
208 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
209 "movq (%%"REG_S"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
210 "movq (%%"REG_S",%%"REG_b"), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
211 "punpcklbw %%mm0, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
212 "punpcklbw %%mm0, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
213 "pmullw %%mm4, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
214 "punpcklbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
215 "pmullw %%mm5, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
216 "paddusw %%mm2, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
217 "pmullw %%mm6, %%mm3 \n\t"
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diff changeset
218 "movq (%%"REG_S",%%"REG_a",2), %%mm2 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
219 "psubusw %%mm3, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
220 "punpcklbw %%mm0, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
221 "pmullw %%mm7, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
222 "psubusw %%mm2, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
223 "psrlw $7, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
224
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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diff changeset
225 "movq (%%"REG_S",%%"REG_a"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
226 "movq (%%"REG_S"), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
227 "punpckhbw %%mm0, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
228 "punpckhbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
229 "pmullw %%mm4, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
230 "pmullw %%mm5, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
231 "paddusw %%mm3, %%mm2 \n\t"
13720
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parents: 10078
diff changeset
232 "movq (%%"REG_S",%%"REG_b"), %%mm3 \n\t"
10049
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diff changeset
233 "punpckhbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
234 "pmullw %%mm6, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
235 "psubusw %%mm3, %%mm2 \n\t"
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diff changeset
236 "movq (%%"REG_S",%%"REG_a",2), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
237 "punpckhbw %%mm0, %%mm3 \n\t"
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diff changeset
238 "add $8, %%"REG_S" \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
239 "pmullw %%mm7, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
240 "psubusw %%mm3, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
241 "psrlw $7, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
242
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
243 "packuswb %%mm2, %%mm1 \n\t"
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diff changeset
244 "movq %%mm1, (%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
245 "add $8, %%"REG_D" \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
246 "decl %%ecx \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
247 "jnz 4b \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
248 : "=S"(crap1), "=D"(crap2)
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diff changeset
249 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd), "b"((long)-ssd), "d"(filter)
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
250 );
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
251 for (j=w-(w&7); j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
252 d[j] = (-9*s[j-ssd] + 111*s[j] + 29*s[j+ssd] - 3*s[j+ssd+ssd])>>7;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
253 d += ds;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
254 s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
255 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
256 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
257 d[j] = (s[j+ssd] + 3*s[j])>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
258 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
259 if (!up) memcpy(d, s, w);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
260 asm volatile("emms \n\t" : : : "memory");
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
261 }
10020
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diff changeset
262 #endif
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
263
10049
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diff changeset
264 static inline int clamp(int a)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
265 {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
266 // If a<512, this is equivalent to:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
267 // return (a<0) ? 0 : ( (a>255) ? 255 : a);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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268 return (~(a>>31)) & (a | ((a<<23)>>31));
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
269 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
270
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
271 static void qpel_li_C(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
10020
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diff changeset
272 {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
273 int i, j, ssd=ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
274 if (up) {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
275 ssd = -ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
276 memcpy(d, s, w);
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
277 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
278 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
279 }
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
280 for (i=h-1; i; i--) {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
281 for (j=0; j<w; j++)
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
282 d[j] = (s[j+ssd] + 3*s[j])>>2;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
283 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
284 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
285 }
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
286 if (!up) memcpy(d, s, w);
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
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diff changeset
287 }
9514
08264c647f46 new filter
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parents:
diff changeset
288
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diff changeset
289 static void qpel_4tap_C(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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290 {
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diff changeset
291 int i, j, ssd=ss;
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292 if (up) {
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diff changeset
293 ssd = -ss;
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diff changeset
294 memcpy(d, s, w);
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295 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
296 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
297 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
298 d[j] = (s[j+ssd] + 3*s[j] + 2)>>2;
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diff changeset
299 d += ds; s += ss;
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diff changeset
300 for (i=h-3; i; i--) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
301 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
302 d[j] = clamp((-9*s[j-ssd] + 111*s[j] + 29*s[j+ssd] - 3*s[j+ssd+ssd] + 64)>>7);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
303 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
304 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
305 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
306 d[j] = (s[j+ssd] + 3*s[j] + 2)>>2;
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diff changeset
307 d += ds; s += ss;
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diff changeset
308 if (!up) memcpy(d, s, w);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
309 }
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diff changeset
310
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
311 static void (*qpel_li)(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up);
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diff changeset
312 static void (*qpel_4tap)(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up);
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313
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314 static int put_image(struct vf_instance_s* vf, mp_image_t *mpi)
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315 {
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diff changeset
316 int i;
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diff changeset
317 int ret=0;
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318 mp_image_t *dmpi;
10049
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diff changeset
319 void (*qpel)(unsigned char *, unsigned char *, int, int, int, int, int);
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320 int bpp=1;
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diff changeset
321 int tff;
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379f48cace77 support more image formats. hopefully this bpp handling is correct...
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diff changeset
322
379f48cace77 support more image formats. hopefully this bpp handling is correct...
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diff changeset
323 if (!(mpi->flags & MP_IMGFLAG_PLANAR)) bpp = mpi->bpp/8;
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diff changeset
324 if (vf->priv->parity < 0) {
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diff changeset
325 if (mpi->fields & MP_IMGFIELD_ORDERED)
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diff changeset
326 tff = mpi->fields & MP_IMGFIELD_TOP_FIRST;
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diff changeset
327 else
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diff changeset
328 tff = 1;
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
329 }
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
330 else tff = (vf->priv->parity&1)^1;
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diff changeset
331
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
332 switch (vf->priv->mode) {
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diff changeset
333 case 2:
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diff changeset
334 qpel = qpel_li;
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diff changeset
335 break;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
336 case 3:
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diff changeset
337 // TODO: add 3tap filter
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
338 qpel = qpel_4tap;
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339 break;
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340 case 4:
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diff changeset
341 qpel = qpel_4tap;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
342 break;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
343 }
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344
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345 switch (vf->priv->mode) {
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346 case 0:
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diff changeset
347 for (i=0; i<2; i++) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
348 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
349 MP_IMGTYPE_EXPORT, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
350 mpi->width, mpi->height/2);
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diff changeset
351 dmpi->planes[0] = mpi->planes[0] + (i^!tff)*mpi->stride[0];
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diff changeset
352 dmpi->stride[0] = 2*mpi->stride[0];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
353 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
354 dmpi->planes[1] = mpi->planes[1] + (i^!tff)*mpi->stride[1];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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355 dmpi->planes[2] = mpi->planes[2] + (i^!tff)*mpi->stride[2];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
356 dmpi->stride[1] = 2*mpi->stride[1];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
357 dmpi->stride[2] = 2*mpi->stride[2];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
358 }
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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359 ret |= vf_next_put_image(vf, dmpi);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
360 if (!i) vf_next_control(vf, VFCTRL_FLIP_PAGE, NULL);
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361 }
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32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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362 break;
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363 case 1:
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diff changeset
364 for (i=0; i<2; i++) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
365 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
366 MP_IMGTYPE_TEMP, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
367 mpi->width, mpi->height);
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diff changeset
368 my_memcpy_pic(dmpi->planes[0] + (i^!tff)*dmpi->stride[0],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
369 mpi->planes[0] + (i^!tff)*mpi->stride[0],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
370 mpi->w*bpp, mpi->h/2, dmpi->stride[0]*2, mpi->stride[0]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
371 deint(dmpi->planes[0], dmpi->stride[0], mpi->planes[0], mpi->stride[0], mpi->w, mpi->h, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
372 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
373 my_memcpy_pic(dmpi->planes[1] + (i^!tff)*dmpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
374 mpi->planes[1] + (i^!tff)*mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
375 mpi->chroma_width, mpi->chroma_height/2,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
376 dmpi->stride[1]*2, mpi->stride[1]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
377 my_memcpy_pic(dmpi->planes[2] + (i^!tff)*dmpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
378 mpi->planes[2] + (i^!tff)*mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
379 mpi->chroma_width, mpi->chroma_height/2,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
380 dmpi->stride[2]*2, mpi->stride[2]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
381 deint(dmpi->planes[1], dmpi->stride[1], mpi->planes[1], mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
382 mpi->chroma_width, mpi->chroma_height, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
383 deint(dmpi->planes[2], dmpi->stride[2], mpi->planes[2], mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
384 mpi->chroma_width, mpi->chroma_height, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
385 }
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
386 ret |= vf_next_put_image(vf, dmpi);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
387 if (!i) vf_next_control(vf, VFCTRL_FLIP_PAGE, NULL);
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diff changeset
388 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
389 break;
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
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diff changeset
390 case 2:
10049
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diff changeset
391 case 3:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
392 case 4:
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
393 for (i=0; i<2; i++) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
394 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
395 MP_IMGTYPE_TEMP, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
396 mpi->width, mpi->height/2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
397 qpel(dmpi->planes[0], mpi->planes[0] + (i^!tff)*mpi->stride[0],
15012
ad8815f740d3 1000l, last commit broke qpel interp entirely
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diff changeset
398 mpi->w*bpp, mpi->h/2, dmpi->stride[0], mpi->stride[0]*2, (i^!tff));
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
399 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
400 qpel(dmpi->planes[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
401 mpi->planes[1] + (i^!tff)*mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
402 mpi->chroma_width, mpi->chroma_height/2,
15012
ad8815f740d3 1000l, last commit broke qpel interp entirely
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diff changeset
403 dmpi->stride[1], mpi->stride[1]*2, (i^!tff));
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
404 qpel(dmpi->planes[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
405 mpi->planes[2] + (i^!tff)*mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
406 mpi->chroma_width, mpi->chroma_height/2,
15012
ad8815f740d3 1000l, last commit broke qpel interp entirely
rfelker
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diff changeset
407 dmpi->stride[2], mpi->stride[2]*2, (i^!tff));
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
408 }
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
409 ret |= vf_next_put_image(vf, dmpi);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
410 if (!i) vf_next_control(vf, VFCTRL_FLIP_PAGE, NULL);
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
rfelker
parents: 9593
diff changeset
411 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
412 break;
9514
08264c647f46 new filter
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diff changeset
413 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
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diff changeset
414 return ret;
9514
08264c647f46 new filter
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parents:
diff changeset
415 }
08264c647f46 new filter
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diff changeset
416
08264c647f46 new filter
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diff changeset
417 static int query_format(struct vf_instance_s* vf, unsigned int fmt)
08264c647f46 new filter
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parents:
diff changeset
418 {
08264c647f46 new filter
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diff changeset
419 /* FIXME - figure out which other formats work */
08264c647f46 new filter
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parents:
diff changeset
420 switch (fmt) {
08264c647f46 new filter
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parents:
diff changeset
421 case IMGFMT_YV12:
08264c647f46 new filter
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parents:
diff changeset
422 case IMGFMT_IYUV:
08264c647f46 new filter
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parents:
diff changeset
423 case IMGFMT_I420:
08264c647f46 new filter
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parents:
diff changeset
424 return vf_next_query_format(vf, fmt);
08264c647f46 new filter
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parents:
diff changeset
425 }
08264c647f46 new filter
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parents:
diff changeset
426 return 0;
08264c647f46 new filter
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parents:
diff changeset
427 }
08264c647f46 new filter
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parents:
diff changeset
428
08264c647f46 new filter
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parents:
diff changeset
429 static int config(struct vf_instance_s* vf,
08264c647f46 new filter
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parents:
diff changeset
430 int width, int height, int d_width, int d_height,
08264c647f46 new filter
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parents:
diff changeset
431 unsigned int flags, unsigned int outfmt)
08264c647f46 new filter
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parents:
diff changeset
432 {
08264c647f46 new filter
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parents:
diff changeset
433 switch (vf->priv->mode) {
08264c647f46 new filter
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parents:
diff changeset
434 case 0:
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
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parents: 9593
diff changeset
435 case 2:
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
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436 case 3:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
437 case 4:
9514
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438 return vf_next_config(vf,width,height/2,d_width,d_height,flags,outfmt);
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439 case 1:
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440 return vf_next_config(vf,width,height,d_width,d_height,flags,outfmt);
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441 }
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442 return 0;
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443 }
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444
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445 static void uninit(struct vf_instance_s* vf)
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446 {
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447 free(vf->priv);
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448 }
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449
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450 static int open(vf_instance_t *vf, char* args)
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451 {
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452 struct vf_priv_s *p;
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453 vf->config = config;
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454 vf->put_image = put_image;
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
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455 //vf->query_format = query_format;
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456 vf->uninit = uninit;
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457 vf->default_reqs = VFCAP_ACCEPT_STRIDE;
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458 vf->priv = p = calloc(1, sizeof(struct vf_priv_s));
15013
0bb95cd581b6 sane default mode
rfelker
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459 vf->priv->mode = 4;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
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460 vf->priv->parity = -1;
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
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461 if (args) sscanf(args, "%d:%d", &vf->priv->mode, &vf->priv->parity);
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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462 qpel_li = qpel_li_C;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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463 qpel_4tap = qpel_4tap_C;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
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464 #ifdef HAVE_MMX
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
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465 if(gCpuCaps.hasMMX) qpel_li = qpel_li_MMX;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
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466 if(gCpuCaps.hasMMX) qpel_4tap = qpel_4tap_MMX;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
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467 #endif
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
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468 #ifdef HAVE_MMX2
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765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
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469 if(gCpuCaps.hasMMX2) qpel_li = qpel_li_MMX2;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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470 #endif
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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471 #ifdef HAVE_3DNOW
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
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472 if(gCpuCaps.has3DNow) qpel_li = qpel_li_3DNOW;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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473 #endif
9514
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474 return 1;
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475 }
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476
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477 vf_info_t vf_info_tfields = {
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478 "temporal field separation",
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479 "tfields",
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480 "Rich Felker",
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481 "",
9593
e9a2af584986 Add the new -vf option wich is the same as vop in reverse order.
albeu
parents: 9514
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482 open,
e9a2af584986 Add the new -vf option wich is the same as vop in reverse order.
albeu
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483 NULL
9514
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484 };
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485
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486