annotate libmpcodecs/vf_tfields.c @ 28438:d90023432f30

In case of several \move or \pos in one line, prefer the first one. Patch by Grigori G, greg at chown ath cx.
author eugeni
date Sat, 07 Feb 2009 01:13:11 +0000
parents 31287e75b5d8
children 0f1b5b68af32
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1 #include <stdio.h>
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2 #include <stdlib.h>
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3 #include <string.h>
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4
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5 #include "config.h"
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6 #include "mp_msg.h"
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7 #include "cpudetect.h"
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8
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9 #include "img_format.h"
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10 #include "mp_image.h"
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11 #include "vf.h"
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12
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13 #include "libvo/fastmemcpy.h"
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14
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15 struct vf_priv_s {
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16 int mode;
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17 int parity;
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18 int buffered_i;
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19 mp_image_t *buffered_mpi;
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20 double buffered_pts;
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21 };
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22
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23 static void deint(unsigned char *dest, int ds, unsigned char *src, int ss, int w, int h, int field)
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24 {
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25 int x, y;
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26 src += ss;
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27 dest += ds;
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28 if (field) {
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29 src += ss;
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30 dest += ds;
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31 h -= 2;
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32 }
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33 for (y=h/2; y; y--) {
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34 for (x=0; x<w; x++) {
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35 if (((src[x-ss] < src[x]) && (src[x+ss] < src[x])) ||
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36 ((src[x-ss] > src[x]) && (src[x+ss] > src[x]))) {
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37 //dest[x] = (src[x+ss] + src[x-ss])>>1;
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38 dest[x] = ((src[x+ss]<<1) + (src[x-ss]<<1)
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39 + src[x+ss+1] + src[x-ss+1]
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40 + src[x+ss-1] + src[x-ss-1])>>3;
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41 }
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42 else dest[x] = src[x];
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43 }
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44 dest += ds<<1;
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45 src += ss<<1;
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46 }
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47 }
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48
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49 #if HAVE_AMD3DNOW
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50 static void qpel_li_3DNOW(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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51 {
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52 int i, j, ssd=ss;
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53 long crap1, crap2;
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54 if (up) {
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55 ssd = -ss;
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56 fast_memcpy(d, s, w);
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57 d += ds;
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58 s += ss;
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59 }
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60 for (i=h-1; i; i--) {
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61 __asm__ volatile(
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62 "1: \n\t"
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63 "movq (%%"REG_S"), %%mm0 \n\t"
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64 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
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65 "pavgusb %%mm0, %%mm1 \n\t"
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66 "add $8, %%"REG_S" \n\t"
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67 "pavgusb %%mm0, %%mm1 \n\t"
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68 "movq %%mm1, (%%"REG_D") \n\t"
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69 "add $8, %%"REG_D" \n\t"
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70 "decl %%ecx \n\t"
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71 "jnz 1b \n\t"
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72 : "=S"(crap1), "=D"(crap2)
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73 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
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74 );
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75 for (j=w-(w&7); j<w; j++)
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76 d[j] = (s[j+ssd] + 3*s[j])>>2;
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77 d += ds;
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78 s += ss;
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79 }
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80 if (!up) fast_memcpy(d, s, w);
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81 __asm__ volatile("emms \n\t" : : : "memory");
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82 }
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83 #endif
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84
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85 #if HAVE_MMX2
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86 static void qpel_li_MMX2(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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87 {
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88 int i, j, ssd=ss;
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89 long crap1, crap2;
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90 if (up) {
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91 ssd = -ss;
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92 fast_memcpy(d, s, w);
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93 d += ds;
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94 s += ss;
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95 }
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96 for (i=h-1; i; i--) {
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97 __asm__ volatile(
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98 "pxor %%mm7, %%mm7 \n\t"
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99 "2: \n\t"
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100 "movq (%%"REG_S"), %%mm0 \n\t"
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101 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
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102 "pavgb %%mm0, %%mm1 \n\t"
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103 "add $8, %%"REG_S" \n\t"
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104 "pavgb %%mm0, %%mm1 \n\t"
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105 "movq %%mm1, (%%"REG_D") \n\t"
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106 "add $8, %%"REG_D" \n\t"
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107 "decl %%ecx \n\t"
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108 "jnz 2b \n\t"
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109 : "=S"(crap1), "=D"(crap2)
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110 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
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111 );
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112 for (j=w-(w&7); j<w; j++)
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113 d[j] = (s[j+ssd] + 3*s[j])>>2;
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114 d += ds;
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115 s += ss;
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116 }
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117 if (!up) fast_memcpy(d, s, w);
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118 __asm__ volatile("emms \n\t" : : : "memory");
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119 }
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120 #endif
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121
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122 #if HAVE_MMX
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123 static void qpel_li_MMX(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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124 {
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125 int i, j, ssd=ss;
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126 int crap1, crap2;
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127 if (up) {
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128 ssd = -ss;
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129 fast_memcpy(d, s, w);
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130 d += ds;
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131 s += ss;
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132 }
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133 for (i=h-1; i; i--) {
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134 __asm__ volatile(
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135 "pxor %%mm7, %%mm7 \n\t"
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136 "3: \n\t"
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137 "movq (%%"REG_S"), %%mm0 \n\t"
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138 "movq (%%"REG_S"), %%mm1 \n\t"
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139 "movq (%%"REG_S",%%"REG_a"), %%mm2 \n\t"
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140 "movq (%%"REG_S",%%"REG_a"), %%mm3 \n\t"
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141 "add $8, %%"REG_S" \n\t"
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142 "punpcklbw %%mm7, %%mm0 \n\t"
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143 "punpckhbw %%mm7, %%mm1 \n\t"
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144 "punpcklbw %%mm7, %%mm2 \n\t"
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145 "punpckhbw %%mm7, %%mm3 \n\t"
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146 "paddw %%mm0, %%mm2 \n\t"
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147 "paddw %%mm1, %%mm3 \n\t"
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diff changeset
148 "paddw %%mm0, %%mm2 \n\t"
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diff changeset
149 "paddw %%mm1, %%mm3 \n\t"
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diff changeset
150 "paddw %%mm0, %%mm2 \n\t"
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diff changeset
151 "paddw %%mm1, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
152 "psrlw $2, %%mm2 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
153 "psrlw $2, %%mm3 \n\t"
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
154 "packsswb %%mm3, %%mm2 \n\t"
13720
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aurel
parents: 10078
diff changeset
155 "movq %%mm2, (%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
156 "add $8, %%"REG_D" \n\t"
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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parents: 10009
diff changeset
157 "decl %%ecx \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
158 "jnz 3b \n\t"
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
159 : "=S"(crap1), "=D"(crap2)
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diff changeset
160 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
161 );
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
162 for (j=w-(w&7); j<w; j++)
10020
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diff changeset
163 d[j] = (s[j+ssd] + 3*s[j])>>2;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
164 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
165 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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parents: 10009
diff changeset
166 }
23457
a124f3abc1ec Replace implicit use of fast_memcpy via macro by explicit use to allow
reimar
parents: 18986
diff changeset
167 if (!up) fast_memcpy(d, s, w);
27754
08d18fe9da52 Change all occurrences of asm and __asm to __asm__, same as was done for FFmpeg.
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diff changeset
168 __asm__ volatile("emms \n\t" : : : "memory");
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diff changeset
169 }
10049
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diff changeset
170
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
171 static void qpel_4tap_MMX(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
172 {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
173 int i, j, ssd=ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
174 static const short filter[] = {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
175 29, 29, 29, 29, 110, 110, 110, 110,
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
176 9, 9, 9, 9, 3, 3, 3, 3,
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
177 64, 64, 64, 64 };
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
178 int crap1, crap2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
179 if (up) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
180 ssd = -ss;
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diff changeset
181 fast_memcpy(d, s, w);
10049
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diff changeset
182 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
183 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
184 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
185 d[j] = (s[j+ssd] + 3*s[j])>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
186 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
187 for (i=h-3; i; i--) {
27754
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diego
parents: 25221
diff changeset
188 __asm__ volatile(
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
189 "pxor %%mm0, %%mm0 \n\t"
13720
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diff changeset
190 "movq (%%"REG_d"), %%mm4 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
191 "movq 8(%%"REG_d"), %%mm5 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
192 "movq 16(%%"REG_d"), %%mm6 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
193 "movq 24(%%"REG_d"), %%mm7 \n\t"
10049
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diff changeset
194 "4: \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
195
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parents: 10078
diff changeset
196 "movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
197 "movq (%%"REG_S"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
198 "movq (%%"REG_S",%%"REG_b"), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
199 "punpcklbw %%mm0, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
200 "punpcklbw %%mm0, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
201 "pmullw %%mm4, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
202 "punpcklbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
203 "pmullw %%mm5, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
204 "paddusw %%mm2, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
205 "pmullw %%mm6, %%mm3 \n\t"
13720
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parents: 10078
diff changeset
206 "movq (%%"REG_S",%%"REG_a",2), %%mm2 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
207 "psubusw %%mm3, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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parents: 10020
diff changeset
208 "punpcklbw %%mm0, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
209 "pmullw %%mm7, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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parents: 10020
diff changeset
210 "psubusw %%mm2, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
211 "psrlw $7, %%mm1 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
212
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
213 "movq (%%"REG_S",%%"REG_a"), %%mm2 \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
214 "movq (%%"REG_S"), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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parents: 10020
diff changeset
215 "punpckhbw %%mm0, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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parents: 10020
diff changeset
216 "punpckhbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
217 "pmullw %%mm4, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
218 "pmullw %%mm5, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
219 "paddusw %%mm3, %%mm2 \n\t"
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10078
diff changeset
220 "movq (%%"REG_S",%%"REG_b"), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
221 "punpckhbw %%mm0, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
222 "pmullw %%mm6, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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parents: 10020
diff changeset
223 "psubusw %%mm3, %%mm2 \n\t"
13720
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parents: 10078
diff changeset
224 "movq (%%"REG_S",%%"REG_a",2), %%mm3 \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
225 "punpckhbw %%mm0, %%mm3 \n\t"
13720
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parents: 10078
diff changeset
226 "add $8, %%"REG_S" \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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parents: 10020
diff changeset
227 "pmullw %%mm7, %%mm3 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
228 "psubusw %%mm3, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
229 "psrlw $7, %%mm2 \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
230
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
231 "packuswb %%mm2, %%mm1 \n\t"
13720
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parents: 10078
diff changeset
232 "movq %%mm1, (%%"REG_D") \n\t"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
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parents: 10078
diff changeset
233 "add $8, %%"REG_D" \n\t"
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
234 "decl %%ecx \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
235 "jnz 4b \n\t"
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
236 : "=S"(crap1), "=D"(crap2)
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diff changeset
237 : "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd), "b"((long)-ssd), "d"(filter)
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
238 );
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
239 for (j=w-(w&7); j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
240 d[j] = (-9*s[j-ssd] + 111*s[j] + 29*s[j+ssd] - 3*s[j+ssd+ssd])>>7;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
241 d += ds;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
242 s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
243 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
244 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
245 d[j] = (s[j+ssd] + 3*s[j])>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
246 d += ds; s += ss;
23457
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reimar
parents: 18986
diff changeset
247 if (!up) fast_memcpy(d, s, w);
27754
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parents: 25221
diff changeset
248 __asm__ volatile("emms \n\t" : : : "memory");
10049
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diff changeset
249 }
10020
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diff changeset
250 #endif
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diff changeset
251
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diff changeset
252 static inline int clamp(int a)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
253 {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
254 // If a<512, this is equivalent to:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
255 // return (a<0) ? 0 : ( (a>255) ? 255 : a);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
256 return (~(a>>31)) & (a | ((a<<23)>>31));
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
257 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
258
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
259 static void qpel_li_C(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
10020
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diff changeset
260 {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
261 int i, j, ssd=ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
262 if (up) {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
263 ssd = -ss;
23457
a124f3abc1ec Replace implicit use of fast_memcpy via macro by explicit use to allow
reimar
parents: 18986
diff changeset
264 fast_memcpy(d, s, w);
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
265 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
266 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
267 }
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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parents: 10009
diff changeset
268 for (i=h-1; i; i--) {
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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parents: 10009
diff changeset
269 for (j=0; j<w; j++)
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
270 d[j] = (s[j+ssd] + 3*s[j])>>2;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
271 d += ds;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
272 s += ss;
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
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diff changeset
273 }
23457
a124f3abc1ec Replace implicit use of fast_memcpy via macro by explicit use to allow
reimar
parents: 18986
diff changeset
274 if (!up) fast_memcpy(d, s, w);
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
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parents: 9593
diff changeset
275 }
9514
08264c647f46 new filter
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parents:
diff changeset
276
10049
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diff changeset
277 static void qpel_4tap_C(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
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diff changeset
278 {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
279 int i, j, ssd=ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
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diff changeset
280 if (up) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
281 ssd = -ss;
23457
a124f3abc1ec Replace implicit use of fast_memcpy via macro by explicit use to allow
reimar
parents: 18986
diff changeset
282 fast_memcpy(d, s, w);
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
283 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
284 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
285 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
286 d[j] = (s[j+ssd] + 3*s[j] + 2)>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
287 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
288 for (i=h-3; i; i--) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
289 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
290 d[j] = clamp((-9*s[j-ssd] + 111*s[j] + 29*s[j+ssd] - 3*s[j+ssd+ssd] + 64)>>7);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
291 d += ds; s += ss;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
292 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
293 for (j=0; j<w; j++)
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
294 d[j] = (s[j+ssd] + 3*s[j] + 2)>>2;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
295 d += ds; s += ss;
23457
a124f3abc1ec Replace implicit use of fast_memcpy via macro by explicit use to allow
reimar
parents: 18986
diff changeset
296 if (!up) fast_memcpy(d, s, w);
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
297 }
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
298
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
299 static void (*qpel_li)(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up);
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
300 static void (*qpel_4tap)(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up);
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
301
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
302 static int continue_buffered_image(struct vf_instance_s *);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
303 extern int correct_pts;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
304
17906
20aca9baf5d8 passing pts through the filter layer (lets see if pts or cola comes out at the end)
michael
parents: 17012
diff changeset
305 static int put_image(struct vf_instance_s* vf, mp_image_t *mpi, double pts)
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
306 {
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
307 vf->priv->buffered_mpi = mpi;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
308 vf->priv->buffered_pts = pts;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
309 vf->priv->buffered_i = 0;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
310 return continue_buffered_image(vf);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
311 }
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
312
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
313 static int continue_buffered_image(struct vf_instance_s *vf)
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
314 {
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
315 int i=vf->priv->buffered_i;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
316 double pts = vf->priv->buffered_pts;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
317 mp_image_t *mpi = vf->priv->buffered_mpi;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
318 int ret=0;
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
319 mp_image_t *dmpi;
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
320 void (*qpel)(unsigned char *, unsigned char *, int, int, int, int, int);
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
diff changeset
321 int bpp=1;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
322 int tff;
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
diff changeset
323
18986
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
324 if (i == 0)
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
325 vf_queue_frame(vf, continue_buffered_image);
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
326 pts += i * .02; // XXX not right
d743c48823cc c++ decls, 100000000000l to whoever broke my code like this..
rfelker
parents: 18917
diff changeset
327
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
diff changeset
328 if (!(mpi->flags & MP_IMGFLAG_PLANAR)) bpp = mpi->bpp/8;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
329 if (vf->priv->parity < 0) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
330 if (mpi->fields & MP_IMGFIELD_ORDERED)
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
331 tff = mpi->fields & MP_IMGFIELD_TOP_FIRST;
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
332 else
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
333 tff = 1;
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
334 }
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
335 else tff = (vf->priv->parity&1)^1;
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
336
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
337 switch (vf->priv->mode) {
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
338 case 2:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
339 qpel = qpel_li;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
340 break;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
341 case 3:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
342 // TODO: add 3tap filter
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
343 qpel = qpel_4tap;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
344 break;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
345 case 4:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
346 qpel = qpel_4tap;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
347 break;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
348 }
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
349
08264c647f46 new filter
rfelker
parents:
diff changeset
350 switch (vf->priv->mode) {
08264c647f46 new filter
rfelker
parents:
diff changeset
351 case 0:
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
352 for (; i<2; i++) {
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
353 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
354 MP_IMGTYPE_EXPORT, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
355 mpi->width, mpi->height/2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
356 dmpi->planes[0] = mpi->planes[0] + (i^!tff)*mpi->stride[0];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
357 dmpi->stride[0] = 2*mpi->stride[0];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
358 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
359 dmpi->planes[1] = mpi->planes[1] + (i^!tff)*mpi->stride[1];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
360 dmpi->planes[2] = mpi->planes[2] + (i^!tff)*mpi->stride[2];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
361 dmpi->stride[1] = 2*mpi->stride[1];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
362 dmpi->stride[2] = 2*mpi->stride[2];
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
363 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
364 ret |= vf_next_put_image(vf, dmpi, pts);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
365 if (correct_pts)
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
366 break;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
367 else
28175
60402016152c Fix OSD flicker with tfields as well.
reimar
parents: 27754
diff changeset
368 if (!i) vf_extra_flip(vf);
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
369 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
370 break;
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
371 case 1:
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
372 for (; i<2; i++) {
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
373 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
374 MP_IMGTYPE_TEMP, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
375 mpi->width, mpi->height);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
376 my_memcpy_pic(dmpi->planes[0] + (i^!tff)*dmpi->stride[0],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
377 mpi->planes[0] + (i^!tff)*mpi->stride[0],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
378 mpi->w*bpp, mpi->h/2, dmpi->stride[0]*2, mpi->stride[0]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
379 deint(dmpi->planes[0], dmpi->stride[0], mpi->planes[0], mpi->stride[0], mpi->w, mpi->h, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
380 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
381 my_memcpy_pic(dmpi->planes[1] + (i^!tff)*dmpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
382 mpi->planes[1] + (i^!tff)*mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
383 mpi->chroma_width, mpi->chroma_height/2,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
384 dmpi->stride[1]*2, mpi->stride[1]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
385 my_memcpy_pic(dmpi->planes[2] + (i^!tff)*dmpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
386 mpi->planes[2] + (i^!tff)*mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
387 mpi->chroma_width, mpi->chroma_height/2,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
388 dmpi->stride[2]*2, mpi->stride[2]*2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
389 deint(dmpi->planes[1], dmpi->stride[1], mpi->planes[1], mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
390 mpi->chroma_width, mpi->chroma_height, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
391 deint(dmpi->planes[2], dmpi->stride[2], mpi->planes[2], mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
392 mpi->chroma_width, mpi->chroma_height, (i^!tff));
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
393 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
394 ret |= vf_next_put_image(vf, dmpi, pts);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
395 if (correct_pts)
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
396 break;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
397 else
28175
60402016152c Fix OSD flicker with tfields as well.
reimar
parents: 27754
diff changeset
398 if (!i) vf_extra_flip(vf);
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
399 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
400 break;
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
rfelker
parents: 9593
diff changeset
401 case 2:
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
402 case 3:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
403 case 4:
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
404 for (; i<2; i++) {
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
405 dmpi = vf_get_image(vf->next, mpi->imgfmt,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
406 MP_IMGTYPE_TEMP, MP_IMGFLAG_ACCEPT_STRIDE,
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
407 mpi->width, mpi->height/2);
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
408 qpel(dmpi->planes[0], mpi->planes[0] + (i^!tff)*mpi->stride[0],
15012
ad8815f740d3 1000l, last commit broke qpel interp entirely
rfelker
parents: 14888
diff changeset
409 mpi->w*bpp, mpi->h/2, dmpi->stride[0], mpi->stride[0]*2, (i^!tff));
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
410 if (mpi->flags & MP_IMGFLAG_PLANAR) {
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
411 qpel(dmpi->planes[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
412 mpi->planes[1] + (i^!tff)*mpi->stride[1],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
413 mpi->chroma_width, mpi->chroma_height/2,
15012
ad8815f740d3 1000l, last commit broke qpel interp entirely
rfelker
parents: 14888
diff changeset
414 dmpi->stride[1], mpi->stride[1]*2, (i^!tff));
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
415 qpel(dmpi->planes[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
416 mpi->planes[2] + (i^!tff)*mpi->stride[2],
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
417 mpi->chroma_width, mpi->chroma_height/2,
15012
ad8815f740d3 1000l, last commit broke qpel interp entirely
rfelker
parents: 14888
diff changeset
418 dmpi->stride[2], mpi->stride[2]*2, (i^!tff));
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
419 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
420 ret |= vf_next_put_image(vf, dmpi, pts);
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
421 if (correct_pts)
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
422 break;
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
423 else
28175
60402016152c Fix OSD flicker with tfields as well.
reimar
parents: 27754
diff changeset
424 if (!i) vf_extra_flip(vf);
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
rfelker
parents: 9593
diff changeset
425 }
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
426 break;
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
427 }
18917
d9a75b26da6c Add a new video pts tracking mode, enabled by option -correct-pts.
uau
parents: 17906
diff changeset
428 vf->priv->buffered_i = 1;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
429 return ret;
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
430 }
08264c647f46 new filter
rfelker
parents:
diff changeset
431
24605
8a6f80593529 Disable unused query_format functions for now until they are
diego
parents: 23666
diff changeset
432 #if 0
9514
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parents:
diff changeset
433 static int query_format(struct vf_instance_s* vf, unsigned int fmt)
08264c647f46 new filter
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parents:
diff changeset
434 {
08264c647f46 new filter
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parents:
diff changeset
435 /* FIXME - figure out which other formats work */
08264c647f46 new filter
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parents:
diff changeset
436 switch (fmt) {
08264c647f46 new filter
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parents:
diff changeset
437 case IMGFMT_YV12:
08264c647f46 new filter
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parents:
diff changeset
438 case IMGFMT_IYUV:
08264c647f46 new filter
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parents:
diff changeset
439 case IMGFMT_I420:
08264c647f46 new filter
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parents:
diff changeset
440 return vf_next_query_format(vf, fmt);
08264c647f46 new filter
rfelker
parents:
diff changeset
441 }
08264c647f46 new filter
rfelker
parents:
diff changeset
442 return 0;
08264c647f46 new filter
rfelker
parents:
diff changeset
443 }
24605
8a6f80593529 Disable unused query_format functions for now until they are
diego
parents: 23666
diff changeset
444 #endif
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
445
08264c647f46 new filter
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parents:
diff changeset
446 static int config(struct vf_instance_s* vf,
08264c647f46 new filter
rfelker
parents:
diff changeset
447 int width, int height, int d_width, int d_height,
08264c647f46 new filter
rfelker
parents:
diff changeset
448 unsigned int flags, unsigned int outfmt)
08264c647f46 new filter
rfelker
parents:
diff changeset
449 {
08264c647f46 new filter
rfelker
parents:
diff changeset
450 switch (vf->priv->mode) {
08264c647f46 new filter
rfelker
parents:
diff changeset
451 case 0:
10009
69f10d08c3be new mode for tfields filter -- shifts fields by a quarter-pixel so the
rfelker
parents: 9593
diff changeset
452 case 2:
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
453 case 3:
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
454 case 4:
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
455 return vf_next_config(vf,width,height/2,d_width,d_height,flags,outfmt);
08264c647f46 new filter
rfelker
parents:
diff changeset
456 case 1:
08264c647f46 new filter
rfelker
parents:
diff changeset
457 return vf_next_config(vf,width,height,d_width,d_height,flags,outfmt);
08264c647f46 new filter
rfelker
parents:
diff changeset
458 }
08264c647f46 new filter
rfelker
parents:
diff changeset
459 return 0;
08264c647f46 new filter
rfelker
parents:
diff changeset
460 }
08264c647f46 new filter
rfelker
parents:
diff changeset
461
08264c647f46 new filter
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parents:
diff changeset
462 static void uninit(struct vf_instance_s* vf)
08264c647f46 new filter
rfelker
parents:
diff changeset
463 {
08264c647f46 new filter
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parents:
diff changeset
464 free(vf->priv);
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rfelker
parents:
diff changeset
465 }
08264c647f46 new filter
rfelker
parents:
diff changeset
466
08264c647f46 new filter
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parents:
diff changeset
467 static int open(vf_instance_t *vf, char* args)
08264c647f46 new filter
rfelker
parents:
diff changeset
468 {
08264c647f46 new filter
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parents:
diff changeset
469 struct vf_priv_s *p;
08264c647f46 new filter
rfelker
parents:
diff changeset
470 vf->config = config;
08264c647f46 new filter
rfelker
parents:
diff changeset
471 vf->put_image = put_image;
10078
379f48cace77 support more image formats. hopefully this bpp handling is correct...
rfelker
parents: 10052
diff changeset
472 //vf->query_format = query_format;
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
473 vf->uninit = uninit;
08264c647f46 new filter
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parents:
diff changeset
474 vf->default_reqs = VFCAP_ACCEPT_STRIDE;
08264c647f46 new filter
rfelker
parents:
diff changeset
475 vf->priv = p = calloc(1, sizeof(struct vf_priv_s));
15013
0bb95cd581b6 sane default mode
rfelker
parents: 15012
diff changeset
476 vf->priv->mode = 4;
14888
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
477 vf->priv->parity = -1;
32dcf8672086 configurable field parity (default from source); bugfixes; speed up mode 0
rfelker
parents: 13720
diff changeset
478 if (args) sscanf(args, "%d:%d", &vf->priv->mode, &vf->priv->parity);
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
479 qpel_li = qpel_li_C;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
480 qpel_4tap = qpel_4tap_C;
28290
25337a2147e7 Lots and lots of #ifdef ARCH_... -> #if ARCH_...
reimar
parents: 28175
diff changeset
481 #if HAVE_MMX
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
482 if(gCpuCaps.hasMMX) qpel_li = qpel_li_MMX;
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
483 if(gCpuCaps.hasMMX) qpel_4tap = qpel_4tap_MMX;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
484 #endif
28290
25337a2147e7 Lots and lots of #ifdef ARCH_... -> #if ARCH_...
reimar
parents: 28175
diff changeset
485 #if HAVE_MMX2
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
486 if(gCpuCaps.hasMMX2) qpel_li = qpel_li_MMX2;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
487 #endif
28335
31287e75b5d8 HAVE_3DNOW --> HAVE_AMD3DNOW
diego
parents: 28290
diff changeset
488 #if HAVE_AMD3DNOW
10049
765c2276aa0c more 10l's -- fortunately part of the bug was that the buggy code didn't get called...
rfelker
parents: 10020
diff changeset
489 if(gCpuCaps.has3DNow) qpel_li = qpel_li_3DNOW;
10020
9829b7e61b55 new mmx/mmx2/3dnow code for improved performance
rfelker
parents: 10009
diff changeset
490 #endif
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
491 return 1;
08264c647f46 new filter
rfelker
parents:
diff changeset
492 }
08264c647f46 new filter
rfelker
parents:
diff changeset
493
25221
00fff9a3b735 Make all vf_info_t structs const
reimar
parents: 24605
diff changeset
494 const vf_info_t vf_info_tfields = {
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
495 "temporal field separation",
08264c647f46 new filter
rfelker
parents:
diff changeset
496 "tfields",
08264c647f46 new filter
rfelker
parents:
diff changeset
497 "Rich Felker",
08264c647f46 new filter
rfelker
parents:
diff changeset
498 "",
9593
e9a2af584986 Add the new -vf option wich is the same as vop in reverse order.
albeu
parents: 9514
diff changeset
499 open,
e9a2af584986 Add the new -vf option wich is the same as vop in reverse order.
albeu
parents: 9514
diff changeset
500 NULL
9514
08264c647f46 new filter
rfelker
parents:
diff changeset
501 };
08264c647f46 new filter
rfelker
parents:
diff changeset
502
08264c647f46 new filter
rfelker
parents:
diff changeset
503