annotate cpudetect.h @ 28505:f3fa6fe243e6

Ignore errors from all rm commands in clean targets. This way make will not stop on failure and remove as much as possible.
author diego
date Thu, 12 Feb 2009 12:32:16 +0000
parents 3ec634fbcd27
children b089d639e810
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
26029
4129c8cfa742 Add MPLAYER_ prefix to multiple inclusion guards.
diego
parents: 25530
diff changeset
1 #ifndef MPLAYER_CPUDETECT_H
4129c8cfa742 Add MPLAYER_ prefix to multiple inclusion guards.
diego
parents: 25530
diff changeset
2 #define MPLAYER_CPUDETECT_H
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
3
2281
arpi
parents: 2280
diff changeset
4 #define CPUTYPE_I386 3
arpi
parents: 2280
diff changeset
5 #define CPUTYPE_I486 4
arpi
parents: 2280
diff changeset
6 #define CPUTYPE_I586 5
arpi
parents: 2280
diff changeset
7 #define CPUTYPE_I686 6
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
8
28288
3ec634fbcd27 Fix first handful of #if vs. #ifdef for ARCH_, HAVE_SSE etc.
reimar
parents: 27926
diff changeset
9 #if ARCH_X86_64
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
10 # define REGa rax
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
11 # define REGb rbx
18391
michael
parents: 13720
diff changeset
12 # define REGBP rbp
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
13 # define REGSP rsp
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
14 # define REG_a "rax"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
15 # define REG_b "rbx"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
16 # define REG_c "rcx"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
17 # define REG_d "rdx"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
18 # define REG_S "rsi"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
19 # define REG_D "rdi"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
20 # define REG_SP "rsp"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
21 # define REG_BP "rbp"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
22 #else
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
23 # define REGa eax
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
24 # define REGb ebx
18391
michael
parents: 13720
diff changeset
25 # define REGBP ebp
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
26 # define REGSP esp
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
27 # define REG_a "eax"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
28 # define REG_b "ebx"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
29 # define REG_c "ecx"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
30 # define REG_d "edx"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
31 # define REG_S "esi"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
32 # define REG_D "edi"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
33 # define REG_SP "esp"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
34 # define REG_BP "ebp"
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
35 #endif
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 10885
diff changeset
36
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
37 typedef struct cpucaps_s {
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
38 int cpuType;
18538
739849dfb699 Retrieve CPU built-in namestring, and if it exists, print it during cpu detection; t it doesn't exist, fallback to the cpu table. Patch by Zuxy Meng
gpoirier
parents: 18391
diff changeset
39 int cpuModel;
3403
c4ca766a2d05 added cpuStepping to CpuCaps struct (needed win32.c)
alex
parents: 3146
diff changeset
40 int cpuStepping;
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
41 int hasMMX;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
42 int hasMMX2;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
43 int has3DNow;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
44 int has3DNowExt;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
45 int hasSSE;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
46 int hasSSE2;
27926
a02c39208d49 Add detection of x86 CPU features SSSE3 and SSE4a.
gpoirier
parents: 26029
diff changeset
47 int hasSSSE3;
a02c39208d49 Add detection of x86 CPU features SSSE3 and SSE4a.
gpoirier
parents: 26029
diff changeset
48 int hasSSE4a;
3146
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2303
diff changeset
49 int isX86;
8860
778989dba3a2 cpu cache line length detection
arpi
parents: 3403
diff changeset
50 unsigned cl_size; /* size of cache line */
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
51 int hasAltiVec;
10885
685c416f12b5 cpuspeed detection for X86 TSC capable CPUs (also added TSC detection, should best be verified by some people with TSC/nonTSC capable CPUs)
atmos4
parents: 9003
diff changeset
52 int hasTSC;
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
53 } CpuCaps;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
54
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
55 extern CpuCaps gCpuCaps;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
56
2301
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2281
diff changeset
57 void GetCpuCaps(CpuCaps *caps);
2303
456e22bfb147 returns a malloc()'ed string instead of an auto char[]
pl
parents: 2301
diff changeset
58
456e22bfb147 returns a malloc()'ed string instead of an auto char[]
pl
parents: 2301
diff changeset
59 /* returned value is malloc()'ed so free() it after use */
2301
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2281
diff changeset
60 char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]);
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
61
26029
4129c8cfa742 Add MPLAYER_ prefix to multiple inclusion guards.
diego
parents: 25530
diff changeset
62 #endif /* MPLAYER_CPUDETECT_H */