Mercurial > mplayer.hg
comparison drivers/hacking.ati @ 30990:0ad2da052b2e
the great MPlayer tab removal: part I
author | diego |
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date | Mon, 12 Apr 2010 10:56:17 +0000 |
parents | 0f1b5b68af32 |
children |
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30989:686241d65b86 | 30990:0ad2da052b2e |
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1 ATI chips hacking | 1 ATI chips hacking |
2 ================= | 2 ================= |
3 Dedicated to ATI's hackers. | 3 Dedicated to ATI's hackers. |
4 | 4 |
5 Preface | 5 Preface |
6 ~~~~~~~ | 6 ~~~~~~~ |
7 This document will compare ATI chips only from point of DAC and video overlay. | 7 This document will compare ATI chips only from point of DAC and video overlay. |
8 There are lots of difference from 3D point, dual-head support, tv-out support | 8 There are lots of difference from 3D point, dual-head support, tv-out support |
9 and many other things but it's already perfectly different story. | 9 and many other things but it's already perfectly different story. |
10 This document doesn't include information about ATI AIW (All In Wonder) chips. | 10 This document doesn't include information about ATI AIW (All In Wonder) chips. |
11 | 11 |
12 What are units on modern ATI chips: | 12 What are units on modern ATI chips: |
13 DAC - (Digital to Analog Convertor) controls CRTC, LCD, DFP monitor's output | 13 DAC - (Digital to Analog Convertor) controls CRTC, LCD, DFP monitor's output |
14 Consists from: | 14 Consists from: |
15 PLL - (Programable line length) registers | 15 PLL - (Programable line length) registers |
16 CRTC - CRT controller | 16 CRTC - CRT controller |
17 LCD/DFP scaler | 17 LCD/DFP scaler |
18 surface control | 18 surface control |
19 DAC2 - controls CRTC, LCD, DFP monitor's output on second head | 19 DAC2 - controls CRTC, LCD, DFP monitor's output on second head |
20 TVDAC - controls Composite Video and Super Video output ports | 20 TVDAC - controls Composite Video and Super Video output ports |
21 Consists from: | 21 Consists from: |
22 TV_PLL | 22 TV_PLL |
23 TV scaler & sync unit | 23 TV scaler & sync unit |
24 TV format convertor (PAL/NTSC) | 24 TV format convertor (PAL/NTSC) |
25 TVCAP - controls Video-In port | 25 TVCAP - controls Video-In port |
26 MPP - Miscellaneous peripheral port. (includes macrovision's filter - copy | 26 MPP - Miscellaneous peripheral port. (includes macrovision's filter - copy |
27 protection mechanism) | 27 protection mechanism) |
28 OV - Video overlay (YUV BES) (include subpictures, gamma correction and | 28 OV - Video overlay (YUV BES) (include subpictures, gamma correction and |
29 adaptive deinterlacing) | 29 adaptive deinterlacing) |
30 CAP0 - Video capturing | 30 CAP0 - Video capturing |
31 CAP1 - Video capturing (second unit) | 31 CAP1 - Video capturing (second unit) |
32 RT - Rage theatre: video encoding and mixing | 32 RT - Rage theatre: video encoding and mixing |
59 1. Mach8 | 59 1. Mach8 |
60 2. Mach16 | 60 2. Mach16 |
61 3. Mach32 | 61 3. Mach32 |
62 | 62 |
63 4. Mach64. | 63 4. Mach64. |
64 It's first chip which has support from side of open | 64 It's first chip which has support from side of open |
65 source drivers. Set of mach64 chips is: | 65 source drivers. Set of mach64 chips is: |
66 mach64GX (ATI888GX00) | 66 mach64GX (ATI888GX00) |
67 mach64CX (ATI888CX00) | 67 mach64CX (ATI888CX00) |
68 mach64CT (ATI264CT) | 68 mach64CT (ATI264CT) |
69 mach64ET (ATI264ET) | 69 mach64ET (ATI264ET) |
70 mach64VTA3 (ATI264VT) | 70 mach64VTA3 (ATI264VT) |
71 mach64VTA4 (ATI264VT) | 71 mach64VTA4 (ATI264VT) |
72 mach64VTB (ATI264VTB) | 72 mach64VTB (ATI264VTB) |
73 mach64VT4 (ATI264VT4) | 73 mach64VT4 (ATI264VT4) |
74 | 74 |
75 5. 3D rage chips. | 75 5. 3D rage chips. |
76 It seems that these chips have fully compatible by GPU with Mach64 | 76 It seems that these chips have fully compatible by GPU with Mach64 |
77 which is extended by 3D possibilities. Set of 3D rage chips is: | 77 which is extended by 3D possibilities. Set of 3D rage chips is: |
78 3D RAGE (GT) | 78 3D RAGE (GT) |
79 3D RAGE II+ (GTB) | 79 3D RAGE II+ (GTB) |
80 3D RAGE IIC (PCI) | 80 3D RAGE IIC (PCI) |
81 3D RAGE IIC (AGP) | 81 3D RAGE IIC (AGP) |
82 3D RAGE LT | 82 3D RAGE LT |
83 3D RAGE LT-G | 83 3D RAGE LT-G |
84 3D RAGE PRO (BGA, AGP) | 84 3D RAGE PRO (BGA, AGP) |
85 3D RAGE PRO (BGA, AGP, 1x only) | 85 3D RAGE PRO (BGA, AGP, 1x only) |
86 3D RAGE PRO (BGA, PCI) | 86 3D RAGE PRO (BGA, PCI) |
87 3D RAGE PRO (PQFP, PCI) | 87 3D RAGE PRO (PQFP, PCI) |
88 3D RAGE PRO (PQFP, PCI, limited 3D) | 88 3D RAGE PRO (PQFP, PCI, limited 3D) |
89 3D RAGE (XL) | 89 3D RAGE (XL) |
90 3D RAGE LT PRO (AGP) | 90 3D RAGE LT PRO (AGP) |
91 3D RAGE LT PRO (PCI) | 91 3D RAGE LT PRO (PCI) |
92 3D RAGE Mobility (PCI) | 92 3D RAGE Mobility (PCI) |
93 3D RAGE Mobility (AGP) | 93 3D RAGE Mobility (AGP) |
94 | 94 |
95 6. Rage128 chips. | 95 6. Rage128 chips. |
96 These chips have perfectly new GPU which supports memory mapped IO | 96 These chips have perfectly new GPU which supports memory mapped IO |
97 space for accelerating port access (It's main cause of incompatibility | 97 space for accelerating port access (It's main cause of incompatibility |
98 with mach64). Set of Rage128 chips is: | 98 with mach64). Set of Rage128 chips is: |
99 Rage128 GL RE | 99 Rage128 GL RE |
100 Rage128 GL RF | 100 Rage128 GL RF |
101 Rage128 GL RG | 101 Rage128 GL RG |
102 Rage128 GL RH | 102 Rage128 GL RH |
103 Rage128 GL RI | 103 Rage128 GL RI |
104 Rage128 VR RK | 104 Rage128 VR RK |
105 Rage128 VR RL | 105 Rage128 VR RL |
106 Rage128 VR RM | 106 Rage128 VR RM |
107 Rage128 VR RN | 107 Rage128 VR RN |
108 Rage128 VR RO | 108 Rage128 VR RO |
109 Rage128 Mobility M3 LE | 109 Rage128 Mobility M3 LE |
110 Rage128 Mobility M3 LF | 110 Rage128 Mobility M3 LF |
111 7. Rage128Pro chips. | 111 7. Rage128Pro chips. |
112 These chips are successors of Rage128 ones. | 112 These chips are successors of Rage128 ones. |
113 Rage128Pro GL PA | 113 Rage128Pro GL PA |
114 Rage128Pro GL PB | 114 Rage128Pro GL PB |
115 Rage128Pro GL PC | 115 Rage128Pro GL PC |
116 Rage128Pro GL PD | 116 Rage128Pro GL PD |
117 Rage128Pro GL PE | 117 Rage128Pro GL PE |
118 Rage128Pro GL PF | 118 Rage128Pro GL PF |
119 Rage128Pro VR PG | 119 Rage128Pro VR PG |
120 Rage128Pro VR PH | 120 Rage128Pro VR PH |
121 Rage128Pro VR PI | 121 Rage128Pro VR PI |
122 Rage128Pro VR PJ | 122 Rage128Pro VR PJ |
123 Rage128Pro VR PK | 123 Rage128Pro VR PK |
124 Rage128Pro VR PL | 124 Rage128Pro VR PL |
125 Rage128Pro VR PM | 125 Rage128Pro VR PM |
126 Rage128Pro VR PN | 126 Rage128Pro VR PN |
127 Rage128Pro VR PO | 127 Rage128Pro VR PO |
128 Rage128Pro VR PP | 128 Rage128Pro VR PP |
129 Rage128Pro VR PQ | 129 Rage128Pro VR PQ |
130 Rage128Pro VR PR | 130 Rage128Pro VR PR |
131 Rage128Pro VR TR | 131 Rage128Pro VR TR |
132 Rage128Pro VR PS | 132 Rage128Pro VR PS |
133 Rage128Pro VR PT | 133 Rage128Pro VR PT |
134 Rage128Pro VR PU | 134 Rage128Pro VR PU |
135 Rage128Pro VR PV | 135 Rage128Pro VR PV |
136 Rage128Pro VR PW | 136 Rage128Pro VR PW |
137 Rage128Pro VR PX | 137 Rage128Pro VR PX |
138 Rage128Pro Ultra U1 | 138 Rage128Pro Ultra U1 |
139 Rage128Pro Ultra U2 | 139 Rage128Pro Ultra U2 |
140 Rage128Pro Ultra U3 | 140 Rage128Pro Ultra U3 |
141 | 141 |
142 8. Radeon chips. | 142 8. Radeon chips. |
143 Indeed they could be named Rage256 Pro. (With minor changes is fully | 143 Indeed they could be named Rage256 Pro. (With minor changes is fully |
144 compatible with Rage128 chips). | 144 compatible with Rage128 chips). |
145 Radeon QD | 145 Radeon QD |
146 Radeon QE | 146 Radeon QE |
147 Radeon QF | 147 Radeon QF |
148 Radeon QG | 148 Radeon QG |
149 Radeon VE QY | 149 Radeon VE QY |
150 Radeon VE QZ | 150 Radeon VE QZ |
151 Radeon M6 LY | 151 Radeon M6 LY |
152 Radeon M6 LZ | 152 Radeon M6 LZ |
153 Radeon M7 LW | 153 Radeon M7 LW |
154 9. Radeon2 chips. | 154 9. Radeon2 chips. |
155 Indeed they could be named Rage512 Pro. | 155 Indeed they could be named Rage512 Pro. |
156 Radeon2 8500 QL | 156 Radeon2 8500 QL |
157 Radeon2 7500 QW | 157 Radeon2 7500 QW |
158 | 158 |
159 10. Radeon3 and newest are cooming soon, but I hope that they will be fully | 159 10. Radeon3 and newest are cooming soon, but I hope that they will be fully |
160 compatible with Radeon1 chips. | 160 compatible with Radeon1 chips. |
161 | 161 |
162 In Radeon famility there were introduced also FX chips: Radeon FX and | 162 In Radeon famility there were introduced also FX chips: Radeon FX and |
183 (The piece of Back-End Scaler programming) | 183 (The piece of Back-End Scaler programming) |
184 | 184 |
185 Sample for Mach64 compatible chips: | 185 Sample for Mach64 compatible chips: |
186 *********************************** | 186 *********************************** |
187 | 187 |
188 #define SPARSE_IO_BASE 0x03fcu | 188 #define SPARSE_IO_BASE 0x03fcu |
189 #define SPARSE_IO_SELECT 0xfc00u | 189 #define SPARSE_IO_SELECT 0xfc00u |
190 | 190 |
191 #define BLOCK_IO_BASE 0xff00u | 191 #define BLOCK_IO_BASE 0xff00u |
192 #define BLOCK_IO_SELECT 0x00fcu | 192 #define BLOCK_IO_SELECT 0x00fcu |
193 | 193 |
194 #define MM_IO_SELECT 0x03fcu | 194 #define MM_IO_SELECT 0x03fcu |
195 #define BLOCK_SELECT 0x0400u | 195 #define BLOCK_SELECT 0x0400u |
196 #define DWORD_SELECT (BLOCK_SELECT | MM_IO_SELECT) | 196 #define DWORD_SELECT (BLOCK_SELECT | MM_IO_SELECT) |
197 | 197 |
198 #define IO_BYTE_SELECT 0x0003u | 198 #define IO_BYTE_SELECT 0x0003u |
199 | 199 |
200 #define SPARSE_IO_PORT (SPARSE_IO_BASE | IO_BYTE_SELECT) | 200 #define SPARSE_IO_PORT (SPARSE_IO_BASE | IO_BYTE_SELECT) |
201 #define BLOCK_IO_PORT (BLOCK_IO_BASE | IO_BYTE_SELECT) | 201 #define BLOCK_IO_PORT (BLOCK_IO_BASE | IO_BYTE_SELECT) |
202 | 202 |
203 #define IOPortTag(_SparseIOSelect, _BlockIOSelect) \ | 203 #define IOPortTag(_SparseIOSelect, _BlockIOSelect) \ |
204 (SetBits(_SparseIOSelect, SPARSE_IO_SELECT) | \ | 204 (SetBits(_SparseIOSelect, SPARSE_IO_SELECT) | \ |
205 SetBits(_BlockIOSelect, BLOCK_SELECT | MM_IO_SELECT)) | 205 SetBits(_BlockIOSelect, BLOCK_SELECT | MM_IO_SELECT)) |
206 #define SparseIOTag(_IOSelect) IOPortTag(_IOSelect, 0) | 206 #define SparseIOTag(_IOSelect) IOPortTag(_IOSelect, 0) |
207 #define BlockIOTag(_IOSelect) IOPortTag(0, _IOSelect) | 207 #define BlockIOTag(_IOSelect) IOPortTag(0, _IOSelect) |
208 | 208 |
209 ... | 209 ... |
210 | 210 |
211 #define OVERLAY_Y_X_START BlockIOTag(0x100u) | 211 #define OVERLAY_Y_X_START BlockIOTag(0x100u) |
212 #define OVERLAY_Y_X_END BlockIOTag(0x101u) | 212 #define OVERLAY_Y_X_END BlockIOTag(0x101u) |
213 | 213 |
214 ... | 214 ... |
215 | 215 |
216 #define OUTREG(_Register, _Value) \ | 216 #define OUTREG(_Register, _Value) \ |
217 MMIO_OUT32(pATI->pBlock[GetBits(_Register, BLOCK_SELECT)], \ | 217 MMIO_OUT32(pATI->pBlock[GetBits(_Register, BLOCK_SELECT)], \ |
229 #define OV0_Y_X_START 0x0400 | 229 #define OV0_Y_X_START 0x0400 |
230 #define OV0_Y_X_END 0x0404 | 230 #define OV0_Y_X_END 0x0404 |
231 | 231 |
232 ... | 232 ... |
233 | 233 |
234 #define INREG(addr) readl((rage_mmio_base)+addr) | 234 #define INREG(addr) readl((rage_mmio_base)+addr) |
235 #define OUTREG(addr,val) writel(val, (rage_mmio_base)+addr) | 235 #define OUTREG(addr,val) writel(val, (rage_mmio_base)+addr) |
236 | 236 |
237 ... | 237 ... |
238 | 238 |
239 rage_mmio_base = ioremap_nocache(pci_resource_start (dev, 2),RAGE_REGSIZE); | 239 rage_mmio_base = ioremap_nocache(pci_resource_start (dev, 2),RAGE_REGSIZE); |
240 | 240 |
261 http://www.linuxvideo.org | 261 http://www.linuxvideo.org |
262 GATOS was designed and introduced as General ATI TV and Overlay Sowfware. | 262 GATOS was designed and introduced as General ATI TV and Overlay Sowfware. |
263 You will be able to find out there a lots of useful hacking utilities | 263 You will be able to find out there a lots of useful hacking utilities |
264 (at location gatos-ati/gatos): | 264 (at location gatos-ati/gatos): |
265 gfxdump - Program for dumping graphics chips registers on Linux and Windows 9X. | 265 gfxdump - Program for dumping graphics chips registers on Linux and Windows 9X. |
266 (it's more useful for Win9x to hack their values). | 266 (it's more useful for Win9x to hack their values). |
267 xatitv - For working with tv-in (currently is under hard development) | 267 xatitv - For working with tv-in (currently is under hard development) |
268 atitvout- For working with tv-out | 268 atitvout- For working with tv-out |
269 and lot of other stuff. | 269 and lot of other stuff. |
270 BUT: After studing of Gatos and X11 stuffs I've found that they are bad | 270 BUT: After studing of Gatos and X11 stuffs I've found that they are bad |
271 optimized for movie playback. | 271 optimized for movie playback. |
272 Please compare: | 272 Please compare: |
273 radeon_vid - configures video overlay only once and provides DGA to it. | 273 radeon_vid - configures video overlay only once and provides DGA to it. |
274 (doesn't require to be MMX optimized) | 274 (doesn't require to be MMX optimized) |
275 gatos and X11 - configures video overlay at every slice of frame, then | 275 gatos and X11 - configures video overlay at every slice of frame, then |
276 performs unoptimized copying of source stuff to video memory | 276 performs unoptimized copying of source stuff to video memory |
277 often with using CopyMungedData (it's C-analog of YV12_to_YUY2) | 277 often with using CopyMungedData (it's C-analog of YV12_to_YUY2) |
278 since there are lacks in yv12 support. | 278 since there are lacks in yv12 support. |
279 (is not MMX optimized that's gladly accepted, but probably | 279 (is not MMX optimized that's gladly accepted, but probably |
280 will be never optimized due portability). | 280 will be never optimized due portability). |
281 | 281 |
282 hardware IDCT support diagram: | 282 hardware IDCT support diagram: |
283 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | 283 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |