comparison drivers/radeon/radeon.h @ 2033:25461be8d234

i2c and rage-theatre registers and their bit-constants
author nick
date Mon, 01 Oct 2001 16:33:39 +0000
parents 4e3e03effdac
children 11cae7a32291
comparison
equal deleted inserted replaced
2032:b47575b96fee 2033:25461be8d234
16 #define PCI_DEVICE_ID_RV200_QW 0x5157 16 #define PCI_DEVICE_ID_RV200_QW 0x5157
17 17
18 #define RADEON_REGSIZE 0x4000 18 #define RADEON_REGSIZE 0x4000
19 19
20 20
21 #define MM_INDEX 0x0000 21 #define MM_INDEX 0x0000
22 /* MM_INDEX bit constants */ 22 /* MM_INDEX bit constants */
23 # define MM_APER 0x80000000 23 # define MM_APER 0x80000000
24 #define MM_DATA 0x0004 24 #define MM_DATA 0x0004
25 #define BUS_CNTL 0x0030 25 #define BUS_CNTL 0x0030
26 /* BUS_CNTL bit constants */ 26 /* BUS_CNTL bit constants */
48 # define BUS_READ_BURST 0x40000000 48 # define BUS_READ_BURST 0x40000000
49 # define BUS_RDY_READ_DLY 0x80000000 49 # define BUS_RDY_READ_DLY 0x80000000
50 #define HI_STAT 0x004C 50 #define HI_STAT 0x004C
51 #define BUS_CNTL1 0x0034 51 #define BUS_CNTL1 0x0034
52 # define BUS_WAIT_ON_LOCK_EN (1 << 4) 52 # define BUS_WAIT_ON_LOCK_EN (1 << 4)
53 #define I2C_CNTL_1 0x0094 53 #define I2C_CNTL_0 0x0090
54 # define I2C_DONE (1<<0)
55 # define I2C_NACK (1<<1)
56 # define I2C_HALT (1<<2)
57 # define I2C_SOFT_RST (1<<5)
58 # define I2C_DRIVE_EN (1<<6)
59 # define I2C_DRIVE_SEL (1<<7)
60 # define I2C_START (1<<8)
61 # define I2C_STOP (1<<9)
62 # define I2C_RECEIVE (1<<10)
63 # define I2C_ABORT (1<<11)
64 # define I2C_GO (1<<12)
65 # define I2C_SEL (1<<16)
66 # define I2C_EN (1<<17)
67 #define I2C_CNTL_1 0x0094
68 #define I2C_DATA 0x0098
54 #define CONFIG_CNTL 0x00E0 69 #define CONFIG_CNTL 0x00E0
55 /* CONFIG_CNTL bit constants */ 70 /* CONFIG_CNTL bit constants */
56 # define CFG_VGA_RAM_EN 0x00000100 71 # define CFG_VGA_RAM_EN 0x00000100
57 #define CONFIG_MEMSIZE 0x00F8 72 #define CONFIG_MEMSIZE 0x00F8
58 #define CONFIG_APER_0_BASE 0x0100 73 #define CONFIG_APER_0_BASE 0x0100
79 #define BM_STATUS 0x0160 94 #define BM_STATUS 0x0160
80 #define MPP_TB_CONFIG 0x01c0 /* ? */ 95 #define MPP_TB_CONFIG 0x01c0 /* ? */
81 #define MPP_GP_CONFIG 0x01c8 /* ? */ 96 #define MPP_GP_CONFIG 0x01c8 /* ? */
82 #define CAP0_TRIG_CNTL 0x0950 97 #define CAP0_TRIG_CNTL 0x0950
83 #define CAP1_TRIG_CNTL 0x09c0 /* ? */ 98 #define CAP1_TRIG_CNTL 0x09c0 /* ? */
84 #define VIPH_CONTROL 0x0C40
85 #define VENDOR_ID 0x0F00 99 #define VENDOR_ID 0x0F00
86 #define DEVICE_ID 0x0F02 100 #define DEVICE_ID 0x0F02
87 #define COMMAND 0x0F04 101 #define COMMAND 0x0F04
88 #define STATUS 0x0F06 102 #define STATUS 0x0F06
89 #define REVISION_ID 0x0F08 103 #define REVISION_ID 0x0F08
944 #define SOFT_RESET_VCLK 0x00000100 958 #define SOFT_RESET_VCLK 0x00000100
945 #define SOFT_RESET_PCLK 0x00000200 959 #define SOFT_RESET_PCLK 0x00000200
946 #define SOFT_RESET_ECP 0x00000400 960 #define SOFT_RESET_ECP 0x00000400
947 #define SOFT_RESET_DISPENG_XCLK 0x00000800 961 #define SOFT_RESET_DISPENG_XCLK 0x00000800
948 962
963
964 /* RAGE THEATER REGISTERS */
965
966 #define VIPH_CH0_DATA 0x0c00
967 #define VIPH_CH1_DATA 0x0c04
968 #define VIPH_CH2_DATA 0x0c08
969 #define VIPH_CH3_DATA 0x0c0c
970 #define VIPH_CH0_ADDR 0x0c10
971 #define VIPH_CH1_ADDR 0x0c14
972 #define VIPH_CH2_ADDR 0x0c18
973 #define VIPH_CH3_ADDR 0x0c1c
974 #define VIPH_CH0_SBCNT 0x0c20
975 #define VIPH_CH1_SBCNT 0x0c24
976 #define VIPH_CH2_SBCNT 0x0c28
977 #define VIPH_CH3_SBCNT 0x0c2c
978 #define VIPH_CH0_ABCNT 0x0c30
979 #define VIPH_CH1_ABCNT 0x0c34
980 #define VIPH_CH2_ABCNT 0x0c38
981 #define VIPH_CH3_ABCNT 0x0c3c
982 #define VIPH_CONTROL 0x0c40
983 #define VIPH_DV_LAT 0x0c44
984 #define VIPH_BM_CHUNK 0x0c48
985 #define VIPH_DV_INT 0x0c4c
986 #define VIPH_TIMEOUT_STAT 0x0c50
987
988 #define VIPH_REG_DATA 0x0084
989 #define VIPH_REG_ADDR 0x0080
990
991 /* Address Space Rage Theatre Registers (VIP Access) */
992 #define VIP_VIP_VENDOR_DEVICE_ID 0x0000
993 #define VIP_VIP_SUB_VENDOR_DEVICE_ID 0x0004
994 #define VIP_VIP_COMMAND_STATUS 0x0008
995 #define VIP_VIP_REVISION_ID 0x000c
996 #define VIP_HW_DEBUG 0x0010
997 #define VIP_SW_SCRATCH 0x0014
998 #define VIP_I2C_CNTL_0 0x0020
999 #define VIP_I2C_CNTL_1 0x0024
1000 #define VIP_I2C_DATA 0x0028
1001 #define VIP_INT_CNTL 0x002c
1002 #define VIP_GPIO_INOUT 0x0030
1003 #define VIP_GPIO_CNTL 0x0034
1004 #define VIP_CLKOUT_GPIO_CNTL 0x0038
1005 #define VIP_RIPINTF_PORT_CNTL 0x003c
1006 #define VIP_ADC_CNTL 0x0400
1007 #define VIP_ADC_DEBUG 0x0404
1008 #define VIP_STANDARD_SELECT 0x0408
1009 #define VIP_THERMO2BIN_STATUS 0x040c
1010 #define VIP_COMB_CNTL0 0x0440
1011 #define VIP_COMB_CNTL1 0x0444
1012 #define VIP_COMB_CNTL2 0x0448
1013 #define VIP_COMB_LINE_LENGTH 0x044c
1014 #define VIP_NOISE_CNTL0 0x0450
1015 #define VIP_HS_PLINE 0x0480
1016 #define VIP_HS_DTOINC 0x0484
1017 #define VIP_HS_PLLGAIN 0x0488
1018 #define VIP_HS_MINMAXWIDTH 0x048c
1019 #define VIP_HS_GENLOCKDELAY 0x0490
1020 #define VIP_HS_WINDOW_LIMIT 0x0494
1021 #define VIP_HS_WINDOW_OC_SPEED 0x0498
1022 #define VIP_HS_PULSE_WIDTH 0x049c
1023 #define VIP_HS_PLL_ERROR 0x04a0
1024 #define VIP_HS_PLL_FS_PATH 0x04a4
1025 #define VIP_SG_BLACK_GATE 0x04c0
1026 #define VIP_SG_SYNCTIP_GATE 0x04c4
1027 #define VIP_SG_UVGATE_GATE 0x04c8
1028 #define VIP_LP_AGC_CLAMP_CNTL0 0x0500
1029 #define VIP_LP_AGC_CLAMP_CNTL1 0x0504
1030 #define VIP_LP_BRIGHTNESS 0x0508
1031 #define VIP_LP_CONTRAST 0x050c
1032 #define VIP_LP_SLICE_LIMIT 0x0510
1033 #define VIP_LP_WPA_CNTL0 0x0514
1034 #define VIP_LP_WPA_CNTL1 0x0518
1035 #define VIP_LP_BLACK_LEVEL 0x051c
1036 #define VIP_LP_SLICE_LEVEL 0x0520
1037 #define VIP_LP_SYNCTIP_LEVEL 0x0524
1038 #define VIP_LP_VERT_LOCKOUT 0x0528
1039 #define VIP_VS_DETECTOR_CNTL 0x0540
1040 #define VIP_VS_BLANKING_CNTL 0x0544
1041 #define VIP_VS_FIELD_ID_CNTL 0x0548
1042 #define VIP_VS_COUNTER_CNTL 0x054c
1043 #define VIP_VS_FRAME_TOTAL 0x0550
1044 #define VIP_VS_LINE_COUNT 0x0554
1045 #define VIP_CP_PLL_CNTL0 0x0580
1046 #define VIP_CP_PLL_CNTL1 0x0584
1047 #define VIP_CP_HUE_CNTL 0x0588
1048 #define VIP_CP_BURST_GAIN 0x058c
1049 #define VIP_CP_AGC_CNTL 0x0590
1050 #define VIP_CP_ACTIVE_GAIN 0x0594
1051 #define VIP_CP_PLL_STATUS0 0x0598
1052 #define VIP_CP_PLL_STATUS1 0x059c
1053 #define VIP_CP_PLL_STATUS2 0x05a0
1054 #define VIP_CP_PLL_STATUS3 0x05a4
1055 #define VIP_CP_PLL_STATUS4 0x05a8
1056 #define VIP_CP_PLL_STATUS5 0x05ac
1057 #define VIP_CP_PLL_STATUS6 0x05b0
1058 #define VIP_CP_PLL_STATUS7 0x05b4
1059 #define VIP_CP_DEBUG_FORCE 0x05b8
1060 #define VIP_CP_VERT_LOCKOUT 0x05bc
1061 #define VIP_H_ACTIVE_WINDOW 0x05c0
1062 #define VIP_V_ACTIVE_WINDOW 0x05c4
1063 #define VIP_H_VBI_WINDOW 0x05c8
1064 #define VIP_V_VBI_WINDOW 0x05cc
1065 #define VIP_VBI_CONTROL 0x05d0
1066 #define VIP_DECODER_DEBUG_CNTL 0x05d4
1067 #define VIP_SINGLE_STEP_DATA 0x05d8
1068 #define VIP_MASTER_CNTL 0x0040
1069 #define VIP_RGB_CNTL 0x0048
1070 #define VIP_CLKOUT_CNTL 0x004c
1071 #define VIP_SYNC_CNTL 0x0050
1072 #define VIP_I2C_CNTL 0x0054
1073 #define VIP_HTOTAL 0x0080
1074 #define VIP_HDISP 0x0084
1075 #define VIP_HSIZE 0x0088
1076 #define VIP_HSTART 0x008c
1077 #define VIP_HCOUNT 0x0090
1078 #define VIP_VTOTAL 0x0094
1079 #define VIP_VDISP 0x0098
1080 #define VIP_VCOUNT 0x009c
1081 #define VIP_VFTOTAL 0x00a0
1082 #define VIP_DFCOUNT 0x00a4
1083 #define VIP_DFRESTART 0x00a8
1084 #define VIP_DHRESTART 0x00ac
1085 #define VIP_DVRESTART 0x00b0
1086 #define VIP_SYNC_SIZE 0x00b4
1087 #define VIP_TV_PLL_FINE_CNTL 0x00b8
1088 #define VIP_CRT_PLL_FINE_CNTL 0x00bc
1089 #define VIP_TV_PLL_CNTL 0x00c0
1090 #define VIP_CRT_PLL_CNTL 0x00c4
1091 #define VIP_PLL_CNTL0 0x00c8
1092 #define VIP_PLL_TEST_CNTL 0x00cc
1093 #define VIP_CLOCK_SEL_CNTL 0x00d0
1094 #define VIP_VIN_PLL_CNTL 0x00d4
1095 #define VIP_VIN_PLL_FINE_CNTL 0x00d8
1096 #define VIP_AUD_PLL_CNTL 0x00e0
1097 #define VIP_AUD_PLL_FINE_CNTL 0x00e4
1098 #define VIP_AUD_CLK_DIVIDERS 0x00e8
1099 #define VIP_AUD_DTO_INCREMENTS 0x00ec
1100 #define VIP_L54_PLL_CNTL 0x00f0
1101 #define VIP_L54_PLL_FINE_CNTL 0x00f4
1102 #define VIP_L54_DTO_INCREMENTS 0x00f8
1103 #define VIP_PLL_CNTL1 0x00fc
1104 #define VIP_FRAME_LOCK_CNTL 0x0100
1105 #define VIP_SYNC_LOCK_CNTL 0x0104
1106 #define VIP_TVO_SYNC_PAT_ACCUM 0x0108
1107 #define VIP_TVO_SYNC_THRESHOLD 0x010c
1108 #define VIP_TVO_SYNC_PAT_EXPECT 0x0110
1109 #define VIP_DELAY_ONE_MAP_A 0x0114
1110 #define VIP_DELAY_ONE_MAP_B 0x0118
1111 #define VIP_DELAY_ZERO_MAP_A 0x011c
1112 #define VIP_DELAY_ZERO_MAP_B 0x0120
1113 #define VIP_TVO_DATA_DELAY_A 0x0140
1114 #define VIP_TVO_DATA_DELAY_B 0x0144
1115 #define VIP_HOST_READ_DATA 0x0180
1116 #define VIP_HOST_WRITE_DATA 0x0184
1117 #define VIP_HOST_RD_WT_CNTL 0x0188
1118 #define VIP_VSCALER_CNTL1 0x01c0
1119 #define VIP_TIMING_CNTL 0x01c4
1120 #define VIP_VSCALER_CNTL2 0x01c8
1121 #define VIP_Y_FALL_CNTL 0x01cc
1122 #define VIP_Y_RISE_CNTL 0x01d0
1123 #define VIP_Y_SAW_TOOTH_CNTL 0x01d4
1124 #define VIP_UPSAMP_AND_GAIN_CNTL 0x01e0
1125 #define VIP_GAIN_LIMIT_SETTINGS 0x01e4
1126 #define VIP_LINEAR_GAIN_SETTINGS 0x01e8
1127 #define VIP_MODULATOR_CNTL1 0x0200
1128 #define VIP_MODULATOR_CNTL2 0x0204
1129 #define VIP_MV_MODE_CNTL 0x0208
1130 #define VIP_MV_STRIPE_CNTL 0x020c
1131 #define VIP_MV_LEVEL_CNTL1 0x0210
1132 #define VIP_MV_LEVEL_CNTL2 0x0214
1133 #define VIP_PRE_DAC_MUX_CNTL 0x0240
1134 #define VIP_TV_DAC_CNTL 0x0280
1135 #define VIP_CRC_CNTL 0x02c0
1136 #define VIP_VIDEO_PORT_SIG 0x02c4
1137 #define VIP_VBI_CC_CNTL 0x02c8
1138 #define VIP_VBI_EDS_CNTL 0x02cc
1139 #define VIP_VBI_20BIT_CNTL 0x02d0
1140 #define VIP_VBI_DTO_CNTL 0x02d4
1141 #define VIP_VBI_LEVEL_CNTL 0x02d8
1142 #define VIP_UV_ADR 0x0300
1143 #define VIP_MV_STATUS 0x0330
1144 #define VIP_UPSAMP_COEFF0_0 0x0340
1145 #define VIP_UPSAMP_COEFF0_1 0x0344
1146 #define VIP_UPSAMP_COEFF0_2 0x0348
1147 #define VIP_UPSAMP_COEFF1_0 0x034c
1148 #define VIP_UPSAMP_COEFF1_1 0x0350
1149 #define VIP_UPSAMP_COEFF1_2 0x0354
1150 #define VIP_UPSAMP_COEFF2_0 0x0358
1151 #define VIP_UPSAMP_COEFF2_1 0x035c
1152 #define VIP_UPSAMP_COEFF2_2 0x0360
1153 #define VIP_UPSAMP_COEFF3_0 0x0364
1154 #define VIP_UPSAMP_COEFF3_1 0x0368
1155 #define VIP_UPSAMP_COEFF3_2 0x036c
1156 #define VIP_UPSAMP_COEFF4_0 0x0370
1157 #define VIP_UPSAMP_COEFF4_1 0x0374
1158 #define VIP_UPSAMP_COEFF4_2 0x0378
1159 #define VIP_TV_DTO_INCREMENTS 0x0390
1160 #define VIP_CRT_DTO_INCREMENTS 0x0394
1161 #define VIP_VSYNC_DIFF_CNTL 0x03a0
1162 #define VIP_VSYNC_DIFF_LIMITS 0x03a4
1163 #define VIP_VSYNC_DIFF_RD_DATA 0x03a8
1164 #define VIP_SCALER_IN_WINDOW 0x0618
1165 #define VIP_SCALER_OUT_WINDOW 0x061c
1166 #define VIP_H_SCALER_CONTROL 0x0600
1167 #define VIP_V_SCALER_CONTROL 0x0604
1168 #define VIP_V_DEINTERLACE_CONTROL 0x0608
1169 #define VIP_VBI_SCALER_CONTROL 0x060c
1170 #define VIP_DVS_PORT_CTRL 0x0610
1171 #define VIP_DVS_PORT_READBACK 0x0614
1172 #define VIP_FIFOA_CONFIG 0x0800
1173 #define VIP_FIFOB_CONFIG 0x0804
1174 #define VIP_FIFOC_CONFIG 0x0808
1175 #define VIP_SPDIF_PORT_CNTL 0x080c
1176 #define VIP_SPDIF_CHANNEL_STAT 0x0810
1177 #define VIP_SPDIF_AC3_PREAMBLE 0x0814
1178 #define VIP_I2S_TRANSMIT_CNTL 0x0818
1179 #define VIP_I2S_RECEIVE_CNTL 0x081c
1180 #define VIP_SPDIF_TX_CNT_REG 0x0820
1181 #define VIP_IIS_TX_CNT_REG 0x0824
1182
1183 /* Status defines */
1184 #define VIP_BUSY 0
1185 #define VIP_IDLE 1
1186 #define VIP_RESET 2
1187
1188 #define VIPH_TIMEOUT_STAT__VIPH_REG_STAT 0x00000010
1189 #define VIPH_TIMEOUT_STAT__VIPH_REG_AK 0x00000010
1190 #define VIPH_TIMEOUT_STAT__VIPH_REGR_DIS 0x01000000
1191 #define TEST_DEBUG_CNTL__TEST_DEBUG_OUT_EN 0x00000001
1192
1193 #define RT_ATI_ID 0x4D541002
1194
1195 /* Register/Field values: */
1196 #define RT_COMP0 0x0
1197 #define RT_COMP1 0x1
1198 #define RT_COMP2 0x2
1199 #define RT_YF_COMP3 0x3
1200 #define RT_YR_COMP3 0x4
1201 #define RT_YCF_COMP4 0x5
1202 #define RT_YCR_COMP4 0x6
1203
1204 /* Video standard defines */
1205 #define RT_NTSC 0x0
1206 #define RT_PAL 0x1
1207 #define RT_SECAM 0x2
1208 #define extNONE 0x0000
1209 #define extNTSC 0x0100
1210 #define extRsvd 0x0200
1211 #define extPAL 0x0300
1212 #define extPAL_M 0x0400
1213 #define extPAL_N 0x0500
1214 #define extSECAM 0x0600
1215 #define extPAL_NCOMB 0x0700
1216 #define extNTSC_J 0x0800
1217 #define extNTSC_443 0x0900
1218 #define extPAL_BGHI 0x0A00
1219 #define extPAL_60 0x0B00
1220 /* these are used in MSP3430 */
1221 #define extPAL_DK1 0x0C00
1222 #define extPAL_AUTO 0x0D00
1223
1224 #define RT_FREF_2700 6
1225 #define RT_FREF_2950 5
1226
1227 #define RT_COMPOSITE 0x0
1228 #define RT_SVIDEO 0x1
1229
1230 #define RT_NORM_SHARPNESS 0x03
1231 #define RT_HIGH_SHARPNESS 0x0F
1232
1233 #define RT_HUE_PAL_DEF 0x00
1234
1235 #define RT_DECINTERLACED 0x1
1236 #define RT_DECNONINTERLACED 0x0
1237
1238 #define NTSC_LINES 525
1239 #define PAL_SECAM_LINES 625
1240
1241 #define RT_ASYNC_ENABLE 0x0
1242 #define RT_ASYNC_DISABLE 0x1
1243 #define RT_ASYNC_RESET 0x1
1244
1245 #define RT_VINRST_ACTIVE 0x0
1246 #define RT_VINRST_RESET 0x1
1247 #define RT_L54RST_RESET 0x1
1248
1249 #define RT_REF_CLK 0x0
1250 #define RT_PLL_VIN_CLK 0x1
1251
1252 #define RT_VIN_ASYNC_RST 0x20
1253 #define RT_DVS_ASYNC_RST 0x80
1254
1255 #define RT_ADC_ENABLE 0x0
1256 #define RT_ADC_DISABLE 0x1
1257
1258 #define RT_DVSDIR_IN 0x0
1259 #define RT_DVSDIR_OUT 0x1
1260
1261 #define RT_DVSCLK_HIGH 0x0
1262 #define RT_DVSCLK_LOW 0x1
1263
1264 #define RT_DVSCLK_SEL_8FS 0x0
1265 #define RT_DVSCLK_SEL_27MHZ 0x1
1266
1267 #define RT_DVS_CONTSTREAM 0x1
1268 #define RT_DVS_NONCONTSTREAM 0x0
1269
1270 #define RT_DVSDAT_HIGH 0x0
1271 #define RT_DVSDAT_LOW 0x1
1272
1273 #define RT_ADC_CNTL_DEFAULT 0x03252338
1274
1275 /* COMB_CNTL0 FILTER SETTINGS FOR DIFFERENT STANDARDS: */
1276 #define RT_NTSCM_COMB_CNTL0_COMPOSITE 0x09438090
1277 #define RT_NTSCM_COMB_CNTL0_SVIDEO 0x48540000
1278
1279 #define RT_PAL_COMB_CNTL0_COMPOSITE 0x09438090
1280 #define RT_PAL_COMB_CNTL0_SVIDEO 0x40348090
1281
1282 #define RT_SECAM_COMB_CNTL0_COMPOSITE 0xD0108090 /* instead of orig 0xD0088090 - eric*/
1283 #define RT_SECAM_COMB_CNTL0_SVIDEO 0x50148090
1284
1285 #define RT_PALN_COMB_CNTL0_COMPOSITE 0x09438090
1286 #define RT_PALN_COMB_CNTL0_SVIDEO 0x40348090
1287
1288 #define RT_PALM_COMB_CNTL0_COMPOSITE 0x09438090
1289 #define RT_PALM_COMB_CNTL0_SVIDEO 0x40348090
1290 /* End of filter settings. */
1291
1292 /* COMB_CNTL1 FILTER SETTINGS FOR DIFFERENT STANDARDS: */
1293 #define RT_NTSCM_COMB_CNTL1_COMPOSITE 0x00000010
1294 #define RT_NTSCM_COMB_CNTL1_SVIDEO 0x00000081
1295
1296 #define RT_PAL_COMB_CNTL1_COMPOSITE 0x00000010
1297 #define RT_PAL_COMB_CNTL1_SVIDEO 0x000000A1
1298
1299 #define RT_SECAM_COMB_CNTL1_COMPOSITE 0x00000091
1300 #define RT_SECAM_COMB_CNTL1_SVIDEO 0x00000081
1301
1302 #define RT_PALN_COMB_CNTL1_COMPOSITE 0x00000010
1303 #define RT_PALN_COMB_CNTL1_SVIDEO 0x000000A1
1304
1305 #define RT_PALM_COMB_CNTL1_COMPOSITE 0x00000010
1306 #define RT_PALM_COMB_CNTL1_SVIDEO 0x000000A1
1307 /* End of filter settings. */
1308
1309 /* COMB_CNTL2 FILTER SETTINGS FOR DIFFERENT STANDARDS: */
1310 #define RT_NTSCM_COMB_CNTL2_COMPOSITE 0x16161010
1311 #define RT_NTSCM_COMB_CNTL2_SVIDEO 0xFFFFFFFF
1312
1313 #define RT_PAL_COMB_CNTL2_COMPOSITE 0x06080102 /* instead of 0x16161010 - Ivo */
1314 #define RT_PAL_COMB_CNTL2_SVIDEO 0x06080102
1315
1316 #define RT_SECAM_COMB_CNTL2_COMPOSITE 0xffffffff /* instead of 0x06080102 - eric */
1317 #define RT_SECAM_COMB_CNTL2_SVIDEO 0x06080102
1318
1319 #define RT_PALN_COMB_CNTL2_COMPOSITE 0x06080102
1320 #define RT_PALN_COMB_CNTL2_SVIDEO 0x06080102
1321
1322 #define RT_PALM_COMB_CNTL2_COMPOSITE 0x06080102
1323 #define RT_PALM_COMB_CNTL2_SVIDEO 0x06080102
1324 /* End of filter settings. */
1325
1326 /* COMB_LINE_LENGTH FILTER SETTINGS FOR DIFFERENT STANDARDS: */
1327 #define RT_NTSCM_COMB_LENGTH_COMPOSITE 0x0718038A
1328 #define RT_NTSCM_COMB_LENGTH_SVIDEO 0x0718038A
1329
1330 #define RT_PAL_COMB_LENGTH_COMPOSITE 0x08DA046B
1331 #define RT_PAL_COMB_LENGTH_SVIDEO 0x08DA046B
1332
1333 #define RT_SECAM_COMB_LENGTH_COMPOSITE 0x08DA046A
1334 #define RT_SECAM_COMB_LENGTH_SVIDEO 0x08DA046A
1335
1336 #define RT_PALN_COMB_LENGTH_COMPOSITE 0x07260391
1337 #define RT_PALN_COMB_LENGTH_SVIDEO 0x07260391
1338
1339 #define RT_PALM_COMB_LENGTH_COMPOSITE 0x07160389
1340 #define RT_PALM_COMB_LENGTH_SVIDEO 0x07160389
1341 /* End of filter settings. */
1342
1343 /* LP_AGC_CLAMP_CNTL0 */
1344 #define RT_NTSCM_SYNCTIP_REF0 0x00000037
1345 #define RT_NTSCM_SYNCTIP_REF1 0x00000029
1346 #define RT_NTSCM_CLAMP_REF 0x0000003B
1347 #define RT_NTSCM_PEAKWHITE 0x000000FF
1348 #define RT_NTSCM_VBI_PEAKWHITE 0x000000C2
1349
1350 #define RT_NTSCM_WPA_THRESHOLD 0x00000406
1351 #define RT_NTSCM_WPA_TRIGGER_LO 0x000000B3
1352
1353 #define RT_NTSCM_WPA_TRIGGER_HIGH 0x0000021B
1354
1355 #define RT_NTSCM_LP_LOCKOUT_START 0x00000206
1356 #define RT_NTSCM_LP_LOCKOUT_END 0x00000021
1357 #define RT_NTSCM_CH_DTO_INC 0x00400000
1358 #define RT_NTSCM_CH_PLL_SGAIN 0x00000001
1359 #define RT_NTSCM_CH_PLL_FGAIN 0x00000002
1360
1361 #define RT_NTSCM_CR_BURST_GAIN 0x0000007A
1362 #define RT_NTSCM_CB_BURST_GAIN 0x000000AC
1363
1364 #define RT_NTSCM_CH_HEIGHT 0x000000CD
1365 #define RT_NTSCM_CH_KILL_LEVEL 0x000000C0
1366 #define RT_NTSCM_CH_AGC_ERROR_LIM 0x00000002
1367 #define RT_NTSCM_CH_AGC_FILTER_EN 0x00000000
1368 #define RT_NTSCM_CH_AGC_LOOP_SPEED 0x00000000
1369
1370 #define RT_NTSCM_CRDR_ACTIVE_GAIN 0x0000007A
1371 #define RT_NTSCM_CBDB_ACTIVE_GAIN 0x000000AC
1372
1373 #define RT_NTSCM_VERT_LOCKOUT_START 0x00000207
1374 #define RT_NTSCM_VERT_LOCKOUT_END 0x0000000E
1375
1376 #define RT_NTSCJ_SYNCTIP_REF0 0x00000004
1377 #define RT_NTSCJ_SYNCTIP_REF1 0x00000012
1378 #define RT_NTSCJ_CLAMP_REF 0x0000003B
1379 #define RT_NTSCJ_PEAKWHITE 0x000000CB
1380 #define RT_NTSCJ_VBI_PEAKWHITE 0x000000C2
1381 #define RT_NTSCJ_WPA_THRESHOLD 0x000004B0
1382 #define RT_NTSCJ_WPA_TRIGGER_LO 0x000000B4
1383 #define RT_NTSCJ_WPA_TRIGGER_HIGH 0x0000021C
1384 #define RT_NTSCJ_LP_LOCKOUT_START 0x00000206
1385 #define RT_NTSCJ_LP_LOCKOUT_END 0x00000021
1386
1387 #define RT_NTSCJ_CR_BURST_GAIN 0x00000071
1388 #define RT_NTSCJ_CB_BURST_GAIN 0x0000009F
1389 #define RT_NTSCJ_CH_HEIGHT 0x000000CD
1390 #define RT_NTSCJ_CH_KILL_LEVEL 0x000000C0
1391 #define RT_NTSCJ_CH_AGC_ERROR_LIM 0x00000002
1392 #define RT_NTSCJ_CH_AGC_FILTER_EN 0x00000000
1393 #define RT_NTSCJ_CH_AGC_LOOP_SPEED 0x00000000
1394
1395 #define RT_NTSCJ_CRDR_ACTIVE_GAIN 0x00000071
1396 #define RT_NTSCJ_CBDB_ACTIVE_GAIN 0x0000009F
1397 #define RT_NTSCJ_VERT_LOCKOUT_START 0x00000207
1398 #define RT_NTSCJ_VERT_LOCKOUT_END 0x0000000E
1399
1400 #define RT_PAL_SYNCTIP_REF0 0x37 /* instead of 0x00000004 - Ivo */
1401 #define RT_PAL_SYNCTIP_REF1 0x26 /* instead of 0x0000000F - Ivo */
1402 #define RT_PAL_CLAMP_REF 0x0000003B
1403 #define RT_PAL_PEAKWHITE 0xFF /* instead of 0x000000C1 - Ivo */
1404 #define RT_PAL_VBI_PEAKWHITE 0xC6 /* instead of 0x000000C7 - Ivo */
1405 #define RT_PAL_WPA_THRESHOLD 0x59C /* instead of 0x000006A4 - Ivo */
1406
1407 #define RT_PAL_WPA_TRIGGER_LO 0x00000096
1408 #define RT_PAL_WPA_TRIGGER_HIGH 0x000001C2
1409 #define RT_PAL_LP_LOCKOUT_START 0x00000263
1410 #define RT_PAL_LP_LOCKOUT_END 0x0000002C
1411
1412 #define RT_PAL_CH_DTO_INC 0x00400000
1413 #define RT_PAL_CH_PLL_SGAIN 1 /* instead of 0x00000002 - Ivo */
1414 #define RT_PAL_CH_PLL_FGAIN 2 /* instead of 0x00000001 - Ivo */
1415 #define RT_PAL_CR_BURST_GAIN 0x0000007A
1416 #define RT_PAL_CB_BURST_GAIN 0x000000AB
1417 #define RT_PAL_CH_HEIGHT 0x0000009C
1418 #define RT_PAL_CH_KILL_LEVEL 4 /* instead of 0x00000090 - Ivo */
1419 #define RT_PAL_CH_AGC_ERROR_LIM 1 /* instead of 0x00000002 - Ivo */
1420 #define RT_PAL_CH_AGC_FILTER_EN 1 /* instead of 0x00000000 - Ivo */
1421 #define RT_PAL_CH_AGC_LOOP_SPEED 0x00000000
1422
1423 #define RT_PAL_CRDR_ACTIVE_GAIN 0x9E /* instead of 0x0000007A - Ivo */
1424 #define RT_PAL_CBDB_ACTIVE_GAIN 0xDF /* instead of 0x000000AB - Ivo */
1425 #define RT_PAL_VERT_LOCKOUT_START 0x00000269
1426 #define RT_PAL_VERT_LOCKOUT_END 0x00000012
1427
1428 #define RT_SECAM_SYNCTIP_REF0 0x37 /* instead of 0x00000004 - Ivo */
1429 #define RT_SECAM_SYNCTIP_REF1 0x26 /* instead of 0x0000000F - Ivo */
1430 #define RT_SECAM_CLAMP_REF 0x0000003B
1431 #define RT_SECAM_PEAKWHITE 0xFF /* instead of 0x000000C1 - Ivo */
1432 #define RT_SECAM_VBI_PEAKWHITE 0xC6 /* instead of 0x000000C7 - Ivo */
1433 #define RT_SECAM_WPA_THRESHOLD 0x57A /* instead of 0x6A4, instead of 0x0000059C is Ivo's value , -eric*/
1434
1435 #define RT_SECAM_WPA_TRIGGER_LO 0x96 /* instead of 0x0000026B - eric */
1436 #define RT_SECAM_WPA_TRIGGER_HIGH 0x000001C2
1437 #define RT_SECAM_LP_LOCKOUT_START 0x263 /* instead of 0x0000026B - eric */
1438 #define RT_SECAM_LP_LOCKOUT_END 0x2b /* instead of 0x0000002C -eric */
1439
1440 #define RT_SECAM_CH_DTO_INC 0x003E7A28
1441 #define RT_SECAM_CH_PLL_SGAIN 0x4 /* instead of 0x00000006 - Volodya */
1442 #define RT_SECAM_CH_PLL_FGAIN 0x7 /* instead of 0x00000006 -Volodya */
1443
1444 #define RT_SECAM_CR_BURST_GAIN 0x1FF /* instead of 0x00000200 -Volodya */
1445 #define RT_SECAM_CB_BURST_GAIN 0x1FF /* instead of 0x00000200 -Volodya */
1446 #define RT_SECAM_CH_HEIGHT 0x00000066
1447 #define RT_SECAM_CH_KILL_LEVEL 0x00000060
1448 #define RT_SECAM_CH_AGC_ERROR_LIM 0x00000003
1449 #define RT_SECAM_CH_AGC_FILTER_EN 0x00000000
1450 #define RT_SECAM_CH_AGC_LOOP_SPEED 0x00000000
1451
1452 #define RT_SECAM_CRDR_ACTIVE_GAIN 0x11B /* instead of 0x00000200 - eric */
1453 #define RT_SECAM_CBDB_ACTIVE_GAIN 0x15A /* instead of 0x00000200 - eric */
1454 #define RT_SECAM_VERT_LOCKOUT_START 0x00000269
1455 #define RT_SECAM_VERT_LOCKOUT_END 0x00000012
1456
1457 #define RT_PAL_VS_FIELD_BLANK_END 0x2A /* instead of 0x0000002C - Ivo*/
1458 #define RT_NTSCM_VS_FIELD_BLANK_END 0x0000000A
1459
1460 #define RT_NTSCM_FIELD_IDLOCATION 0x00000105
1461 #define RT_PAL_FIELD_IDLOCATION 0x00000137
1462
1463 #define RT_NTSCM_H_ACTIVE_START 0x00000070
1464 #define RT_NTSCM_H_ACTIVE_END 0x00000363
1465
1466 #define RT_PAL_H_ACTIVE_START 0x0000009A
1467 #define RT_PAL_H_ACTIVE_END 0x00000439
1468
1469 #define RT_NTSCM_V_ACTIVE_START ((22-4)*2+1)
1470 #define RT_NTSCM_V_ACTIVE_END ((22+240-4)*2+1)
1471
1472 #define RT_PAL_V_ACTIVE_START 0x2E /* instead of 0x00000023 (Same as SECAM) - Ivo */
1473 #define RT_PAL_V_ACTIVE_END 0x269 /* instead of 0x00000262 - Ivo */
1474
1475 /* VBI */
1476 #define RT_NTSCM_H_VBI_WIND_START 0x00000049
1477 #define RT_NTSCM_H_VBI_WIND_END 0x00000366
1478
1479 #define RT_PAL_H_VBI_WIND_START 0x00000084
1480 #define RT_PAL_H_VBI_WIND_END 0x0000041F
1481
1482 #define RT_NTSCM_V_VBI_WIND_START fld_V_VBI_WIND_START_def
1483 #define RT_NTSCM_V_VBI_WIND_END fld_V_VBI_WIND_END_def
1484
1485 #define RT_PAL_V_VBI_WIND_START 0x8 /* instead of 0x0000000B - Ivo */
1486 #define RT_PAL_V_VBI_WIND_END 0x2D /* instead of 0x00000022 - Ivo */
1487
1488 #define RT_VBI_CAPTURE_EN 0x00000001 /* Enable */
1489 #define RT_VBI_CAPTURE_DIS 0x00000000 /* Disable */
1490 #define RT_RAW_CAPTURE 0x00000002 /* Use raw Video Capture. */
1491
1492 #define RT_NTSCM_VSYNC_INT_TRIGGER 0x2AA
1493 #define RT_PALSEM_VSYNC_INT_TRIGGER 0x353
1494
1495 #define RT_NTSCM_VSYNC_INT_HOLD 0x17
1496 #define RT_PALSEM_VSYNC_INT_HOLD 0x1C
1497
1498 #define RT_NTSCM_VS_FIELD_BLANK_START 0x206
1499 #define RT_PALSEM_VS_FIELD_BLANK_START 0x26D /* instead of 0x26C - Ivo */
1500
1501 #define RT_FIELD_FLIP_EN 0x4
1502 #define RT_V_FIELD_FLIP_INVERTED 0x2000
1503
1504 #define RT_NTSCM_H_IN_START 0x70
1505 #define RT_PAL_H_IN_START 154 /* instead of 144 - Ivo */
1506 #define RT_SECAM_H_IN_START 0x91 /* instead of 0x9A, Ivo value is 154, instead of 144 - Volodya, - eric */
1507 #define RT_NTSC_H_ACTIVE_SIZE 744
1508 #define RT_PAL_H_ACTIVE_SIZE 928 /* instead of 927 - Ivo */
1509 #define RT_SECAM_H_ACTIVE_SIZE 932 /* instead of 928, instead of 927 - Ivo, - eric */
1510 #define RT_NTSCM_V_IN_START (0x23)
1511 #define RT_PAL_V_IN_START 44 /* instead of (45-6) - Ivo */
1512 #define RT_SECAM_V_IN_START 0x2C /* instead of (45-6) - Volodya */
1513 #define RT_NTSCM_V_ACTIVE_SIZE 480
1514 #define RT_PAL_V_ACTIVE_SIZE 572 /* instead of 575 - Ivo */
1515 #define RT_SECAM_V_ACTIVE_SIZE 570 /* instead of 572, instead of 575 - Ivo, - eric */
1516
1517 #define RT_NTSCM_WIN_CLOSE_LIMIT 0x4D
1518 #define RT_NTSCJ_WIN_CLOSE_LIMIT 0x4D
1519 #define RT_NTSC443_WIN_CLOSE_LIMIT 0x5F
1520 #define RT_PALM_WIN_CLOSE_LIMIT 0x4D
1521 #define RT_PALN_WIN_CLOSE_LIMIT 0x5F
1522 #define RT_SECAM_WIN_CLOSE_LIMIT 0xC7 /* instead of 0x5F - eric */
1523
1524 #define RT_NTSCM_VS_FIELD_BLANK_START 0x206
1525
1526 #define RT_NTSCM_HS_PLL_SGAIN 0x5
1527 #define RT_NTSCM_HS_PLL_FGAIN 0x7
1528
1529 #define RT_NTSCM_H_OUT_WIND_WIDTH 0x2F4
1530 #define RT_NTSCM_V_OUT_WIND_HEIGHT 0xF0
1531
1532 #define TV 0x1
1533 #define LINEIN 0x2
1534 #define MUTE 0x3
1535
1536 #define DEC_COMPOSITE 0
1537 #define DEC_SVIDEO 1
1538 #define DEC_TUNER 2
1539
1540 #define DEC_NTSC 0
1541 #define DEC_PAL 1
1542 #define DEC_SECAM 2
1543 #define DEC_NTSC_J 8
1544
1545 #define DEC_SMOOTH 0
1546 #define DEC_SHARP 1
1547
1548 /* RT Register Field Defaults: */
1549 #define fld_tmpReg1_def 0x00000000
1550 #define fld_tmpReg2_def 0x00000001
1551 #define fld_tmpReg3_def 0x00000002
1552
1553 #define fld_LP_CONTRAST_def 0x0000006e
1554 #define fld_LP_BRIGHTNESS_def 0x00003ff0
1555 #define fld_CP_HUE_CNTL_def 0x00000000
1556 #define fld_LUMA_FILTER_def 0x00000001
1557 #define fld_H_SCALE_RATIO_def 0x00010000
1558 #define fld_H_SHARPNESS_def 0x00000000
1559
1560 #define fld_V_SCALE_RATIO_def 0x00000800
1561 #define fld_V_DEINTERLACE_ON_def 0x00000001
1562 #define fld_V_BYPSS_def 0x00000000
1563 #define fld_V_DITHER_ON_def 0x00000001
1564 #define fld_EVENF_OFFSET_def 0x00000000
1565 #define fld_ODDF_OFFSET_def 0x00000000
1566
1567 #define fld_INTERLACE_DETECTED_def 0x00000000
1568
1569 #define fld_VS_LINE_COUNT_def 0x00000000
1570 #define fld_VS_DETECTED_LINES_def 0x00000000
1571 #define fld_VS_ITU656_VB_def 0x00000000
1572
1573 #define fld_VBI_CC_DATA_def 0x00000000
1574 #define fld_VBI_CC_WT_def 0x00000000
1575 #define fld_VBI_CC_WT_ACK_def 0x00000000
1576 #define fld_VBI_CC_HOLD_def 0x00000000
1577 #define fld_VBI_DECODE_EN_def 0x00000000
1578
1579 #define fld_VBI_CC_DTO_P_def 0x00001802
1580 #define fld_VBI_20BIT_DTO_P_def 0x0000155c
1581
1582 #define fld_VBI_CC_LEVEL_def 0x0000003f
1583 #define fld_VBI_20BIT_LEVEL_def 0x00000059
1584 #define fld_VBI_CLK_RUNIN_GAIN_def 0x0000010f
1585
1586 #define fld_H_VBI_WIND_START_def 0x00000041
1587 #define fld_H_VBI_WIND_END_def 0x00000366
1588
1589 #define fld_V_VBI_WIND_START_def 0x0D
1590 #define fld_V_VBI_WIND_END_def 0x24
1591
1592 #define fld_VBI_20BIT_DATA0_def 0x00000000
1593 #define fld_VBI_20BIT_DATA1_def 0x00000000
1594 #define fld_VBI_20BIT_WT_def 0x00000000
1595 #define fld_VBI_20BIT_WT_ACK_def 0x00000000
1596 #define fld_VBI_20BIT_HOLD_def 0x00000000
1597
1598 #define fld_VBI_CAPTURE_ENABLE_def 0x00000000
1599
1600 #define fld_VBI_EDS_DATA_def 0x00000000
1601 #define fld_VBI_EDS_WT_def 0x00000000
1602 #define fld_VBI_EDS_WT_ACK_def 0x00000000
1603 #define fld_VBI_EDS_HOLD_def 0x00000000
1604
1605 #define fld_VBI_SCALING_RATIO_def 0x00010000
1606 #define fld_VBI_ALIGNER_ENABLE_def 0x00000000
1607
1608 #define fld_H_ACTIVE_START_def 0x00000070
1609 #define fld_H_ACTIVE_END_def 0x000002f0
1610
1611 #define fld_V_ACTIVE_START_def ((22-4)*2+1)
1612 #define fld_V_ACTIVE_END_def ((22+240-4)*2+2)
1613
1614 #define fld_CH_HEIGHT_def 0x000000CD
1615 #define fld_CH_KILL_LEVEL_def 0x000000C0
1616 #define fld_CH_AGC_ERROR_LIM_def 0x00000002
1617 #define fld_CH_AGC_FILTER_EN_def 0x00000000
1618 #define fld_CH_AGC_LOOP_SPEED_def 0x00000000
1619
1620 #define fld_HUE_ADJ_def 0x00000000
1621
1622 #define fld_STANDARD_SEL_def 0x00000000
1623 #define fld_STANDARD_YC_def 0x00000000
1624
1625 #define fld_ADC_PDWN_def 0x00000001
1626 #define fld_INPUT_SELECT_def 0x00000000
1627
1628 #define fld_ADC_PREFLO_def 0x00000003
1629 #define fld_H_SYNC_PULSE_WIDTH_def 0x00000000
1630 #define fld_HS_GENLOCKED_def 0x00000000
1631 #define fld_HS_SYNC_IN_WIN_def 0x00000000
1632
1633 #define fld_VIN_ASYNC_RST_def 0x00000001
1634 #define fld_DVS_ASYNC_RST_def 0x00000001
1635
1636 /* Vendor IDs: */
1637 #define fld_VIP_VENDOR_ID_def 0x00001002
1638 #define fld_VIP_DEVICE_ID_def 0x00004d54
1639 #define fld_VIP_REVISION_ID_def 0x00000001
1640
1641 /* AGC Delay Register */
1642 #define fld_BLACK_INT_START_def 0x00000031
1643 #define fld_BLACK_INT_LENGTH_def 0x0000000f
1644
1645 #define fld_UV_INT_START_def 0x0000003b
1646 #define fld_U_INT_LENGTH_def 0x0000000f
1647 #define fld_V_INT_LENGTH_def 0x0000000f
1648 #define fld_CRDR_ACTIVE_GAIN_def 0x0000007a
1649 #define fld_CBDB_ACTIVE_GAIN_def 0x000000ac
1650
1651 #define fld_DVS_DIRECTION_def 0x00000000
1652 #define fld_DVS_VBI_CARD8_SWAP_def 0x00000000
1653 #define fld_DVS_CLK_SELECT_def 0x00000000
1654 #define fld_CONTINUOUS_STREAM_def 0x00000000
1655 #define fld_DVSOUT_CLK_DRV_def 0x00000001
1656 #define fld_DVSOUT_DATA_DRV_def 0x00000001
1657
1658 #define fld_COMB_CNTL0_def 0x09438090
1659 #define fld_COMB_CNTL1_def 0x00000010
1660
1661 #define fld_COMB_CNTL2_def 0x16161010
1662 #define fld_COMB_LENGTH_def 0x0718038A
1663
1664 #define fld_SYNCTIP_REF0_def 0x00000037
1665 #define fld_SYNCTIP_REF1_def 0x00000029
1666 #define fld_CLAMP_REF_def 0x0000003B
1667 #define fld_AGC_PEAKWHITE_def 0x000000FF
1668 #define fld_VBI_PEAKWHITE_def 0x000000D2
1669
1670 #define fld_WPA_THRESHOLD_def 0x000003B0
1671
1672 #define fld_WPA_TRIGGER_LO_def 0x000000B4
1673 #define fld_WPA_TRIGGER_HIGH_def 0x0000021C
1674
1675 #define fld_LOCKOUT_START_def 0x00000206
1676 #define fld_LOCKOUT_END_def 0x00000021
1677
1678 #define fld_CH_DTO_INC_def 0x00400000
1679 #define fld_PLL_SGAIN_def 0x00000001
1680 #define fld_PLL_FGAIN_def 0x00000002
1681
1682 #define fld_CR_BURST_GAIN_def 0x0000007a
1683 #define fld_CB_BURST_GAIN_def 0x000000ac
1684
1685 #define fld_VERT_LOCKOUT_START_def 0x00000207
1686 #define fld_VERT_LOCKOUT_END_def 0x0000000E
1687
1688 #define fld_H_IN_WIND_START_def 0x00000070
1689 #define fld_V_IN_WIND_START_def 0x00000027
1690
1691 #define fld_H_OUT_WIND_WIDTH_def 0x000002f4
1692
1693 #define fld_V_OUT_WIND_WIDTH_def 0x000000f0
1694
1695 #define fld_HS_LINE_TOTAL_def 0x0000038E
1696
1697 #define fld_MIN_PULSE_WIDTH_def 0x0000002F
1698 #define fld_MAX_PULSE_WIDTH_def 0x00000046
1699
1700 #define fld_WIN_CLOSE_LIMIT_def 0x0000004D
1701 #define fld_WIN_OPEN_LIMIT_def 0x000001B7
1702
1703 #define fld_VSYNC_INT_TRIGGER_def 0x000002AA
1704
1705 #define fld_VSYNC_INT_HOLD_def 0x0000001D
1706
1707 #define fld_VIN_M0_def 0x00000039
1708 #define fld_VIN_N0_def 0x0000014c
1709 #define fld_MNFLIP_EN_def 0x00000000
1710 #define fld_VIN_P_def 0x00000006
1711 #define fld_REG_CLK_SEL_def 0x00000000
1712
1713 #define fld_VIN_M1_def 0x00000000
1714 #define fld_VIN_N1_def 0x00000000
1715 #define fld_VIN_DRIVER_SEL_def 0x00000000
1716 #define fld_VIN_MNFLIP_REQ_def 0x00000000
1717 #define fld_VIN_MNFLIP_DONE_def 0x00000000
1718 #define fld_TV_LOCK_TO_VIN_def 0x00000000
1719 #define fld_TV_P_FOR_WINCLK_def 0x00000004
1720
1721 #define fld_VINRST_def 0x00000001
1722 #define fld_VIN_CLK_SEL_def 0x00000000
1723
1724 #define fld_VS_FIELD_BLANK_START_def 0x00000206
1725
1726 #define fld_VS_FIELD_BLANK_END_def 0x0000000A
1727
1728 /*#define fld_VS_FIELD_IDLOCATION_def 0x00000105 */
1729 #define fld_VS_FIELD_IDLOCATION_def 0x00000001
1730 #define fld_VS_FRAME_TOTAL_def 0x00000217
1731
1732 #define fld_SYNC_TIP_START_def 0x00000372
1733 #define fld_SYNC_TIP_LENGTH_def 0x0000000F
1734
1735 #define fld_GAIN_FORCE_DATA_def 0x00000000
1736 #define fld_GAIN_FORCE_EN_def 0x00000000
1737 #define fld_I_CLAMP_SEL_def 0x00000003
1738 #define fld_I_AGC_SEL_def 0x00000001
1739 #define fld_EXT_CLAMP_CAP_def 0x00000001
1740 #define fld_EXT_AGC_CAP_def 0x00000001
1741 #define fld_DECI_DITHER_EN_def 0x00000001
1742 #define fld_ADC_PREFHI_def 0x00000000
1743 #define fld_ADC_CH_GAIN_SEL_def 0x00000001
1744
1745 #define fld_HS_PLL_SGAIN_def 0x00000003
1746
1747 #define fld_NREn_def 0x00000000
1748 #define fld_NRGainCntl_def 0x00000000
1749 #define fld_NRBWTresh_def 0x00000000
1750 #define fld_NRGCTresh_def 0x00000000
1751 #define fld_NRCoefDespeclMode_def 0x00000000
1752
1753 #define fld_GPIO_5_OE_def 0x00000000
1754 #define fld_GPIO_6_OE_def 0x00000000
1755
1756 #define fld_GPIO_5_OUT_def 0x00000000
1757 #define fld_GPIO_6_OUT_def 0x00000000
1758
1759 /* End of field default values. */
1760
949 #endif /* _RADEON_H */ 1761 #endif /* _RADEON_H */
950 1762