comparison vidix/nvidia_vid.c @ 37107:3c5c93a30fb7

vidix: Replace printf with mp_msg - Make MPlayer more quiet when requested (e.g. when using -really-quiet) - Additionally change some minor capitalization and "bla:" to "[bla]" Patch-by: Arne Bochem >arneb.mp ccan de< Patch-also-OKed-by: Reimar
author al
date Sat, 17 May 2014 01:38:00 +0000
parents 945eab072c9d
children
comparison
equal deleted inserted replaced
37106:1b9907dfe2f4 37107:3c5c93a30fb7
37 #include "dha.h" 37 #include "dha.h"
38 #include "pci_ids.h" 38 #include "pci_ids.h"
39 #include "pci_names.h" 39 #include "pci_names.h"
40 #include "libavutil/common.h" 40 #include "libavutil/common.h"
41 #include "mpbswap.h" 41 #include "mpbswap.h"
42 #include "mp_msg.h"
42 43
43 44
44 static pciinfo_t pci_info; 45 static pciinfo_t pci_info;
45 46
46 47
330 pciinfo_t lst[MAX_PCI_DEVICES]; 331 pciinfo_t lst[MAX_PCI_DEVICES];
331 unsigned i,num_pci; 332 unsigned i,num_pci;
332 int err; 333 int err;
333 334
334 if (force) 335 if (force)
335 printf("[nvidia_vid]: warning: forcing not supported yet!\n"); 336 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid]: warning: forcing not supported yet!\n");
336 err = pci_scan(lst,&num_pci); 337 err = pci_scan(lst,&num_pci);
337 if(err){ 338 if(err){
338 printf("[nvidia_vid] Error occurred during pci scan: %s\n",strerror(err)); 339 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] Error occurred during pci scan: %s\n",strerror(err));
339 return err; 340 return err;
340 } 341 }
341 else { 342 else {
342 err = ENXIO; 343 err = ENXIO;
343 for(i=0; i < num_pci; i++){ 344 for(i=0; i < num_pci; i++){
347 idx = find_chip(lst[i].device); 348 idx = find_chip(lst[i].device);
348 if(idx == -1) 349 if(idx == -1)
349 continue; 350 continue;
350 dname = pci_device_name(lst[i].vendor, lst[i].device); 351 dname = pci_device_name(lst[i].vendor, lst[i].device);
351 dname = dname ? dname : "Unknown chip"; 352 dname = dname ? dname : "Unknown chip";
352 printf("[nvidia_vid] Found chip: %s\n", dname); 353 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] Found chip: %s\n", dname);
353 if ((lst[i].command & PCI_COMMAND_IO) == 0){ 354 if ((lst[i].command & PCI_COMMAND_IO) == 0){
354 printf("[nvidia_vid] Device is disabled, ignoring\n"); 355 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] Device is disabled, ignoring\n");
355 continue; 356 continue;
356 } 357 }
357 nvidia_cap.device_id = lst[i].device; 358 nvidia_cap.device_id = lst[i].device;
358 err = 0; 359 err = 0;
359 memcpy(&pci_info, &lst[i], sizeof(pciinfo_t)); 360 memcpy(&pci_info, &lst[i], sizeof(pciinfo_t));
360 break; 361 break;
361 } 362 }
362 } 363 }
363 } 364 }
364 if(err && verbose) printf("[nvidia_vid] Can't find chip\n"); 365 if(err && verbose) mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] Can't find chip\n");
365 return err; 366 return err;
366 } 367 }
367 368
368 369
369 370
532 reg = VID_RD32 (info->chip.PMC, 0x000200); 533 reg = VID_RD32 (info->chip.PMC, 0x000200);
533 534
534 /* NV3 (0x10100010): NV03_PMC_ENABLE_PMEDIA, NV03_PMC_ENABLE_PFB, NV03_PMC_ENABLE_PVIDEO */ 535 /* NV3 (0x10100010): NV03_PMC_ENABLE_PMEDIA, NV03_PMC_ENABLE_PFB, NV03_PMC_ENABLE_PVIDEO */
535 536
536 if ((reg & 0x10100010) != 0x10100010) { 537 if ((reg & 0x10100010) != 0x10100010) {
537 printf("PVIDEO and PFB disabled, enabling...\n"); 538 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] PVIDEO and PFB disabled, enabling...\n");
538 VID_OR32 (info->chip.PMC, 0x000200, 0x10100010); 539 VID_OR32 (info->chip.PMC, 0x000200, 0x10100010);
539 } 540 }
540 541
541 /* save the current colorkey */ 542 /* save the current colorkey */
542 switch (info->chip.arch ) { 543 switch (info->chip.arch ) {
635 #if !defined(__MINGW32__) && !defined(__CYGWIN__) 636 #if !defined(__MINGW32__) && !defined(__CYGWIN__)
636 key = key | 0x80000000; 637 key = key | 0x80000000;
637 #endif 638 #endif
638 break; 639 break;
639 } 640 }
640 //printf("[nvidia_vid] depth=%d %08X \n", info->depth, chromakey); 641 //mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] depth=%d %08X \n", info->depth, chromakey);
641 switch (info->chip.arch) { 642 switch (info->chip.arch) {
642 case NV_ARCH_10: 643 case NV_ARCH_10:
643 case NV_ARCH_20: 644 case NV_ARCH_20:
644 case NV_ARCH_30: 645 case NV_ARCH_30:
645 case NV_ARCH_40: 646 case NV_ARCH_40:
882 static int nv_init(void){ 883 static int nv_init(void){
883 int mtrr; 884 int mtrr;
884 info = calloc(1,sizeof(rivatv_info)); 885 info = calloc(1,sizeof(rivatv_info));
885 info->control_base = map_phys_mem(pci_info.base0, 0x00C00000 + 0x00008000); 886 info->control_base = map_phys_mem(pci_info.base0, 0x00C00000 + 0x00008000);
886 info->chip.arch = nvidia_card_ids[find_chip(pci_info.device)].arch; 887 info->chip.arch = nvidia_card_ids[find_chip(pci_info.device)].arch;
887 printf("[nvidia_vid] arch %x register base %p\n",info->chip.arch,info->control_base); 888 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] arch %x register base %p\n",info->chip.arch,info->control_base);
888 info->chip.PFIFO = (uint32_t *) (info->control_base + 0x00002000); 889 info->chip.PFIFO = (uint32_t *) (info->control_base + 0x00002000);
889 info->chip.FIFO = (uint32_t *) (info->control_base + 0x00800000); 890 info->chip.FIFO = (uint32_t *) (info->control_base + 0x00800000);
890 info->chip.PMC = (uint32_t *) (info->control_base + 0x00000000); 891 info->chip.PMC = (uint32_t *) (info->control_base + 0x00000000);
891 info->chip.PFB = (uint32_t *) (info->control_base + 0x00100000); 892 info->chip.PFB = (uint32_t *) (info->control_base + 0x00100000);
892 info->chip.PME = (uint32_t *) (info->control_base + 0x00000000); 893 info->chip.PME = (uint32_t *) (info->control_base + 0x00000000);
941 info->picture_base = info->video_base + info->picture_offset; 942 info->picture_base = info->video_base + info->picture_offset;
942 break; 943 break;
943 } 944 }
944 } 945 }
945 946
946 printf("[nvidia_vid] detected memory size %u MB\n",(uint32_t)(info->chip.fbsize /1024/1024)); 947 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] detected memory size %u MB\n",(uint32_t)(info->chip.fbsize /1024/1024));
947 948
948 if ((mtrr = mtrr_set_type(pci_info.base1, info->chip.fbsize, MTRR_TYPE_WRCOMB))!= 0) 949 if ((mtrr = mtrr_set_type(pci_info.base1, info->chip.fbsize, MTRR_TYPE_WRCOMB))!= 0)
949 printf("[nvidia_vid] unable to setup MTRR: %s\n", strerror(mtrr)); 950 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] unable to setup MTRR: %s\n", strerror(mtrr));
950 else 951 else
951 printf("[nvidia_vid] MTRR set up\n"); 952 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] MTRR set up\n");
952 953
953 nv_getscreenproperties(info); 954 nv_getscreenproperties(info);
954 if(!info->depth)printf("[nvidia_vid] text mode: %ux%u\n",info->screen_x,info->screen_y); 955 if(!info->depth) mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] text mode: %ux%u\n",info->screen_x,info->screen_y);
955 else printf("[nvidia_vid] video mode: %ux%u@%u\n",info->screen_x,info->screen_y, info->depth); 956 else mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] video mode: %ux%u@%u\n",info->screen_x,info->screen_y, info->depth);
956 957
957 958
958 rivatv_enable_PMEDIA(info); 959 rivatv_enable_PMEDIA(info);
959 info->cur_frame = 0; 960 info->cur_frame = 0;
960 info->use_colorkey = 0; 961 info->use_colorkey = 0;
999 return ENOSYS; 1000 return ENOSYS;
1000 } 1001 }
1001 1002
1002 static int nv_config_playback(vidix_playback_t *vinfo){ 1003 static int nv_config_playback(vidix_playback_t *vinfo){
1003 uint32_t i; 1004 uint32_t i;
1004 // printf("called %s\n", __FUNCTION__); 1005 // mp_msg(MSGT_VO, MSGL_STATUS, "called %s\n", __FUNCTION__);
1005 if (! is_supported_fourcc(vinfo->fourcc)) 1006 if (! is_supported_fourcc(vinfo->fourcc))
1006 return ENOSYS; 1007 return ENOSYS;
1007 1008
1008 info->width = vinfo->src.w; 1009 info->width = vinfo->src.w;
1009 info->height = vinfo->src.h; 1010 info->height = vinfo->src.h;
1012 info->d_height = vinfo->dest.h; 1013 info->d_height = vinfo->dest.h;
1013 info->wx = vinfo->dest.x; 1014 info->wx = vinfo->dest.x;
1014 info->wy = vinfo->dest.y; 1015 info->wy = vinfo->dest.y;
1015 info->format = vinfo->fourcc; 1016 info->format = vinfo->fourcc;
1016 1017
1017 printf("[nvidia_vid] setting up a %dx%d-%dx%d video window (src %dx%d), format 0x%X\n", 1018 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] setting up a %dx%d-%dx%d video window (src %dx%d), format 0x%X\n",
1018 info->d_width, info->d_height, info->wx, info->wy, info->width, info->height, vinfo->fourcc); 1019 info->d_width, info->d_height, info->wx, info->wy, info->width, info->height, vinfo->fourcc);
1019 1020
1020 1021
1021 vinfo->dga_addr=info->picture_base; 1022 vinfo->dga_addr=info->picture_base;
1022 1023
1038 } 1039 }
1039 info->buffer_size = vinfo->frame_size; 1040 info->buffer_size = vinfo->frame_size;
1040 info->num_frames = vinfo->num_frames= (info->chip.fbsize - info->picture_offset)/vinfo->frame_size; 1041 info->num_frames = vinfo->num_frames= (info->chip.fbsize - info->picture_offset)/vinfo->frame_size;
1041 if(vinfo->num_frames > MAX_FRAMES)vinfo->num_frames = MAX_FRAMES; 1042 if(vinfo->num_frames > MAX_FRAMES)vinfo->num_frames = MAX_FRAMES;
1042 // vinfo->num_frames = 1; 1043 // vinfo->num_frames = 1;
1043 // printf("[nvidia_vid] Number of frames %i\n",vinfo->num_frames); 1044 // mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] Number of frames %i\n",vinfo->num_frames);
1044 for(i=0;i <vinfo->num_frames;i++)vinfo->offsets[i] = vinfo->frame_size*i; 1045 for(i=0;i <vinfo->num_frames;i++)vinfo->offsets[i] = vinfo->frame_size*i;
1045 return 0; 1046 return 0;
1046 } 1047 }
1047 1048
1048 static int nv_playback_on(void){ 1049 static int nv_playback_on(void){
1057 1058
1058 static int nv_set_gkeys( const vidix_grkey_t * grkey){ 1059 static int nv_set_gkeys( const vidix_grkey_t * grkey){
1059 if (grkey->ckey.op == CKEY_FALSE) 1060 if (grkey->ckey.op == CKEY_FALSE)
1060 { 1061 {
1061 info->use_colorkey = 0; 1062 info->use_colorkey = 0;
1062 printf("[nvidia_vid] colorkeying disabled\n"); 1063 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] colorkeying disabled\n");
1063 } 1064 }
1064 else { 1065 else {
1065 info->use_colorkey = 1; 1066 info->use_colorkey = 1;
1066 info->vidixcolorkey = ((grkey->ckey.red<<16)|(grkey->ckey.green<<8)|grkey->ckey.blue); 1067 info->vidixcolorkey = ((grkey->ckey.red<<16)|(grkey->ckey.green<<8)|grkey->ckey.blue);
1067 printf("[nvidia_vid] set colorkey 0x%x\n",info->vidixcolorkey); 1068 mp_msg(MSGT_VO, MSGL_STATUS, "[nvidia_vid] set colorkey 0x%x\n",info->vidixcolorkey);
1068 } 1069 }
1069 if(info->d_width && info->d_height)rivatv_overlay_start(info,0); 1070 if(info->d_width && info->d_height)rivatv_overlay_start(info,0);
1070 return 0; 1071 return 0;
1071 } 1072 }
1072 1073
1073 static int nv_frame_sel(unsigned int frame){ 1074 static int nv_frame_sel(unsigned int frame){
1074 // printf("selecting buffer %d\n", frame); 1075 // mp_msg(MSGT_VO, MSGL_STATUS, "selecting buffer %d\n", frame);
1075 rivatv_overlay_start(info, frame); 1076 rivatv_overlay_start(info, frame);
1076 if (info->num_frames >= 1) 1077 if (info->num_frames >= 1)
1077 info->cur_frame = frame/*(frame+1)%info->num_frames*/; 1078 info->cur_frame = frame/*(frame+1)%info->num_frames*/;
1078 return 0; 1079 return 0;
1079 } 1080 }
1127 #if 0 1128 #if 0
1128 //gcc -o nvidia_vid nvidia_vid.c -I ../ -lm ../vidix/libvidix.a 1129 //gcc -o nvidia_vid nvidia_vid.c -I ../ -lm ../vidix/libvidix.a
1129 1130
1130 int main(int argc,char* argv[]){ 1131 int main(int argc,char* argv[]){
1131 if(nv_probe(0,0)){ 1132 if(nv_probe(0,0)){
1132 printf("no supported chip found\n"); 1133 mp_msg(MSGT_VO, MSGL_STATUS, "no supported chip found\n");
1133 return 1; 1134 return 1;
1134 } 1135 }
1135 if(nv_init()){ 1136 if(nv_init()){
1136 printf("could not init\n"); 1137 mp_msg(MSGT_VO, MSGL_STATUS, "could not init\n");
1137 return 1; 1138 return 1;
1138 } 1139 }
1139 if(info->chip.arch >= NV_ARCH_10){ 1140 if(info->chip.arch >= NV_ARCH_10){
1140 printf("NV_PVIDEO_BASE (0x900) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x900)); 1141 mp_msg(MSGT_VO, MSGL_STATUS, "NV_PVIDEO_BASE (0x900) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x900));
1141 printf("NV_PVIDEO_LIMIT (0x908) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x908)); 1142 mp_msg(MSGT_VO, MSGL_STATUS, "NV_PVIDEO_LIMIT (0x908) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x908));
1142 printf("NV_PVIDEO_OFFSET (0x920) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x920)); 1143 mp_msg(MSGT_VO, MSGL_STATUS, "NV_PVIDEO_OFFSET (0x920) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x920));
1143 printf("NV_PVIDEO_FORMAT (0x958) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x958)); 1144 mp_msg(MSGT_VO, MSGL_STATUS, "NV_PVIDEO_FORMAT (0x958) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x958));
1144 printf("NV_PVIDEO_STOP (0x704) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x704)); 1145 mp_msg(MSGT_VO, MSGL_STATUS, "NV_PVIDEO_STOP (0x704) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x704));
1145 printf("NV_PVIDEO_BUFFER (0x700) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x700)); 1146 mp_msg(MSGT_VO, MSGL_STATUS, "NV_PVIDEO_BUFFER (0x700) 0x%x\n",VID_RD32(info->chip.PVIDEO, 0x700));
1146 } 1147 }
1147 1148
1148 nv_destroy(); 1149 nv_destroy();
1149 return 0; 1150 return 0;
1150 } 1151 }