Mercurial > mplayer.hg
comparison vidix/drivers/nvidia_vid.c @ 16378:430ca60471ba
64 bit fix: do not cast pointers to uint32_t
author | reimar |
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date | Sat, 03 Sep 2005 19:20:51 +0000 |
parents | 71180d64e6cc |
children | 73afe41bb7c3 |
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16377:243f6f5d0bb9 | 16378:430ca60471ba |
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253 unsigned int screen_y; /*screen height*/ | 253 unsigned int screen_y; /*screen height*/ |
254 unsigned long buffer_size; /* size of the image buffer */ | 254 unsigned long buffer_size; /* size of the image buffer */ |
255 struct rivatv_chip chip; /* NV architecture structure */ | 255 struct rivatv_chip chip; /* NV architecture structure */ |
256 void* video_base; /* virtual address of control region */ | 256 void* video_base; /* virtual address of control region */ |
257 void* control_base; /* virtual address of fb region */ | 257 void* control_base; /* virtual address of fb region */ |
258 unsigned long picture_base; /* direct pointer to video picture */ | 258 void* picture_base; /* direct pointer to video picture */ |
259 unsigned long picture_offset; /* offset of video picture in frame buffer */ | 259 unsigned long picture_offset; /* offset of video picture in frame buffer */ |
260 // struct rivatv_dma dma; /* DMA structure */ | 260 // struct rivatv_dma dma; /* DMA structure */ |
261 unsigned int cur_frame; | 261 unsigned int cur_frame; |
262 unsigned int num_frames; /* number of buffers */ | 262 unsigned int num_frames; /* number of buffers */ |
263 int bps; /* bytes per line */ | 263 int bps; /* bytes per line */ |
682 int vixInit(void){ | 682 int vixInit(void){ |
683 int mtrr; | 683 int mtrr; |
684 info = (rivatv_info*)calloc(1,sizeof(rivatv_info)); | 684 info = (rivatv_info*)calloc(1,sizeof(rivatv_info)); |
685 info->control_base = map_phys_mem(pci_info.base0, 0x00C00000 + 0x00008000); | 685 info->control_base = map_phys_mem(pci_info.base0, 0x00C00000 + 0x00008000); |
686 info->chip.arch = nvidia_card_ids[find_chip(pci_info.device)].arch; | 686 info->chip.arch = nvidia_card_ids[find_chip(pci_info.device)].arch; |
687 printf("[nvidia_vid] arch %x register base %x\n",info->chip.arch,(unsigned int)info->control_base); | 687 printf("[nvidia_vid] arch %x register base %p\n",info->chip.arch,info->control_base); |
688 info->chip.PFIFO = (uint32_t *) (info->control_base + 0x00002000); | 688 info->chip.PFIFO = (uint32_t *) (info->control_base + 0x00002000); |
689 info->chip.FIFO = (uint32_t *) (info->control_base + 0x00800000); | 689 info->chip.FIFO = (uint32_t *) (info->control_base + 0x00800000); |
690 info->chip.PMC = (uint32_t *) (info->control_base + 0x00000000); | 690 info->chip.PMC = (uint32_t *) (info->control_base + 0x00000000); |
691 info->chip.PFB = (uint32_t *) (info->control_base + 0x00100000); | 691 info->chip.PFB = (uint32_t *) (info->control_base + 0x00100000); |
692 info->chip.PME = (uint32_t *) (info->control_base + 0x00000000); | 692 info->chip.PME = (uint32_t *) (info->control_base + 0x00000000); |
720 { | 720 { |
721 /* This maps framebuffer @6MB, thus 2MB are left for video. */ | 721 /* This maps framebuffer @6MB, thus 2MB are left for video. */ |
722 info->video_base = map_phys_mem(pci_info.base1, info->chip.fbsize); | 722 info->video_base = map_phys_mem(pci_info.base1, info->chip.fbsize); |
723 /* This may trash your screen for resolutions greater than 1024x768, sorry. */ | 723 /* This may trash your screen for resolutions greater than 1024x768, sorry. */ |
724 info->picture_offset = 1024*768* 4 * ((info->chip.fbsize > 4194304)?2:1); | 724 info->picture_offset = 1024*768* 4 * ((info->chip.fbsize > 4194304)?2:1); |
725 info->picture_base = (uint32_t) info->video_base + info->picture_offset; | 725 info->picture_base = info->video_base + info->picture_offset; |
726 info->chip.PRAMIN = (uint32_t *) (info->video_base + 0x00C00000); | 726 info->chip.PRAMIN = (uint32_t *) (info->video_base + 0x00C00000); |
727 break; | 727 break; |
728 } | 728 } |
729 case NV_ARCH_04: | 729 case NV_ARCH_04: |
730 case NV_ARCH_10: | 730 case NV_ARCH_10: |
732 case NV_ARCH_30: | 732 case NV_ARCH_30: |
733 { | 733 { |
734 info->video_base = map_phys_mem(pci_info.base1, info->chip.fbsize); | 734 info->video_base = map_phys_mem(pci_info.base1, info->chip.fbsize); |
735 info->picture_offset = info->chip.fbsize - NV04_BES_SIZE; | 735 info->picture_offset = info->chip.fbsize - NV04_BES_SIZE; |
736 // info->picture_base = (unsigned long)map_phys_mem(pci_info.base1+info->picture_offset,NV04_BES_SIZE); | 736 // info->picture_base = (unsigned long)map_phys_mem(pci_info.base1+info->picture_offset,NV04_BES_SIZE); |
737 info->picture_base = (uint32_t) info->video_base + info->picture_offset; | 737 info->picture_base = info->video_base + info->picture_offset; |
738 break; | 738 break; |
739 } | 739 } |
740 } | 740 } |
741 | 741 |
742 printf("[nvidia_vid] detected memory size %u MB\n",(uint32_t)(info->chip.fbsize /1024/1024)); | 742 printf("[nvidia_vid] detected memory size %u MB\n",(uint32_t)(info->chip.fbsize /1024/1024)); |
808 | 808 |
809 printf("[nvidia_vid] setting up a %dx%d-%dx%d video window (src %dx%d), format 0x%X\n", | 809 printf("[nvidia_vid] setting up a %dx%d-%dx%d video window (src %dx%d), format 0x%X\n", |
810 info->d_width, info->d_height, info->wx, info->wy, info->width, info->height, vinfo->fourcc); | 810 info->d_width, info->d_height, info->wx, info->wy, info->width, info->height, vinfo->fourcc); |
811 | 811 |
812 | 812 |
813 vinfo->dga_addr=(void*)(info->picture_base); | 813 vinfo->dga_addr=info->picture_base; |
814 | 814 |
815 switch (vinfo->fourcc) | 815 switch (vinfo->fourcc) |
816 { | 816 { |
817 case IMGFMT_YUY2: | 817 case IMGFMT_YUY2: |
818 case IMGFMT_UYVY: | 818 case IMGFMT_UYVY: |