comparison drivers/radeon/radeon_vid.c @ 3198:5eae81895171

Probably ugly attempt to fix Rage128 problems
author nick
date Thu, 29 Nov 2001 17:07:52 +0000
parents 3c5ad8d5ac00
children 7cec2396bde3
comparison
equal deleted inserted replaced
3197:9440d478e10d 3198:5eae81895171
72 72
73 #define RADEON_VID_MAJOR 178 73 #define RADEON_VID_MAJOR 178
74 74
75 75
76 MODULE_AUTHOR("Nick Kurshev <nickols_k@mail.ru>"); 76 MODULE_AUTHOR("Nick Kurshev <nickols_k@mail.ru>");
77 MODULE_DESCRIPTION("Accelerated YUV BES driver for Rage128/Radeons. Version: "RADEON_VID_VERSION); 77 #ifdef RAGE128
78 MODULE_DESCRIPTION("Accelerated YUV BES driver for Rage128. Version: "RADEON_VID_VERSION);
79 #else
80 MODULE_DESCRIPTION("Accelerated YUV BES driver for Radeons. Version: "RADEON_VID_VERSION);
81 #endif
78 #ifdef MODULE_LICENSE 82 #ifdef MODULE_LICENSE
79 MODULE_LICENSE("GPL"); 83 MODULE_LICENSE("GPL");
80 #endif 84 #endif
81 85
82 #ifdef RAGE128 86 #ifdef RAGE128
83 #define RVID_MSG "rage128_vid: " 87 #define RVID_MSG "rage128_vid: "
84 #define X_ADJUST 0 88 #define X_ADJUST 0
85 #else 89 #else
86 #define RVID_MSG "radeon_vid: " 90 #define RVID_MSG "radeon_vid: "
87 #define X_ADJUST 8 91 #define X_ADJUST 8
92 #ifndef RADEON
93 #define RADEON
94 #endif
88 #endif 95 #endif
89 96
90 typedef struct bes_registers_s 97 typedef struct bes_registers_s
91 { 98 {
92 /* base address of yuv framebuffer */ 99 /* base address of yuv framebuffer */
209 case IMGFMT_IF09: return("Planar IF09"); 216 case IMGFMT_IF09: return("Planar IF09");
210 case IMGFMT_YV12: return("Planar YV12"); 217 case IMGFMT_YV12: return("Planar YV12");
211 case IMGFMT_I420: return("Planar I420"); 218 case IMGFMT_I420: return("Planar I420");
212 case IMGFMT_IYUV: return("Planar IYUV"); 219 case IMGFMT_IYUV: return("Planar IYUV");
213 case IMGFMT_CLPL: return("Planar CLPL"); 220 case IMGFMT_CLPL: return("Planar CLPL");
221 case IMGFMT_Y800: return("Planar Y800");
222 case IMGFMT_Y8: return("Planar Y8");
223 case IMGFMT_IUYV: return("Packed IUYV");
224 case IMGFMT_IY41: return("Packed IY41");
214 case IMGFMT_IYU1: return("Packed IYU1"); 225 case IMGFMT_IYU1: return("Packed IYU1");
215 case IMGFMT_IYU2: return("Packed IYU2"); 226 case IMGFMT_IYU2: return("Packed IYU2");
216 case IMGFMT_UYVY: return("Packed UYVY"); 227 case IMGFMT_UYVY: return("Packed UYVY");
217 case IMGFMT_UYNV: return("Packed UYNV"); 228 case IMGFMT_UYNV: return("Packed UYNV");
218 case IMGFMT_cyuv: return("Packed CYUV"); 229 case IMGFMT_cyuv: return("Packed CYUV");
230 case IMGFMT_Y422: return("Packed Y422");
219 case IMGFMT_YUY2: return("Packed YUY2"); 231 case IMGFMT_YUY2: return("Packed YUY2");
220 case IMGFMT_YUNV: return("Packed YUNV"); 232 case IMGFMT_YUNV: return("Packed YUNV");
221 case IMGFMT_YVYU: return("Packed YVYU"); 233 case IMGFMT_YVYU: return("Packed YVYU");
222 case IMGFMT_Y41P: return("Packed Y41P"); 234 case IMGFMT_Y41P: return("Packed Y41P");
223 case IMGFMT_Y211: return("Packed Y211"); 235 case IMGFMT_Y211: return("Packed Y211");
226 case IMGFMT_V422: return("Packed V422"); 238 case IMGFMT_V422: return("Packed V422");
227 case IMGFMT_V655: return("Packed V655"); 239 case IMGFMT_V655: return("Packed V655");
228 case IMGFMT_CLJR: return("Packed CLJR"); 240 case IMGFMT_CLJR: return("Packed CLJR");
229 case IMGFMT_YUVP: return("Packed YUVP"); 241 case IMGFMT_YUVP: return("Packed YUVP");
230 case IMGFMT_UYVP: return("Packed UYVP"); 242 case IMGFMT_UYVP: return("Packed UYVP");
231 /* case IMGFMT_MPEGPES: return("Mpeg PES");*/ 243 case IMGFMT_MPEGPES: return("Mpeg PES");
232 } 244 }
233 return("Unknown"); 245 return("Unknown");
234 } 246 }
235 247
236 248
305 OUTREG(OV0_VID_BUF_PITCH0_VALUE, besr.vid_buf_pitch0_value); 317 OUTREG(OV0_VID_BUF_PITCH0_VALUE, besr.vid_buf_pitch0_value);
306 OUTREG(OV0_VID_BUF_PITCH1_VALUE, besr.vid_buf_pitch1_value); 318 OUTREG(OV0_VID_BUF_PITCH1_VALUE, besr.vid_buf_pitch1_value);
307 OUTREG(OV0_P1_X_START_END, besr.p1_x_start_end); 319 OUTREG(OV0_P1_X_START_END, besr.p1_x_start_end);
308 OUTREG(OV0_P2_X_START_END, besr.p2_x_start_end); 320 OUTREG(OV0_P2_X_START_END, besr.p2_x_start_end);
309 OUTREG(OV0_P3_X_START_END, besr.p3_x_start_end); 321 OUTREG(OV0_P3_X_START_END, besr.p3_x_start_end);
310 #if 1 322 #if 0
311 OUTREG(OV0_BASE_ADDR, besr.base_addr); 323 OUTREG(OV0_BASE_ADDR, besr.base_addr);
312 #endif 324 #endif
313 OUTREG(OV0_VID_BUF0_BASE_ADRS, besr.vid_buf0_base_adrs); 325 OUTREG(OV0_VID_BUF0_BASE_ADRS, besr.vid_buf0_base_adrs);
314 OUTREG(OV0_VID_BUF1_BASE_ADRS, besr.vid_buf1_base_adrs); 326 OUTREG(OV0_VID_BUF1_BASE_ADRS, besr.vid_buf1_base_adrs);
315 OUTREG(OV0_VID_BUF2_BASE_ADRS, besr.vid_buf2_base_adrs); 327 OUTREG(OV0_VID_BUF2_BASE_ADRS, besr.vid_buf2_base_adrs);
324 bes_flags = SCALER_ENABLE | 336 bes_flags = SCALER_ENABLE |
325 SCALER_DOUBLE_BUFFER | 337 SCALER_DOUBLE_BUFFER |
326 SCALER_ADAPTIVE_DEINT | 338 SCALER_ADAPTIVE_DEINT |
327 SCALER_SMART_SWITCH | 339 SCALER_SMART_SWITCH |
328 SCALER_HORZ_PICK_NEAREST; 340 SCALER_HORZ_PICK_NEAREST;
341 #ifdef RAGE128
342 bes_flags |= SCALER_BURST_PER_PLANE;
343 #endif
329 switch(besr.fourcc) 344 switch(besr.fourcc)
330 { 345 {
331 case IMGFMT_RGB15: 346 case IMGFMT_RGB15:
332 case IMGFMT_BGR15: bes_flags |= SCALER_SOURCE_15BPP; break; 347 case IMGFMT_BGR15: bes_flags |= SCALER_SOURCE_15BPP; break;
333 case IMGFMT_RGB16: 348 case IMGFMT_RGB16:
480 } 495 }
481 } 496 }
482 else 497 else
483 { 498 {
484 besr.vid_buf0_base_adrs = radeon_overlay_off; 499 besr.vid_buf0_base_adrs = radeon_overlay_off;
485 besr.vid_buf0_base_adrs += ((left & ~7) << 1)&0xfffffff0; 500 besr.vid_buf0_base_adrs += ((left & ~7) << 1)&VIF_BUF0_BASE_ADRS_MASK;
486 besr.vid_buf1_base_adrs = besr.vid_buf0_base_adrs; 501 besr.vid_buf1_base_adrs = besr.vid_buf0_base_adrs;
487 besr.vid_buf2_base_adrs = besr.vid_buf0_base_adrs; 502 besr.vid_buf2_base_adrs = besr.vid_buf0_base_adrs;
488 } 503 }
489 besr.vid_buf3_base_adrs = besr.vid_buf0_base_adrs+config->frame_size; 504 besr.vid_buf3_base_adrs = besr.vid_buf0_base_adrs+config->frame_size;
490 besr.vid_buf4_base_adrs = besr.vid_buf1_base_adrs+config->frame_size; 505 besr.vid_buf4_base_adrs = besr.vid_buf1_base_adrs+config->frame_size;
585 if(radeon_config.num_frames<1 || radeon_config.num_frames>4){ 600 if(radeon_config.num_frames<1 || radeon_config.num_frames>4){
586 printk(RVID_MSG"illegal num_frames: %d\n",radeon_config.num_frames); 601 printk(RVID_MSG"illegal num_frames: %d\n",radeon_config.num_frames);
587 return -EFAULT; 602 return -EFAULT;
588 } 603 }
589 604
590 /* FIXME: Fake of G400 ;) or would be better G200 ??? */
591 radeon_config.card_type = 0; 605 radeon_config.card_type = 0;
592 radeon_config.ram_size = radeon_ram_size; 606 radeon_config.ram_size = radeon_ram_size;
593 radeon_overlay_off = radeon_ram_size*0x100000 - radeon_config.frame_size*radeon_config.num_frames; 607 radeon_overlay_off = radeon_ram_size*0x100000 - radeon_config.frame_size*radeon_config.num_frames;
594 radeon_overlay_off &= 0xffff0000; 608 radeon_overlay_off &= 0xffff0000;
595 if(radeon_overlay_off < 0){ 609 if(radeon_overlay_off < 0){
692 { PCI_DEVICE_ID_ATI_RAGE128_RL, "R128 RL" }, 706 { PCI_DEVICE_ID_ATI_RAGE128_RL, "R128 RL" },
693 { PCI_DEVICE_ID_ATI_RAGE128_RM, "R128 RM" }, 707 { PCI_DEVICE_ID_ATI_RAGE128_RM, "R128 RM" },
694 { PCI_DEVICE_ID_ATI_RAGE128_RN, "R128 RN" }, 708 { PCI_DEVICE_ID_ATI_RAGE128_RN, "R128 RN" },
695 { PCI_DEVICE_ID_ATI_RAGE128_RO, "R128 RO" }, 709 { PCI_DEVICE_ID_ATI_RAGE128_RO, "R128 RO" },
696 /* Rage128 M3 */ 710 /* Rage128 M3 */
697 { PCI_DEVICE_ID_ATI_RAGE128_LE, "R128 LE" }, 711 { PCI_DEVICE_ID_ATI_RAGE128_LE, "R128 M3 LE" },
698 { PCI_DEVICE_ID_ATI_RAGE128_LF, "R128 LF" }, 712 { PCI_DEVICE_ID_ATI_RAGE128_LF, "R128 M3 LF" },
699 /* Rage128 Pro Ultra */ 713 /* Rage128 Pro Ultra */
700 { PCI_DEVICE_ID_ATI_RAGE128_U1, "R128 U1" }, 714 { PCI_DEVICE_ID_ATI_RAGE128_U1, "R128Pro U1" },
701 { PCI_DEVICE_ID_ATI_RAGE128_U2, "R128 U2" }, 715 { PCI_DEVICE_ID_ATI_RAGE128_U2, "R128Pro U2" },
702 { PCI_DEVICE_ID_ATI_RAGE128_U3, "R128 U3" } 716 { PCI_DEVICE_ID_ATI_RAGE128_U3, "R128Pro U3" }
703 #else 717 #else
704 /* Radeons (indeed: Rage 256 Pro ;) */ 718 /* Radeons (indeed: Rage 256 Pro ;) */
705 { PCI_DEVICE_ID_RADEON_QD, "Radeon QD " }, 719 { PCI_DEVICE_ID_RADEON_QD, "Radeon QD " },
706 { PCI_DEVICE_ID_RADEON_QE, "Radeon QE " }, 720 { PCI_DEVICE_ID_RADEON_QE, "Radeon QE " },
707 { PCI_DEVICE_ID_RADEON_QF, "Radeon QF " }, 721 { PCI_DEVICE_ID_RADEON_QF, "Radeon QF " },