Mercurial > mplayer.hg
comparison drivers/mgavid.patch @ 5625:5fee21c3720c
mga_vid driver in form of a patch against linux-2.4.18
applicable using for example cd linux && patch -p1 < ~/mgavid.patch
author | eyck |
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date | Mon, 15 Apr 2002 00:08:22 +0000 |
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5624:d9af91d38449 | 5625:5fee21c3720c |
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1 diff -ruN linux.orig/Documentation/Configure.help linux/Documentation/Configure.help | |
2 --- linux.orig/Documentation/Configure.help Mon Apr 15 00:58:14 2002 | |
3 +++ linux/Documentation/Configure.help Mon Apr 15 01:04:11 2002 | |
4 @@ -4542,6 +4542,15 @@ | |
5 There is no need for enabling 'Matrox multihead support' if you have | |
6 only one Matrox card in the box. | |
7 | |
8 +Matrox mga_vid driver | |
9 +CONFIG_FB_MATROX_MGAVID | |
10 + Say Y here if you want to use /dev/mga_vid driver used by | |
11 + advanced video players like mplayer and aviplay. | |
12 + You'll need to mknod /dev/mga_vid c 178 0 | |
13 + If you compile it as module, it will create a module named | |
14 + mga_vid.o. | |
15 + | |
16 + | |
17 3Dfx Voodoo Graphics / Voodoo2 frame buffer support | |
18 CONFIG_FB_VOODOO1 | |
19 Say Y here if you have a 3Dfx Voodoo Graphics (Voodoo1/sst1) or | |
20 diff -ruN linux.orig/drivers/video/Config.in linux/drivers/video/Config.in | |
21 --- linux.orig/drivers/video/Config.in Mon Apr 15 00:58:09 2002 | |
22 +++ linux/drivers/video/Config.in Mon Apr 15 01:04:11 2002 | |
23 @@ -122,6 +122,7 @@ | |
24 bool ' Millennium I/II support' CONFIG_FB_MATROX_MILLENIUM | |
25 bool ' Mystique support' CONFIG_FB_MATROX_MYSTIQUE | |
26 bool ' G100/G200/G400/G450/G550 support' CONFIG_FB_MATROX_G100 | |
27 + tristate ' G200/G400/G450/G550 /dev/mga_vid support' CONFIG_FB_MATROX_MGAVID | |
28 if [ "$CONFIG_I2C" != "n" ]; then | |
29 dep_tristate ' Matrox I2C support' CONFIG_FB_MATROX_I2C $CONFIG_FB_MATROX $CONFIG_I2C_ALGOBIT | |
30 if [ "$CONFIG_FB_MATROX_G100" = "y" ]; then | |
31 diff -ruN linux.orig/drivers/video/matrox/Makefile linux/drivers/video/matrox/Makefile | |
32 --- linux.orig/drivers/video/matrox/Makefile Mon Apr 15 00:58:09 2002 | |
33 +++ linux/drivers/video/matrox/Makefile Mon Apr 15 01:04:11 2002 | |
34 @@ -11,10 +11,11 @@ | |
35 | |
36 # Each configuration option enables a list of files. | |
37 | |
38 -obj-$(CONFIG_FB_MATROX) += matroxfb_base.o matroxfb_accel.o matroxfb_DAC1064.o matroxfb_Ti3026.o matroxfb_misc.o | |
39 +obj-$(CONFIG_FB_MATROX) += matroxfb_base.o matroxfb_accel.o matroxfb_DAC1064.o matroxfb_Ti3026.o matroxfb_misc.o mga_vid.o | |
40 obj-$(CONFIG_FB_MATROX_I2C) += i2c-matroxfb.o | |
41 obj-$(CONFIG_FB_MATROX_MAVEN) += matroxfb_maven.o matroxfb_crtc2.o | |
42 obj-$(CONFIG_FB_MATROX_G450) += matroxfb_g450.o matroxfb_crtc2.o | |
43 +obj-$(CONFIG_FB_MATROX_MGAVID) += mga_vid.o | |
44 | |
45 include $(TOPDIR)/Rules.make | |
46 | |
47 diff -ruN linux.orig/drivers/video/matrox/mga_vid.c linux/drivers/video/matrox/mga_vid.c | |
48 --- linux.orig/drivers/video/matrox/mga_vid.c Thu Jan 1 01:00:00 1970 | |
49 +++ linux/drivers/video/matrox/mga_vid.c Mon Apr 15 01:05:04 2002 | |
50 @@ -0,0 +1,1599 @@ | |
51 +//#define CRTC2 | |
52 + | |
53 +// YUY2 support (see config.format) added by A'rpi/ESP-team | |
54 +// double buffering added by A'rpi/ESP-team | |
55 +// brightness/contrast introduced by eyck | |
56 + | |
57 +// Set this value, if autodetection fails! (video ram size in megabytes) | |
58 +// #define MGA_MEMORY_SIZE 16 | |
59 + | |
60 +//#define MGA_ALLOW_IRQ | |
61 + | |
62 +#define MGA_VSYNC_POS 2 | |
63 + | |
64 +/* | |
65 + * | |
66 + * mga_vid.c | |
67 + * | |
68 + * Copyright (C) 1999 Aaron Holtzman | |
69 + * | |
70 + * Module skeleton based on gutted agpgart module by Jeff Hartmann | |
71 + * <slicer@ionet.net> | |
72 + * | |
73 + * Matrox MGA G200/G400 YUV Video Interface module Version 0.1.0 | |
74 + * | |
75 + * BES == Back End Scaler | |
76 + * | |
77 + * This software has been released under the terms of the GNU Public | |
78 + * license. See http://www.gnu.org/copyleft/gpl.html for details. | |
79 + */ | |
80 + | |
81 +//It's entirely possible this major conflicts with something else | |
82 +/* mknod /dev/mga_vid c 178 0 */ | |
83 + | |
84 +#include <linux/config.h> | |
85 +#include <linux/version.h> | |
86 +#include <linux/module.h> | |
87 +#include <linux/types.h> | |
88 +#include <linux/kernel.h> | |
89 +#include <linux/sched.h> | |
90 +#include <linux/mm.h> | |
91 +#include <linux/string.h> | |
92 +#include <linux/errno.h> | |
93 + | |
94 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,10) | |
95 +#include <linux/malloc.h> | |
96 +#else | |
97 +#include <linux/slab.h> | |
98 +#endif | |
99 + | |
100 +#include <linux/pci.h> | |
101 +#include <linux/ioport.h> | |
102 +#include <linux/init.h> | |
103 + | |
104 +#include "mga_vid.h" | |
105 + | |
106 +#ifdef CONFIG_MTRR | |
107 +#include <asm/mtrr.h> | |
108 +#endif | |
109 + | |
110 +#include <asm/uaccess.h> | |
111 +#include <asm/system.h> | |
112 +#include <asm/io.h> | |
113 + | |
114 +#define TRUE 1 | |
115 +#define FALSE 0 | |
116 + | |
117 +#define MGA_VID_MAJOR 178 | |
118 + | |
119 +//#define MGA_VIDMEM_SIZE mga_ram_size | |
120 + | |
121 +#ifndef PCI_DEVICE_ID_MATROX_G200_PCI | |
122 +#define PCI_DEVICE_ID_MATROX_G200_PCI 0x0520 | |
123 +#endif | |
124 + | |
125 +#ifndef PCI_DEVICE_ID_MATROX_G200_AGP | |
126 +#define PCI_DEVICE_ID_MATROX_G200_AGP 0x0521 | |
127 +#endif | |
128 + | |
129 +#ifndef PCI_DEVICE_ID_MATROX_G400 | |
130 +#define PCI_DEVICE_ID_MATROX_G400 0x0525 | |
131 +#endif | |
132 + | |
133 +#ifndef PCI_DEVICE_ID_MATROX_G550 | |
134 +#define PCI_DEVICE_ID_MATROX_G550 0x2527 | |
135 +#endif | |
136 + | |
137 +MODULE_AUTHOR("Aaron Holtzman <aholtzma@engr.uvic.ca>"); | |
138 +#ifdef MODULE_LICENSE | |
139 +MODULE_LICENSE("GPL"); | |
140 +#endif | |
141 + | |
142 +#define PARAM_BRIGHTNESS "brightness=" | |
143 +#define PARAM_CONTRAST "contrast=" | |
144 +#define PARAM_BLACKIE "blackie=" | |
145 + | |
146 +#define PARAM_BUFF_SIZE 4096 | |
147 +static uint8_t *mga_param_buff = NULL; | |
148 +static uint32_t mga_param_buff_size=0; | |
149 +static uint32_t mga_param_buff_len=0; | |
150 + | |
151 +#define min(x,y) (((x)<(y))?(x):(y)) | |
152 + | |
153 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) | |
154 +#include <linux/ctype.h> | |
155 + | |
156 +unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base) | |
157 +{ | |
158 + unsigned long result = 0,value; | |
159 + | |
160 + if (!base) { | |
161 + base = 10; | |
162 + if (*cp == '0') { | |
163 + base = 8; | |
164 + cp++; | |
165 + if ((*cp == 'x') && isxdigit(cp[1])) { | |
166 + cp++; | |
167 + base = 16; | |
168 + } | |
169 + } | |
170 + } | |
171 + while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp) | |
172 + ? toupper(*cp) : *cp)-'A'+10) < base) { | |
173 + result = result*base + value; | |
174 + cp++; | |
175 + } | |
176 + if (endp) | |
177 + *endp = (char *)cp; | |
178 + return result; | |
179 +} | |
180 + | |
181 +long simple_strtol(const char *cp,char **endp,unsigned int base) | |
182 +{ | |
183 + if(*cp=='-') | |
184 + return -simple_strtoul(cp+1,endp,base); | |
185 + return simple_strtoul(cp,endp,base); | |
186 +} | |
187 +#endif | |
188 + | |
189 + | |
190 +typedef struct bes_registers_s | |
191 +{ | |
192 + //BES Control | |
193 + uint32_t besctl; | |
194 + //BES Global control | |
195 + uint32_t besglobctl; | |
196 + //Luma control (brightness and contrast) | |
197 + uint32_t beslumactl; | |
198 + //Line pitch | |
199 + uint32_t bespitch; | |
200 + | |
201 + //Buffer A-1 Chroma 3 plane org | |
202 + uint32_t besa1c3org; | |
203 + //Buffer A-1 Chroma org | |
204 + uint32_t besa1corg; | |
205 + //Buffer A-1 Luma org | |
206 + uint32_t besa1org; | |
207 + | |
208 + //Buffer A-2 Chroma 3 plane org | |
209 + uint32_t besa2c3org; | |
210 + //Buffer A-2 Chroma org | |
211 + uint32_t besa2corg; | |
212 + //Buffer A-2 Luma org | |
213 + uint32_t besa2org; | |
214 + | |
215 + //Buffer B-1 Chroma 3 plane org | |
216 + uint32_t besb1c3org; | |
217 + //Buffer B-1 Chroma org | |
218 + uint32_t besb1corg; | |
219 + //Buffer B-1 Luma org | |
220 + uint32_t besb1org; | |
221 + | |
222 + //Buffer B-2 Chroma 3 plane org | |
223 + uint32_t besb2c3org; | |
224 + //Buffer B-2 Chroma org | |
225 + uint32_t besb2corg; | |
226 + //Buffer B-2 Luma org | |
227 + uint32_t besb2org; | |
228 + | |
229 + //BES Horizontal coord | |
230 + uint32_t beshcoord; | |
231 + //BES Horizontal inverse scaling [5.14] | |
232 + uint32_t beshiscal; | |
233 + //BES Horizontal source start [10.14] (for scaling) | |
234 + uint32_t beshsrcst; | |
235 + //BES Horizontal source ending [10.14] (for scaling) | |
236 + uint32_t beshsrcend; | |
237 + //BES Horizontal source last | |
238 + uint32_t beshsrclst; | |
239 + | |
240 + | |
241 + //BES Vertical coord | |
242 + uint32_t besvcoord; | |
243 + //BES Vertical inverse scaling [5.14] | |
244 + uint32_t besviscal; | |
245 + //BES Field 1 vertical source last position | |
246 + uint32_t besv1srclst; | |
247 + //BES Field 1 weight start | |
248 + uint32_t besv1wght; | |
249 + //BES Field 2 vertical source last position | |
250 + uint32_t besv2srclst; | |
251 + //BES Field 2 weight start | |
252 + uint32_t besv2wght; | |
253 + | |
254 + | |
255 + //configurable stuff | |
256 + int blackie; | |
257 + | |
258 +} bes_registers_t; | |
259 + | |
260 +static bes_registers_t regs; | |
261 +#ifdef CRTC2 | |
262 +typedef struct crtc2_registers_s | |
263 +{ | |
264 + uint32_t c2ctl; | |
265 + uint32_t c2datactl; | |
266 + uint32_t c2misc; | |
267 + uint32_t c2hparam; | |
268 + uint32_t c2hsync; | |
269 + uint32_t c2offset; | |
270 + uint32_t c2pl2startadd0; | |
271 + uint32_t c2pl2startadd1; | |
272 + uint32_t c2pl3startadd0; | |
273 + uint32_t c2pl3startadd1; | |
274 + uint32_t c2preload; | |
275 + uint32_t c2spicstartadd0; | |
276 + uint32_t c2spicstartadd1; | |
277 + uint32_t c2startadd0; | |
278 + uint32_t c2startadd1; | |
279 + uint32_t c2subpiclut; | |
280 + uint32_t c2vcount; | |
281 + uint32_t c2vparam; | |
282 + uint32_t c2vsync; | |
283 +} crtc2_registers_t; | |
284 +static crtc2_registers_t cregs; | |
285 +#endif | |
286 +static uint32_t mga_vid_in_use = 0; | |
287 +static uint32_t is_g400 = 0; | |
288 +static uint32_t vid_src_ready = 0; | |
289 +static uint32_t vid_overlay_on = 0; | |
290 + | |
291 +static uint8_t *mga_mmio_base = 0; | |
292 +static uint32_t mga_mem_base = 0; | |
293 + | |
294 +static int mga_src_base = 0; // YUV buffer position in video memory | |
295 + | |
296 +static uint32_t mga_ram_size = 0; // how much megabytes videoram we have | |
297 + | |
298 +static uint32_t mga_top_reserved = 0; // reserved space for console font (matroxfb + fastfont) | |
299 + | |
300 +static int mga_brightness = 0; // initial brightness | |
301 +static int mga_contrast = 0; // initial contrast | |
302 + | |
303 +//static int mga_force_memsize = 0; | |
304 + | |
305 +MODULE_PARM(mga_ram_size, "i"); | |
306 +MODULE_PARM(mga_top_reserved, "i"); | |
307 +MODULE_PARM(mga_brightness, "i"); | |
308 +MODULE_PARM(mga_contrast, "i"); | |
309 + | |
310 +static struct pci_dev *pci_dev; | |
311 + | |
312 +static mga_vid_config_t mga_config; | |
313 + | |
314 +static int colkey_saved=0; | |
315 +static int colkey_on=0; | |
316 +static unsigned char colkey_color[4]; | |
317 +static unsigned char colkey_mask[4]; | |
318 + | |
319 +static int mga_irq = -1; | |
320 + | |
321 +//All register offsets are converted to word aligned offsets (32 bit) | |
322 +//because we want all our register accesses to be 32 bits | |
323 +#define VCOUNT 0x1e20 | |
324 + | |
325 +#define PALWTADD 0x3c00 // Index register for X_DATAREG port | |
326 +#define X_DATAREG 0x3c0a | |
327 + | |
328 +#define XMULCTRL 0x19 | |
329 +#define BPP_8 0x00 | |
330 +#define BPP_15 0x01 | |
331 +#define BPP_16 0x02 | |
332 +#define BPP_24 0x03 | |
333 +#define BPP_32_DIR 0x04 | |
334 +#define BPP_32_PAL 0x07 | |
335 + | |
336 +#define XCOLMSK 0x40 | |
337 +#define X_COLKEY 0x42 | |
338 +#define XKEYOPMODE 0x51 | |
339 +#define XCOLMSK0RED 0x52 | |
340 +#define XCOLMSK0GREEN 0x53 | |
341 +#define XCOLMSK0BLUE 0x54 | |
342 +#define XCOLKEY0RED 0x55 | |
343 +#define XCOLKEY0GREEN 0x56 | |
344 +#define XCOLKEY0BLUE 0x57 | |
345 + | |
346 +#ifdef CRTC2 | |
347 + | |
348 +/*CRTC2 registers*/ | |
349 +#define XMISCCTRL 0x1e | |
350 +#define C2CTL 0x3c10 | |
351 +#define C2DATACTL 0x3c4c | |
352 +#define C2MISC 0x3c44 | |
353 +#define C2HPARAM 0x3c14 | |
354 +#define C2HSYNC 0x3c18 | |
355 +#define C2OFFSET 0x3c40 | |
356 +#define C2PL2STARTADD0 0x3c30 // like BESA1CORG | |
357 +#define C2PL2STARTADD1 0x3c34 // like BESA2CORG | |
358 +#define C2PL3STARTADD0 0x3c38 // like BESA1C3ORG | |
359 +#define C2PL3STARTADD1 0x3c3c // like BESA2C3ORG | |
360 +#define C2PRELOAD 0x3c24 | |
361 +#define C2SPICSTARTADD0 0x3c54 | |
362 +#define C2SPICSTARTADD1 0x3c58 | |
363 +#define C2STARTADD0 0x3c28 // like BESA1ORG | |
364 +#define C2STARTADD1 0x3c2c // like BESA2ORG | |
365 +#define C2SUBPICLUT 0x3c50 | |
366 +#define C2VCOUNT 0x3c48 | |
367 +#define C2VPARAM 0x3c1c | |
368 +#define C2VSYNC 0x3c20 | |
369 + | |
370 +#endif | |
371 + | |
372 +// Backend Scaler registers | |
373 +#define BESCTL 0x3d20 | |
374 +#define BESGLOBCTL 0x3dc0 | |
375 +#define BESLUMACTL 0x3d40 | |
376 +#define BESPITCH 0x3d24 | |
377 + | |
378 +#define BESA1C3ORG 0x3d60 | |
379 +#define BESA1CORG 0x3d10 | |
380 +#define BESA1ORG 0x3d00 | |
381 + | |
382 +#define BESA2C3ORG 0x3d64 | |
383 +#define BESA2CORG 0x3d14 | |
384 +#define BESA2ORG 0x3d04 | |
385 + | |
386 +#define BESB1C3ORG 0x3d68 | |
387 +#define BESB1CORG 0x3d18 | |
388 +#define BESB1ORG 0x3d08 | |
389 + | |
390 +#define BESB2C3ORG 0x3d6C | |
391 +#define BESB2CORG 0x3d1C | |
392 +#define BESB2ORG 0x3d0C | |
393 + | |
394 +#define BESHCOORD 0x3d28 | |
395 +#define BESHISCAL 0x3d30 | |
396 +#define BESHSRCEND 0x3d3C | |
397 +#define BESHSRCLST 0x3d50 | |
398 +#define BESHSRCST 0x3d38 | |
399 +#define BESV1WGHT 0x3d48 | |
400 +#define BESV2WGHT 0x3d4c | |
401 +#define BESV1SRCLST 0x3d54 | |
402 +#define BESV2SRCLST 0x3d58 | |
403 +#define BESVISCAL 0x3d34 | |
404 +#define BESVCOORD 0x3d2c | |
405 +#define BESSTATUS 0x3dc4 | |
406 + | |
407 +#define CRTCX 0x1fd4 | |
408 +#define CRTCD 0x1fd5 | |
409 +#define IEN 0x1e1c | |
410 +#define ICLEAR 0x1e18 | |
411 +#define STATUS 0x1e14 | |
412 + | |
413 +static int mga_next_frame=0; | |
414 + | |
415 +#ifdef CRTC2 | |
416 +static void crtc2_frame_sel(int frame) | |
417 +{ | |
418 +switch(frame) { | |
419 +case 0: | |
420 + cregs.c2pl2startadd0=regs.besa1corg; | |
421 + cregs.c2pl3startadd0=regs.besa1c3org; | |
422 + cregs.c2startadd0=regs.besa1org; | |
423 + break; | |
424 +case 1: | |
425 + cregs.c2pl2startadd0=regs.besa2corg; | |
426 + cregs.c2pl3startadd0=regs.besa2c3org; | |
427 + cregs.c2startadd0=regs.besa2org; | |
428 + break; | |
429 +case 2: | |
430 + cregs.c2pl2startadd0=regs.besb1corg; | |
431 + cregs.c2pl3startadd0=regs.besb1c3org; | |
432 + cregs.c2startadd0=regs.besb1org; | |
433 + break; | |
434 +case 3: | |
435 + cregs.c2pl2startadd0=regs.besb2corg; | |
436 + cregs.c2pl3startadd0=regs.besb2c3org; | |
437 + cregs.c2startadd0=regs.besb2org; | |
438 + break; | |
439 +} | |
440 + writel(cregs.c2startadd0, mga_mmio_base + C2STARTADD0); | |
441 + writel(cregs.c2pl2startadd0, mga_mmio_base + C2PL2STARTADD0); | |
442 + writel(cregs.c2pl3startadd0, mga_mmio_base + C2PL3STARTADD0); | |
443 +} | |
444 +#endif | |
445 + | |
446 +static void mga_vid_frame_sel(int frame) | |
447 +{ | |
448 + if ( mga_irq != -1 ) { | |
449 + mga_next_frame=frame; | |
450 + } else { | |
451 + | |
452 + //we don't need the vcount protection as we're only hitting | |
453 + //one register (and it doesn't seem to be double buffered) | |
454 + regs.besctl = (regs.besctl & ~0x07000000) + (frame << 25); | |
455 + writel( regs.besctl, mga_mmio_base + BESCTL ); | |
456 + | |
457 +// writel( regs.besglobctl + ((readl(mga_mmio_base + VCOUNT)+2)<<16), | |
458 + writel( regs.besglobctl + (MGA_VSYNC_POS<<16), | |
459 + mga_mmio_base + BESGLOBCTL); | |
460 +#ifdef CRTC2 | |
461 + crtc2_frame_sel(frame); | |
462 +#endif | |
463 + | |
464 + } | |
465 +} | |
466 + | |
467 + | |
468 +static void mga_vid_write_regs(int restore) | |
469 +{ | |
470 + //Make sure internal registers don't get updated until we're done | |
471 + writel( (readl(mga_mmio_base + VCOUNT)-1)<<16, | |
472 + mga_mmio_base + BESGLOBCTL); | |
473 + | |
474 + // color or coordinate keying | |
475 + | |
476 + if(restore && colkey_saved){ | |
477 + // restore it | |
478 + colkey_saved=0; | |
479 + | |
480 +#ifdef MP_DEBUG | |
481 + printk("mga_vid: Restoring colorkey (ON: %d %02X:%02X:%02X)\n", | |
482 + colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]); | |
483 +#endif | |
484 + | |
485 + // Set color key registers: | |
486 + writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); | |
487 + writeb( colkey_on, mga_mmio_base + X_DATAREG); | |
488 + | |
489 + writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); | |
490 + writeb( colkey_color[0], mga_mmio_base + X_DATAREG); | |
491 + writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); | |
492 + writeb( colkey_color[1], mga_mmio_base + X_DATAREG); | |
493 + writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); | |
494 + writeb( colkey_color[2], mga_mmio_base + X_DATAREG); | |
495 + writeb( X_COLKEY, mga_mmio_base + PALWTADD); | |
496 + writeb( colkey_color[3], mga_mmio_base + X_DATAREG); | |
497 + | |
498 + writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); | |
499 + writeb( colkey_mask[0], mga_mmio_base + X_DATAREG); | |
500 + writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); | |
501 + writeb( colkey_mask[1], mga_mmio_base + X_DATAREG); | |
502 + writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); | |
503 + writeb( colkey_mask[2], mga_mmio_base + X_DATAREG); | |
504 + writeb( XCOLMSK, mga_mmio_base + PALWTADD); | |
505 + writeb( colkey_mask[3], mga_mmio_base + X_DATAREG); | |
506 + | |
507 + } else if(!colkey_saved){ | |
508 + // save it | |
509 + colkey_saved=1; | |
510 + // Get color key registers: | |
511 + writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); | |
512 + colkey_on=(unsigned char)readb(mga_mmio_base + X_DATAREG) & 1; | |
513 + | |
514 + writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); | |
515 + colkey_color[0]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
516 + writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); | |
517 + colkey_color[1]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
518 + writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); | |
519 + colkey_color[2]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
520 + writeb( X_COLKEY, mga_mmio_base + PALWTADD); | |
521 + colkey_color[3]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
522 + | |
523 + writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); | |
524 + colkey_mask[0]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
525 + writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); | |
526 + colkey_mask[1]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
527 + writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); | |
528 + colkey_mask[2]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
529 + writeb( XCOLMSK, mga_mmio_base + PALWTADD); | |
530 + colkey_mask[3]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
531 + | |
532 +#ifdef MP_DEBUG | |
533 + printk("mga_vid: Saved colorkey (ON: %d %02X:%02X:%02X)\n", | |
534 + colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]); | |
535 +#endif | |
536 + | |
537 + } | |
538 + | |
539 +if(!restore){ | |
540 + writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); | |
541 + writeb( mga_config.colkey_on, mga_mmio_base + X_DATAREG); | |
542 + if ( mga_config.colkey_on ) | |
543 + { | |
544 + uint32_t r=0, g=0, b=0; | |
545 + | |
546 + writeb( XMULCTRL, mga_mmio_base + PALWTADD); | |
547 + switch (readb (mga_mmio_base + X_DATAREG)) | |
548 + { | |
549 + case BPP_8: | |
550 + /* Need to look up the color index, just using | |
551 + color 0 for now. */ | |
552 + break; | |
553 + | |
554 + case BPP_15: | |
555 + r = mga_config.colkey_red >> 3; | |
556 + g = mga_config.colkey_green >> 3; | |
557 + b = mga_config.colkey_blue >> 3; | |
558 + break; | |
559 + | |
560 + case BPP_16: | |
561 + r = mga_config.colkey_red >> 3; | |
562 + g = mga_config.colkey_green >> 2; | |
563 + b = mga_config.colkey_blue >> 3; | |
564 + break; | |
565 + | |
566 + case BPP_24: | |
567 + case BPP_32_DIR: | |
568 + case BPP_32_PAL: | |
569 + r = mga_config.colkey_red; | |
570 + g = mga_config.colkey_green; | |
571 + b = mga_config.colkey_blue; | |
572 + break; | |
573 + } | |
574 + | |
575 + // Disable color keying on alpha channel | |
576 + writeb( XCOLMSK, mga_mmio_base + PALWTADD); | |
577 + writeb( 0x00, mga_mmio_base + X_DATAREG); | |
578 + writeb( X_COLKEY, mga_mmio_base + PALWTADD); | |
579 + writeb( 0x00, mga_mmio_base + X_DATAREG); | |
580 + | |
581 + | |
582 + // Set up color key registers | |
583 + writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); | |
584 + writeb( r, mga_mmio_base + X_DATAREG); | |
585 + writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); | |
586 + writeb( g, mga_mmio_base + X_DATAREG); | |
587 + writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); | |
588 + writeb( b, mga_mmio_base + X_DATAREG); | |
589 + | |
590 + // Set up color key mask registers | |
591 + writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); | |
592 + writeb( 0xff, mga_mmio_base + X_DATAREG); | |
593 + writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); | |
594 + writeb( 0xff, mga_mmio_base + X_DATAREG); | |
595 + writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); | |
596 + writeb( 0xff, mga_mmio_base + X_DATAREG); | |
597 + } | |
598 + | |
599 +} | |
600 + | |
601 + // Backend Scaler | |
602 + writel( regs.besctl, mga_mmio_base + BESCTL); | |
603 + if(is_g400) | |
604 + writel( regs.beslumactl, mga_mmio_base + BESLUMACTL); | |
605 + writel( regs.bespitch, mga_mmio_base + BESPITCH); | |
606 + | |
607 + writel( regs.besa1org, mga_mmio_base + BESA1ORG); | |
608 + writel( regs.besa1corg, mga_mmio_base + BESA1CORG); | |
609 + writel( regs.besa2org, mga_mmio_base + BESA2ORG); | |
610 + writel( regs.besa2corg, mga_mmio_base + BESA2CORG); | |
611 + writel( regs.besb1org, mga_mmio_base + BESB1ORG); | |
612 + writel( regs.besb1corg, mga_mmio_base + BESB1CORG); | |
613 + writel( regs.besb2org, mga_mmio_base + BESB2ORG); | |
614 + writel( regs.besb2corg, mga_mmio_base + BESB2CORG); | |
615 + if(is_g400) | |
616 + { | |
617 + writel( regs.besa1c3org, mga_mmio_base + BESA1C3ORG); | |
618 + writel( regs.besa2c3org, mga_mmio_base + BESA2C3ORG); | |
619 + writel( regs.besb1c3org, mga_mmio_base + BESB1C3ORG); | |
620 + writel( regs.besb2c3org, mga_mmio_base + BESB2C3ORG); | |
621 + } | |
622 + | |
623 + writel( regs.beshcoord, mga_mmio_base + BESHCOORD); | |
624 + writel( regs.beshiscal, mga_mmio_base + BESHISCAL); | |
625 + writel( regs.beshsrcst, mga_mmio_base + BESHSRCST); | |
626 + writel( regs.beshsrcend, mga_mmio_base + BESHSRCEND); | |
627 + writel( regs.beshsrclst, mga_mmio_base + BESHSRCLST); | |
628 + | |
629 + writel( regs.besvcoord, mga_mmio_base + BESVCOORD); | |
630 + writel( regs.besviscal, mga_mmio_base + BESVISCAL); | |
631 + | |
632 + writel( regs.besv1srclst, mga_mmio_base + BESV1SRCLST); | |
633 + writel( regs.besv1wght, mga_mmio_base + BESV1WGHT); | |
634 + writel( regs.besv2srclst, mga_mmio_base + BESV2SRCLST); | |
635 + writel( regs.besv2wght, mga_mmio_base + BESV2WGHT); | |
636 + | |
637 + //update the registers somewhere between 1 and 2 frames from now. | |
638 + writel( regs.besglobctl + ((readl(mga_mmio_base + VCOUNT)+2)<<16), | |
639 + mga_mmio_base + BESGLOBCTL); | |
640 + | |
641 +#if 0 | |
642 + printk(KERN_DEBUG "mga_vid: wrote BES registers\n"); | |
643 + printk(KERN_DEBUG "mga_vid: BESCTL = 0x%08x\n", | |
644 + readl(mga_mmio_base + BESCTL)); | |
645 + printk(KERN_DEBUG "mga_vid: BESGLOBCTL = 0x%08x\n", | |
646 + readl(mga_mmio_base + BESGLOBCTL)); | |
647 + printk(KERN_DEBUG "mga_vid: BESSTATUS= 0x%08x\n", | |
648 + readl(mga_mmio_base + BESSTATUS)); | |
649 +#endif | |
650 +#ifdef CRTC2 | |
651 +// printk("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL)); | |
652 +// printk("c2misc:0x%08x\n",readl(mga_mmio_base + C2MISC)); | |
653 +// printk("c2ctl:0x%08x c2datactl:0x%08x\n",cregs.c2ctl,cregs.c2datactl); | |
654 + | |
655 +// writel(cregs.c2ctl, mga_mmio_base + C2CTL); | |
656 + | |
657 + writel(((readl(mga_mmio_base + C2CTL) & ~0x03e00000) + (cregs.c2ctl & 0x03e00000)), mga_mmio_base + C2CTL); | |
658 + writel(((readl(mga_mmio_base + C2DATACTL) & ~0x000000ff) + (cregs.c2datactl & 0x000000ff)), mga_mmio_base + C2DATACTL); | |
659 + // ctrc2 | |
660 + // disable CRTC2 acording to specs | |
661 +// writel(cregs.c2ctl & 0xfffffff0, mga_mmio_base + C2CTL); | |
662 + // je to treba ??? | |
663 +// writeb((readb(mga_mmio_base + XMISCCTRL) & 0x19) | 0xa2, mga_mmio_base + XMISCCTRL); // MAFC - mfcsel & vdoutsel | |
664 +// writeb((readb(mga_mmio_base + XMISCCTRL) & 0x19) | 0x92, mga_mmio_base + XMISCCTRL); | |
665 +// writeb((readb(mga_mmio_base + XMISCCTRL) & ~0xe9) + 0xa2, mga_mmio_base + XMISCCTRL); | |
666 +// writel(cregs.c2datactl, mga_mmio_base + C2DATACTL); | |
667 +// writel(cregs.c2hparam, mga_mmio_base + C2HPARAM); | |
668 +// writel(cregs.c2hsync, mga_mmio_base + C2HSYNC); | |
669 +// writel(cregs.c2vparam, mga_mmio_base + C2VPARAM); | |
670 +// writel(cregs.c2vsync, mga_mmio_base + C2VSYNC); | |
671 + writel(cregs.c2misc, mga_mmio_base + C2MISC); | |
672 + | |
673 +#ifdef MP_DEBUG | |
674 + printk("c2offset = %d\n",cregs.c2offset); | |
675 +#endif | |
676 + | |
677 + writel(cregs.c2offset, mga_mmio_base + C2OFFSET); | |
678 + writel(cregs.c2startadd0, mga_mmio_base + C2STARTADD0); | |
679 +// writel(cregs.c2startadd1, mga_mmio_base + C2STARTADD1); | |
680 + writel(cregs.c2pl2startadd0, mga_mmio_base + C2PL2STARTADD0); | |
681 +// writel(cregs.c2pl2startadd1, mga_mmio_base + C2PL2STARTADD1); | |
682 + writel(cregs.c2pl3startadd0, mga_mmio_base + C2PL3STARTADD0); | |
683 +// writel(cregs.c2pl3startadd1, mga_mmio_base + C2PL3STARTADD1); | |
684 + writel(cregs.c2spicstartadd0, mga_mmio_base + C2SPICSTARTADD0); | |
685 +// writel(cregs.c2spicstartadd1, mga_mmio_base + C2SPICSTARTADD1); | |
686 +// writel(cregs.c2subpiclut, mga_mmio_base + C2SUBPICLUT); | |
687 +// writel(cregs.c2preload, mga_mmio_base + C2PRELOAD); | |
688 + // finaly enable everything | |
689 +// writel(cregs.c2ctl, mga_mmio_base + C2CTL); | |
690 +// printk("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL)); | |
691 +// printk("c2misc:0x%08x\n", readl(mga_mmio_base + C2MISC)); | |
692 +#endif | |
693 +} | |
694 + | |
695 +static int mga_vid_set_config(mga_vid_config_t *config) | |
696 +{ | |
697 + int x, y, sw, sh, dw, dh; | |
698 + int besleft, bestop, ifactor, ofsleft, ofstop, baseadrofs, weight, weights; | |
699 + int frame_size=config->frame_size; | |
700 +#ifdef CRTC2 | |
701 +#define right_margin 0 | |
702 +#define left_margin 18 | |
703 +#define hsync_len 46 | |
704 +#define lower_margin 10 | |
705 +#define vsync_len 4 | |
706 +#define upper_margin 39 | |
707 + | |
708 + unsigned int hdispend = (config->src_width + 31) & ~31; | |
709 + unsigned int hsyncstart = hdispend + (right_margin & ~7); | |
710 + unsigned int hsyncend = hsyncstart + (hsync_len & ~7); | |
711 + unsigned int htotal = hsyncend + (left_margin & ~7); | |
712 + unsigned int vdispend = config->src_height; | |
713 + unsigned int vsyncstart = vdispend + lower_margin; | |
714 + unsigned int vsyncend = vsyncstart + vsync_len; | |
715 + unsigned int vtotal = vsyncend + upper_margin; | |
716 +#endif | |
717 + x = config->x_org; | |
718 + y = config->y_org; | |
719 + sw = config->src_width; | |
720 + sh = config->src_height; | |
721 + dw = config->dest_width; | |
722 + dh = config->dest_height; | |
723 + | |
724 +#ifdef MP_DEBUG | |
725 + printk(KERN_DEBUG "mga_vid: Setting up a %dx%d+%d+%d video window (src %dx%d) format %X\n", | |
726 + dw, dh, x, y, sw, sh, config->format); | |
727 +#endif | |
728 + | |
729 + if(sw<4 || sh<4 || dw<4 || dh<4){ | |
730 + printk(KERN_ERR "mga_vid: Invalid src/dest dimenstions\n"); | |
731 + return -1; | |
732 + } | |
733 + | |
734 + //FIXME check that window is valid and inside desktop | |
735 + | |
736 + //FIXME figure out a better way to allocate memory on card | |
737 + //allocate 2 megs | |
738 + //mga_src_base = mga_mem_base + (MGA_VIDMEM_SIZE-2) * 0x100000; | |
739 + //mga_src_base = (MGA_VIDMEM_SIZE-3) * 0x100000; | |
740 + | |
741 + | |
742 + //Setup the BES registers for a three plane 4:2:0 video source | |
743 + | |
744 + regs.besglobctl = 0; | |
745 + | |
746 +switch(config->format){ | |
747 + case MGA_VID_FORMAT_YV12: | |
748 + case MGA_VID_FORMAT_I420: | |
749 + case MGA_VID_FORMAT_IYUV: | |
750 + regs.besctl = 1 // BES enabled | |
751 + + (0<<6) // even start polarity | |
752 + + (1<<10) // x filtering enabled | |
753 + + (1<<11) // y filtering enabled | |
754 + + (1<<16) // chroma upsampling | |
755 + + (1<<17) // 4:2:0 mode | |
756 + + (1<<18); // dither enabled | |
757 +#if 0 | |
758 + if(is_g400) | |
759 + { | |
760 + //zoom disabled, zoom filter disabled, 420 3 plane format, proc amp | |
761 + //disabled, rgb mode disabled | |
762 + regs.besglobctl = (1<<5); | |
763 + } | |
764 + else | |
765 + { | |
766 + //zoom disabled, zoom filter disabled, Cb samples in 0246, Cr | |
767 + //in 1357, BES register update on besvcnt | |
768 + regs.besglobctl = 0; | |
769 + } | |
770 +#endif | |
771 + break; | |
772 + | |
773 + case MGA_VID_FORMAT_YUY2: | |
774 + regs.besctl = 1 // BES enabled | |
775 + + (0<<6) // even start polarity | |
776 + + (1<<10) // x filtering enabled | |
777 + + (1<<11) // y filtering enabled | |
778 + + (1<<16) // chroma upsampling | |
779 + + (0<<17) // 4:2:2 mode | |
780 + + (1<<18); // dither enabled | |
781 + | |
782 + regs.besglobctl = 0; // YUY2 format selected | |
783 + break; | |
784 + | |
785 + case MGA_VID_FORMAT_UYVY: | |
786 + regs.besctl = 1 // BES enabled | |
787 + + (0<<6) // even start polarity | |
788 + + (1<<10) // x filtering enabled | |
789 + + (1<<11) // y filtering enabled | |
790 + + (1<<16) // chroma upsampling | |
791 + + (0<<17) // 4:2:2 mode | |
792 + + (1<<18); // dither enabled | |
793 + | |
794 + regs.besglobctl = 1<<6; // UYVY format selected | |
795 + break; | |
796 + | |
797 + default: | |
798 + printk(KERN_ERR "mga_vid: Unsupported pixel format: 0x%X\n",config->format); | |
799 + return -1; | |
800 +} | |
801 + | |
802 + // setting black&white mode | |
803 + regs.besctl|=(regs.blackie<<20); | |
804 + | |
805 + //Enable contrast and brightness control | |
806 + regs.besglobctl |= (1<<5) + (1<<7); | |
807 + | |
808 + // brightness ; default is 0x7f; | |
809 + regs.beslumactl = (mga_brightness << 16); | |
810 + // contrast: | |
811 + regs.beslumactl|= ((mga_contrast+0x80)<<0); | |
812 + | |
813 + //Setup destination window boundaries | |
814 + besleft = x > 0 ? x : 0; | |
815 + bestop = y > 0 ? y : 0; | |
816 + regs.beshcoord = (besleft<<16) + (x + dw-1); | |
817 + regs.besvcoord = (bestop<<16) + (y + dh-1); | |
818 + | |
819 + //Setup source dimensions | |
820 + regs.beshsrclst = (sw - 1) << 16; | |
821 + regs.bespitch = (sw + 31) & ~31 ; | |
822 + | |
823 + //Setup horizontal scaling | |
824 + ifactor = ((sw-1)<<14)/(dw-1); | |
825 + ofsleft = besleft - x; | |
826 + | |
827 + regs.beshiscal = ifactor<<2; | |
828 + regs.beshsrcst = (ofsleft*ifactor)<<2; | |
829 + regs.beshsrcend = regs.beshsrcst + (((dw - ofsleft - 1) * ifactor) << 2); | |
830 + | |
831 + //Setup vertical scaling | |
832 + ifactor = ((sh-1)<<14)/(dh-1); | |
833 + ofstop = bestop - y; | |
834 + | |
835 + regs.besviscal = ifactor<<2; | |
836 + | |
837 + baseadrofs = ((ofstop*regs.besviscal)>>16)*regs.bespitch; | |
838 + //frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2; | |
839 + regs.besa1org = (uint32_t) mga_src_base + baseadrofs; | |
840 + regs.besa2org = (uint32_t) mga_src_base + baseadrofs + 1*frame_size; | |
841 + regs.besb1org = (uint32_t) mga_src_base + baseadrofs + 2*frame_size; | |
842 + regs.besb2org = (uint32_t) mga_src_base + baseadrofs + 3*frame_size; | |
843 + | |
844 +if(config->format==MGA_VID_FORMAT_YV12 | |
845 + ||config->format==MGA_VID_FORMAT_IYUV | |
846 + ||config->format==MGA_VID_FORMAT_I420 | |
847 + ){ | |
848 + // planar YUV frames: | |
849 + if (is_g400) | |
850 + baseadrofs = (((ofstop*regs.besviscal)/4)>>16)*regs.bespitch; | |
851 + else | |
852 + baseadrofs = (((ofstop*regs.besviscal)/2)>>16)*regs.bespitch; | |
853 + | |
854 + if(config->format==MGA_VID_FORMAT_YV12 || !is_g400){ | |
855 + regs.besa1corg = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; | |
856 + regs.besa2corg = (uint32_t) mga_src_base + baseadrofs + 1*frame_size + regs.bespitch * sh; | |
857 + regs.besb1corg = (uint32_t) mga_src_base + baseadrofs + 2*frame_size + regs.bespitch * sh; | |
858 + regs.besb2corg = (uint32_t) mga_src_base + baseadrofs + 3*frame_size + regs.bespitch * sh; | |
859 + regs.besa1c3org = regs.besa1corg + ((regs.bespitch * sh) / 4); | |
860 + regs.besa2c3org = regs.besa2corg + ((regs.bespitch * sh) / 4); | |
861 + regs.besb1c3org = regs.besb1corg + ((regs.bespitch * sh) / 4); | |
862 + regs.besb2c3org = regs.besb2corg + ((regs.bespitch * sh) / 4); | |
863 + } else { | |
864 + regs.besa1c3org = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; | |
865 + regs.besa2c3org = (uint32_t) mga_src_base + baseadrofs + 1*frame_size + regs.bespitch * sh; | |
866 + regs.besb1c3org = (uint32_t) mga_src_base + baseadrofs + 2*frame_size + regs.bespitch * sh; | |
867 + regs.besb2c3org = (uint32_t) mga_src_base + baseadrofs + 3*frame_size + regs.bespitch * sh; | |
868 + regs.besa1corg = regs.besa1c3org + ((regs.bespitch * sh) / 4); | |
869 + regs.besa2corg = regs.besa2c3org + ((regs.bespitch * sh) / 4); | |
870 + regs.besb1corg = regs.besb1c3org + ((regs.bespitch * sh) / 4); | |
871 + regs.besb2corg = regs.besb2c3org + ((regs.bespitch * sh) / 4); | |
872 + } | |
873 + | |
874 +} | |
875 + | |
876 + weight = ofstop * (regs.besviscal >> 2); | |
877 + weights = weight < 0 ? 1 : 0; | |
878 + regs.besv2wght = regs.besv1wght = (weights << 16) + ((weight & 0x3FFF) << 2); | |
879 + regs.besv2srclst = regs.besv1srclst = sh - 1 - (((ofstop * regs.besviscal) >> 16) & 0x03FF); | |
880 + | |
881 +#ifdef CRTC2 | |
882 + // pridat hlavni registry - tj. casovani ... | |
883 + | |
884 + | |
885 +switch(config->format){ | |
886 + case MGA_VID_FORMAT_YV12: | |
887 + case MGA_VID_FORMAT_I420: | |
888 + case MGA_VID_FORMAT_IYUV: | |
889 + cregs.c2ctl = 1 // CRTC2 enabled | |
890 + + (1<<1) // external clock | |
891 + + (0<<2) // external clock | |
892 + + (1<<3) // pixel clock enable - not needed ??? | |
893 + + (0<<4) // high prioryty req | |
894 + + (1<<5) // high prioryty req | |
895 + + (0<<6) // high prioryty req | |
896 + + (1<<8) // high prioryty req max | |
897 + + (0<<9) // high prioryty req max | |
898 + + (0<<10) // high prioryty req max | |
899 + + (0<<20) // CRTC1 to DAC | |
900 + + (1<<21) // 420 mode | |
901 + + (1<<22) // 420 mode | |
902 + + (1<<23) // 420 mode | |
903 + + (0<<24) // single chroma line for 420 mode - need to be corrected | |
904 + + (0<<25) /*/ interlace mode - need to be corrected*/ | |
905 + + (0<<26) // field legth polariry | |
906 + + (0<<27) // field identification polariry | |
907 + + (1<<28) // VIDRST detection mode | |
908 + + (0<<29) // VIDRST detection mode | |
909 + + (1<<30) // Horizontal counter preload | |
910 + + (1<<31) // Vertical counter preload | |
911 + ; | |
912 + cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode | |
913 + + (1<<1) // Y filter enable | |
914 + + (1<<2) // CbCr filter enable | |
915 + + (0<<3) // subpicture enable (disabled) | |
916 + + (0<<4) // NTSC enable (disabled - PAL) | |
917 + + (0<<5) // C2 static subpicture enable (disabled) | |
918 + + (0<<6) // C2 subpicture offset division (disabled) | |
919 + + (0<<7) // 422 subformat selection ! | |
920 +/* + (0<<8) // 15 bpp high alpha | |
921 + + (0<<9) // 15 bpp high alpha | |
922 + + (0<<10) // 15 bpp high alpha | |
923 + + (0<<11) // 15 bpp high alpha | |
924 + + (0<<12) // 15 bpp high alpha | |
925 + + (0<<13) // 15 bpp high alpha | |
926 + + (0<<14) // 15 bpp high alpha | |
927 + + (0<<15) // 15 bpp high alpha | |
928 + + (0<<16) // 15 bpp low alpha | |
929 + + (0<<17) // 15 bpp low alpha | |
930 + + (0<<18) // 15 bpp low alpha | |
931 + + (0<<19) // 15 bpp low alpha | |
932 + + (0<<20) // 15 bpp low alpha | |
933 + + (0<<21) // 15 bpp low alpha | |
934 + + (0<<22) // 15 bpp low alpha | |
935 + + (0<<23) // 15 bpp low alpha | |
936 + + (0<<24) // static subpicture key | |
937 + + (0<<25) // static subpicture key | |
938 + + (0<<26) // static subpicture key | |
939 + + (0<<27) // static subpicture key | |
940 + + (0<<28) // static subpicture key | |
941 +*/ ; | |
942 + break; | |
943 + | |
944 + case MGA_VID_FORMAT_YUY2: | |
945 + cregs.c2ctl = 1 // CRTC2 enabled | |
946 + + (1<<1) // external clock | |
947 + + (0<<2) // external clock | |
948 + + (1<<3) // pixel clock enable - not needed ??? | |
949 + + (0<<4) // high prioryty req - acc to spec | |
950 + + (1<<5) // high prioryty req | |
951 + + (0<<6) // high prioryty req | |
952 + // 7 reserved | |
953 + + (1<<8) // high prioryty req max | |
954 + + (0<<9) // high prioryty req max | |
955 + + (0<<10) // high prioryty req max | |
956 + // 11-19 reserved | |
957 + + (0<<20) // CRTC1 to DAC | |
958 + + (1<<21) // 422 mode | |
959 + + (0<<22) // 422 mode | |
960 + + (1<<23) // 422 mode | |
961 + + (0<<24) // single chroma line for 420 mode - need to be corrected | |
962 + + (0<<25) /*/ interlace mode - need to be corrected*/ | |
963 + + (0<<26) // field legth polariry | |
964 + + (0<<27) // field identification polariry | |
965 + + (1<<28) // VIDRST detection mode | |
966 + + (0<<29) // VIDRST detection mode | |
967 + + (1<<30) // Horizontal counter preload | |
968 + + (1<<31) // Vertical counter preload | |
969 + ; | |
970 + cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode | |
971 + + (1<<1) // Y filter enable | |
972 + + (1<<2) // CbCr filter enable | |
973 + + (0<<3) // subpicture enable (disabled) | |
974 + + (0<<4) // NTSC enable (disabled - PAL) | |
975 + + (0<<5) // C2 static subpicture enable (disabled) | |
976 + + (0<<6) // C2 subpicture offset division (disabled) | |
977 + + (0<<7) // 422 subformat selection ! | |
978 +/* + (0<<8) // 15 bpp high alpha | |
979 + + (0<<9) // 15 bpp high alpha | |
980 + + (0<<10) // 15 bpp high alpha | |
981 + + (0<<11) // 15 bpp high alpha | |
982 + + (0<<12) // 15 bpp high alpha | |
983 + + (0<<13) // 15 bpp high alpha | |
984 + + (0<<14) // 15 bpp high alpha | |
985 + + (0<<15) // 15 bpp high alpha | |
986 + + (0<<16) // 15 bpp low alpha | |
987 + + (0<<17) // 15 bpp low alpha | |
988 + + (0<<18) // 15 bpp low alpha | |
989 + + (0<<19) // 15 bpp low alpha | |
990 + + (0<<20) // 15 bpp low alpha | |
991 + + (0<<21) // 15 bpp low alpha | |
992 + + (0<<22) // 15 bpp low alpha | |
993 + + (0<<23) // 15 bpp low alpha | |
994 + + (0<<24) // static subpicture key | |
995 + + (0<<25) // static subpicture key | |
996 + + (0<<26) // static subpicture key | |
997 + + (0<<27) // static subpicture key | |
998 + + (0<<28) // static subpicture key | |
999 +*/ ; | |
1000 + break; | |
1001 + | |
1002 + case MGA_VID_FORMAT_UYVY: | |
1003 + cregs.c2ctl = 1 // CRTC2 enabled | |
1004 + + (1<<1) // external clock | |
1005 + + (0<<2) // external clock | |
1006 + + (1<<3) // pixel clock enable - not needed ??? | |
1007 + + (0<<4) // high prioryty req | |
1008 + + (1<<5) // high prioryty req | |
1009 + + (0<<6) // high prioryty req | |
1010 + + (1<<8) // high prioryty req max | |
1011 + + (0<<9) // high prioryty req max | |
1012 + + (0<<10) // high prioryty req max | |
1013 + + (0<<20) // CRTC1 to DAC | |
1014 + + (1<<21) // 422 mode | |
1015 + + (0<<22) // 422 mode | |
1016 + + (1<<23) // 422 mode | |
1017 + + (1<<24) // single chroma line for 420 mode - need to be corrected | |
1018 + + (1<<25) /*/ interlace mode - need to be corrected*/ | |
1019 + + (0<<26) // field legth polariry | |
1020 + + (0<<27) // field identification polariry | |
1021 + + (1<<28) // VIDRST detection mode | |
1022 + + (0<<29) // VIDRST detection mode | |
1023 + + (1<<30) // Horizontal counter preload | |
1024 + + (1<<31) // Vertical counter preload | |
1025 + ; | |
1026 + cregs.c2datactl = 0 // enable dither - propably not needed, we are already in YUV mode | |
1027 + + (1<<1) // Y filter enable | |
1028 + + (1<<2) // CbCr filter enable | |
1029 + + (0<<3) // subpicture enable (disabled) | |
1030 + + (0<<4) // NTSC enable (disabled - PAL) | |
1031 + + (0<<5) // C2 static subpicture enable (disabled) | |
1032 + + (0<<6) // C2 subpicture offset division (disabled) | |
1033 + + (1<<7) // 422 subformat selection ! | |
1034 +/* + (0<<8) // 15 bpp high alpha | |
1035 + + (0<<9) // 15 bpp high alpha | |
1036 + + (0<<10) // 15 bpp high alpha | |
1037 + + (0<<11) // 15 bpp high alpha | |
1038 + + (0<<12) // 15 bpp high alpha | |
1039 + + (0<<13) // 15 bpp high alpha | |
1040 + + (0<<14) // 15 bpp high alpha | |
1041 + + (0<<15) // 15 bpp high alpha | |
1042 + + (0<<16) // 15 bpp low alpha | |
1043 + + (0<<17) // 15 bpp low alpha | |
1044 + + (0<<18) // 15 bpp low alpha | |
1045 + + (0<<19) // 15 bpp low alpha | |
1046 + + (0<<20) // 15 bpp low alpha | |
1047 + + (0<<21) // 15 bpp low alpha | |
1048 + + (0<<22) // 15 bpp low alpha | |
1049 + + (0<<23) // 15 bpp low alpha | |
1050 + + (0<<24) // static subpicture key | |
1051 + + (0<<25) // static subpicture key | |
1052 + + (0<<26) // static subpicture key | |
1053 + + (0<<27) // static subpicture key | |
1054 + + (0<<28) // static subpicture key | |
1055 +*/ ; | |
1056 + break; | |
1057 + | |
1058 + default: | |
1059 + printk(KERN_ERR "mga_vid: Unsupported pixel format: 0x%X\n",config->format); | |
1060 + return -1; | |
1061 + } | |
1062 + | |
1063 + cregs.c2hparam=((hdispend - 8) << 16) | (htotal - 8); | |
1064 + cregs.c2hsync=((hsyncend - 8) << 16) | (hsyncstart - 8); | |
1065 + | |
1066 + cregs.c2misc=0 // CRTCV2 656 togg f0 | |
1067 + +(0<<1) // CRTCV2 656 togg f0 | |
1068 + +(0<<2) // CRTCV2 656 togg f0 | |
1069 + +(0<<4) // CRTCV2 656 togg f1 | |
1070 + +(0<<5) // CRTCV2 656 togg f1 | |
1071 + +(0<<6) // CRTCV2 656 togg f1 | |
1072 + +(0<<8) // Hsync active high | |
1073 + +(0<<9) // Vsync active high | |
1074 + // 16-27 c2vlinecomp - nevim co tam dat | |
1075 + ; | |
1076 + cregs.c2offset=(regs.bespitch << 1); | |
1077 + | |
1078 + cregs.c2pl2startadd0=regs.besa1corg; | |
1079 +// cregs.c2pl2startadd1=regs.besa2corg; | |
1080 + cregs.c2pl3startadd0=regs.besa1c3org; | |
1081 +// cregs.c2pl3startadd1=regs.besa2c3org; | |
1082 + | |
1083 + cregs.c2preload=(vsyncstart << 16) | (hsyncstart); // from | |
1084 + | |
1085 + cregs.c2spicstartadd0=0; // not used | |
1086 +// cregs.c2spicstartadd1=0; // not used | |
1087 + | |
1088 + cregs.c2startadd0=regs.besa1org; | |
1089 +// cregs.c2startadd1=regs.besa2org; | |
1090 + | |
1091 + cregs.c2subpiclut=0; //not used | |
1092 + | |
1093 + cregs.c2vparam=((vdispend - 1) << 16) | (vtotal - 1); | |
1094 + cregs.c2vsync=((vsyncend - 1) << 16) | (vsyncstart - 1); | |
1095 + | |
1096 + | |
1097 +#endif | |
1098 + | |
1099 + mga_vid_write_regs(0); | |
1100 + return 0; | |
1101 +} | |
1102 + | |
1103 +#ifdef MGA_ALLOW_IRQ | |
1104 + | |
1105 +static void enable_irq(){ | |
1106 + long int cc; | |
1107 + | |
1108 + cc = readl(mga_mmio_base + IEN); | |
1109 +// printk(KERN_ALERT "*** !!! IRQREG = %d\n", (int)(cc&0xff)); | |
1110 + | |
1111 + writeb( 0x11, mga_mmio_base + CRTCX); | |
1112 + | |
1113 + writeb(0x20, mga_mmio_base + CRTCD ); /* clear 0, enable off */ | |
1114 + writeb(0x00, mga_mmio_base + CRTCD ); /* enable on */ | |
1115 + writeb(0x10, mga_mmio_base + CRTCD ); /* clear = 1 */ | |
1116 + | |
1117 + writel( regs.besglobctl , mga_mmio_base + BESGLOBCTL); | |
1118 + | |
1119 +} | |
1120 + | |
1121 +static void disable_irq(){ | |
1122 + | |
1123 + writeb( 0x11, mga_mmio_base + CRTCX); | |
1124 + writeb(0x20, mga_mmio_base + CRTCD ); /* clear 0, enable off */ | |
1125 + | |
1126 +} | |
1127 + | |
1128 +void mga_handle_irq(int irq, void *dev_id, struct pt_regs *pregs) { | |
1129 +// static int frame=0; | |
1130 +// static int counter=0; | |
1131 + long int cc; | |
1132 +// if ( ! mga_enabled_flag ) return; | |
1133 + | |
1134 +// printk(KERN_DEBUG "vcount = %d\n",readl(mga_mmio_base + VCOUNT)); | |
1135 + | |
1136 + //printk("mga_interrupt #%d\n", irq); | |
1137 + | |
1138 + if ( irq != -1 ) { | |
1139 + | |
1140 + cc = readl(mga_mmio_base + STATUS); | |
1141 + if ( ! (cc & 0x10) ) return; /* vsyncpen */ | |
1142 +// debug_irqcnt++; | |
1143 + } | |
1144 + | |
1145 +// if ( debug_irqignore ) { | |
1146 +// debug_irqignore = 0; | |
1147 + | |
1148 + | |
1149 +/* | |
1150 + if ( mga_conf_deinterlace ) { | |
1151 + if ( mga_first_field ) { | |
1152 + // printk("mga_interrupt first field\n"); | |
1153 + if ( syncfb_interrupt() ) | |
1154 + mga_first_field = 0; | |
1155 + } else { | |
1156 + // printk("mga_interrupt second field\n"); | |
1157 + mga_select_buffer( mga_current_field | 2 ); | |
1158 + mga_first_field = 1; | |
1159 + } | |
1160 + } else { | |
1161 + syncfb_interrupt(); | |
1162 + } | |
1163 +*/ | |
1164 + | |
1165 +// frame=(frame+1)&1; | |
1166 + regs.besctl = (regs.besctl & ~0x07000000) + (mga_next_frame << 25); | |
1167 + writel( regs.besctl, mga_mmio_base + BESCTL ); | |
1168 + | |
1169 +#ifdef CRTC2 | |
1170 +// sem pridat vyber obrazku !!!! | |
1171 + crtc2_frame_sel(mga_next_frame); | |
1172 +#endif | |
1173 + | |
1174 +#if 0 | |
1175 + ++counter; | |
1176 + if(!(counter&63)){ | |
1177 + printk("mga irq counter = %d\n",counter); | |
1178 + } | |
1179 +#endif | |
1180 + | |
1181 +// } else { | |
1182 +// debug_irqignore = 1; | |
1183 +// } | |
1184 + | |
1185 + if ( irq != -1 ) { | |
1186 + writeb( 0x11, mga_mmio_base + CRTCX); | |
1187 + writeb( 0, mga_mmio_base + CRTCD ); | |
1188 + writeb( 0x10, mga_mmio_base + CRTCD ); | |
1189 + } | |
1190 + | |
1191 +// writel( regs.besglobctl, mga_mmio_base + BESGLOBCTL); | |
1192 + | |
1193 + | |
1194 + return; | |
1195 + | |
1196 +} | |
1197 + | |
1198 +#endif | |
1199 + | |
1200 +static int mga_vid_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) | |
1201 +{ | |
1202 + int frame; | |
1203 + uint32_t tmp; | |
1204 + | |
1205 + | |
1206 + switch(cmd) | |
1207 + { | |
1208 + case MGA_VID_CONFIG: | |
1209 + //FIXME remove | |
1210 +// printk(KERN_DEBUG "vcount = %d\n",readl(mga_mmio_base + VCOUNT)); | |
1211 +#ifdef MP_DEBUG | |
1212 + printk(KERN_DEBUG "mga_mmio_base = %p\n",mga_mmio_base); | |
1213 + printk(KERN_DEBUG "mga_mem_base = %08x\n",mga_mem_base); | |
1214 + //FIXME remove | |
1215 + | |
1216 + printk(KERN_DEBUG "mga_vid: Received configuration\n"); | |
1217 +#endif | |
1218 + | |
1219 + if(copy_from_user(&mga_config,(mga_vid_config_t*) arg,sizeof(mga_vid_config_t))) | |
1220 + { | |
1221 + printk(KERN_ERR "mga_vid: failed copy from userspace\n"); | |
1222 + return(-EFAULT); | |
1223 + } | |
1224 + if(mga_config.version != MGA_VID_VERSION){ | |
1225 + printk(KERN_ERR "mga_vid: incompatible version! driver: %X requested: %X\n",MGA_VID_VERSION,mga_config.version); | |
1226 + return(-EFAULT); | |
1227 + } | |
1228 + | |
1229 + if(mga_config.frame_size==0 || mga_config.frame_size>1024*768*2){ | |
1230 + printk(KERN_ERR "mga_vid: illegal frame_size: %d\n",mga_config.frame_size); | |
1231 + return(-EFAULT); | |
1232 + } | |
1233 + | |
1234 + if(mga_config.num_frames<1 || mga_config.num_frames>4){ | |
1235 + printk(KERN_ERR "mga_vid: illegal num_frames: %d\n",mga_config.num_frames); | |
1236 + return(-EFAULT); | |
1237 + } | |
1238 + | |
1239 + mga_src_base = (mga_ram_size*0x100000-mga_config.num_frames*mga_config.frame_size-mga_top_reserved); | |
1240 + if(mga_src_base<0){ | |
1241 + printk(KERN_ERR "mga_vid: not enough memory for frames!\n"); | |
1242 + return(-EFAULT); | |
1243 + } | |
1244 + mga_src_base &= (~0xFFFF); // 64k boundary | |
1245 +#ifdef MP_DEBUG | |
1246 + printk(KERN_DEBUG "mga YUV buffer base: 0x%X\n", mga_src_base); | |
1247 +#endif | |
1248 + | |
1249 + if (is_g400) | |
1250 + mga_config.card_type = MGA_G400; | |
1251 + else | |
1252 + mga_config.card_type = MGA_G200; | |
1253 + | |
1254 + mga_config.ram_size = mga_ram_size; | |
1255 + | |
1256 + if (copy_to_user((mga_vid_config_t *) arg, &mga_config, sizeof(mga_vid_config_t))) | |
1257 + { | |
1258 + printk(KERN_ERR "mga_vid: failed copy to userspace\n"); | |
1259 + return(-EFAULT); | |
1260 + } | |
1261 + return mga_vid_set_config(&mga_config); | |
1262 + break; | |
1263 + | |
1264 + case MGA_VID_ON: | |
1265 +#ifdef MP_DEBUG | |
1266 + printk(KERN_DEBUG "mga_vid: Video ON\n"); | |
1267 +#endif | |
1268 + vid_src_ready = 1; | |
1269 + if(vid_overlay_on) | |
1270 + { | |
1271 + regs.besctl |= 1; | |
1272 + mga_vid_write_regs(0); | |
1273 + } | |
1274 +#ifdef MGA_ALLOW_IRQ | |
1275 + if ( mga_irq != -1 ) enable_irq(); | |
1276 +#endif | |
1277 + mga_next_frame=0; | |
1278 + break; | |
1279 + | |
1280 + case MGA_VID_OFF: | |
1281 +#ifdef MP_DEBUG | |
1282 + printk(KERN_DEBUG "mga_vid: Video OFF (ioctl)\n"); | |
1283 +#endif | |
1284 + vid_src_ready = 0; | |
1285 +#ifdef MGA_ALLOW_IRQ | |
1286 + if ( mga_irq != -1 ) disable_irq(); | |
1287 +#endif | |
1288 + regs.besctl &= ~1; | |
1289 + regs.besglobctl &= ~(1<<6); // UYVY format selected | |
1290 + mga_vid_write_regs(0); | |
1291 + break; | |
1292 + | |
1293 + case MGA_VID_FSEL: | |
1294 + if(copy_from_user(&frame,(int *) arg,sizeof(int))) | |
1295 + { | |
1296 + printk(KERN_ERR "mga_vid: FSEL failed copy from userspace\n"); | |
1297 + return(-EFAULT); | |
1298 + } | |
1299 + | |
1300 + mga_vid_frame_sel(frame); | |
1301 + break; | |
1302 + | |
1303 + case MGA_VID_GET_LUMA: | |
1304 + tmp = regs.beslumactl - 0x80; | |
1305 + if (copy_to_user((uint32_t *) arg, &tmp, sizeof(uint32_t))) | |
1306 + { | |
1307 + printk(KERN_ERR "mga_vid: failed copy %p to userspace %p\n", | |
1308 + &tmp, (uint32_t *) arg); | |
1309 + return(-EFAULT); | |
1310 + } | |
1311 + break; | |
1312 + | |
1313 + case MGA_VID_SET_LUMA: | |
1314 + tmp = arg; | |
1315 + regs.beslumactl = tmp + 0x80; | |
1316 + mga_vid_write_regs(0); | |
1317 + break; | |
1318 + | |
1319 + default: | |
1320 + printk(KERN_ERR "mga_vid: Invalid ioctl\n"); | |
1321 + return (-EINVAL); | |
1322 + } | |
1323 + | |
1324 + return 0; | |
1325 +} | |
1326 + | |
1327 + | |
1328 +static int mga_vid_find_card(void) | |
1329 +{ | |
1330 + struct pci_dev *dev = NULL; | |
1331 + unsigned int card_option; | |
1332 + | |
1333 + if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, NULL))) | |
1334 + { | |
1335 + is_g400 = 1; | |
1336 + printk(KERN_INFO "mga_vid: Found MGA G550\n"); | |
1337 + } | |
1338 + else if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, NULL))) | |
1339 + { | |
1340 + is_g400 = 1; | |
1341 + printk(KERN_INFO "mga_vid: Found MGA G400/G450\n"); | |
1342 + } | |
1343 + else if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, NULL))) | |
1344 + { | |
1345 + is_g400 = 0; | |
1346 + printk(KERN_INFO "mga_vid: Found MGA G200 AGP\n"); | |
1347 + } | |
1348 + else if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, NULL))) | |
1349 + { | |
1350 + is_g400 = 0; | |
1351 + printk(KERN_INFO "mga_vid: Found MGA G200 PCI\n"); | |
1352 + } | |
1353 + else | |
1354 + { | |
1355 + printk(KERN_ERR "mga_vid: No supported cards found\n"); | |
1356 + return FALSE; | |
1357 + } | |
1358 + | |
1359 + pci_dev = dev; | |
1360 + | |
1361 + mga_irq = pci_dev->irq; | |
1362 + | |
1363 +#if LINUX_VERSION_CODE >= 0x020300 | |
1364 + mga_mmio_base = ioremap_nocache(dev->resource[1].start,0x4000); | |
1365 + mga_mem_base = dev->resource[0].start; | |
1366 +#else | |
1367 + mga_mmio_base = ioremap_nocache(dev->base_address[1] & PCI_BASE_ADDRESS_MEM_MASK,0x4000); | |
1368 + mga_mem_base = dev->base_address[0] & PCI_BASE_ADDRESS_MEM_MASK; | |
1369 +#endif | |
1370 + printk(KERN_INFO "mga_vid: MMIO at 0x%p IRQ: %d framebuffer: 0x%08X\n", mga_mmio_base, mga_irq, mga_mem_base); | |
1371 + | |
1372 + pci_read_config_dword(dev, 0x40, &card_option); | |
1373 + printk(KERN_INFO "mga_vid: OPTION word: 0x%08X mem: 0x%02X %s\n", card_option, | |
1374 + (card_option>>10)&0x17, ((card_option>>14)&1)?"SGRAM":"SDRAM"); | |
1375 + | |
1376 +// temp = (card_option >> 10) & 0x17; | |
1377 + | |
1378 + if (mga_ram_size) { | |
1379 + printk(KERN_INFO "mga_vid: RAMSIZE forced to %d MB\n", mga_ram_size); | |
1380 + } else { | |
1381 + | |
1382 +#ifdef MGA_MEMORY_SIZE | |
1383 + mga_ram_size = MGA_MEMORY_SIZE; | |
1384 + printk(KERN_INFO "mga_vid: hard-coded RAMSIZE is %d MB\n", (unsigned int) mga_ram_size); | |
1385 + | |
1386 +#else | |
1387 + | |
1388 + if (is_g400){ | |
1389 + switch((card_option>>10)&0x17){ | |
1390 + // SDRAM: | |
1391 + case 0x00: | |
1392 + case 0x04: mga_ram_size = 16; break; | |
1393 + case 0x03: | |
1394 + case 0x05: mga_ram_size = 32; break; | |
1395 + // SGRAM: | |
1396 + case 0x10: | |
1397 + case 0x14: mga_ram_size = 32; break; | |
1398 + case 0x11: | |
1399 + case 0x12: mga_ram_size = 16; break; | |
1400 + default: | |
1401 + mga_ram_size = 16; | |
1402 + printk(KERN_INFO "mga_vid: Couldn't detect RAMSIZE, assuming 16MB!"); | |
1403 + } | |
1404 + }else{ | |
1405 + switch((card_option>>10)&0x17){ | |
1406 +// case 0x10: | |
1407 +// case 0x13: mga_ram_size = 8; break; | |
1408 + default: mga_ram_size = 8; | |
1409 + } | |
1410 + } | |
1411 +#if 0 | |
1412 +// printk("List resources -----------\n"); | |
1413 + for(temp=0;temp<DEVICE_COUNT_RESOURCE;temp++){ | |
1414 + struct resource *res=&pci_dev->resource[temp]; | |
1415 + if(res->flags){ | |
1416 + int size=(1+res->end-res->start)>>20; | |
1417 + printk(KERN_DEBUG "res %d: start: 0x%X end: 0x%X (%d MB) flags=0x%X\n",temp,res->start,res->end,size,res->flags); | |
1418 + if(res->flags&(IORESOURCE_MEM|IORESOURCE_PREFETCH)){ | |
1419 + if(size>mga_ram_size && size<=64) mga_ram_size=size; | |
1420 + } | |
1421 + } | |
1422 + } | |
1423 +#endif | |
1424 + printk(KERN_INFO "mga_vid: detected RAMSIZE is %d MB\n", (unsigned int) mga_ram_size); | |
1425 +#endif | |
1426 + } | |
1427 + | |
1428 + | |
1429 +#ifdef MGA_ALLOW_IRQ | |
1430 + if ( mga_irq != -1 ) { | |
1431 + int tmp = request_irq(mga_irq, mga_handle_irq, SA_INTERRUPT | SA_SHIRQ, "Syncfb Time Base", &mga_irq); | |
1432 + if ( tmp ) { | |
1433 + printk(KERN_INFO "syncfb (mga): cannot register irq %d (Err: %d)\n", mga_irq, tmp); | |
1434 + mga_irq=-1; | |
1435 + } else { | |
1436 + printk(KERN_DEBUG "syncfb (mga): registered irq %d\n", mga_irq); | |
1437 + } | |
1438 + } else { | |
1439 + printk(KERN_INFO "syncfb (mga): No valid irq was found\n"); | |
1440 + mga_irq=-1; | |
1441 + } | |
1442 +#else | |
1443 + printk(KERN_INFO "syncfb (mga): IRQ disabled in mga_vid.c\n"); | |
1444 + mga_irq=-1; | |
1445 +#endif | |
1446 + | |
1447 + return TRUE; | |
1448 +} | |
1449 + | |
1450 +static void mga_param_buff_fill( void ) | |
1451 +{ | |
1452 + unsigned len; | |
1453 + len = 0; | |
1454 + len += sprintf(&mga_param_buff[len],"Interface version: %04X\n",MGA_VID_VERSION); | |
1455 + len += sprintf(&mga_param_buff[len],"Memory: %x:%dM\n",mga_mem_base,(unsigned int) mga_ram_size); | |
1456 + len += sprintf(&mga_param_buff[len],"MMIO: %p\n",mga_mmio_base); | |
1457 + len += sprintf(&mga_param_buff[len],"Configurable stuff:\n"); | |
1458 + len += sprintf(&mga_param_buff[len],"~~~~~~~~~~~~~~~~~~~\n"); | |
1459 + len += sprintf(&mga_param_buff[len],PARAM_BRIGHTNESS"%d\n",mga_brightness); | |
1460 + len += sprintf(&mga_param_buff[len],PARAM_CONTRAST"%d\n",mga_contrast); | |
1461 + len += sprintf(&mga_param_buff[len],PARAM_BLACKIE"%s\n",regs.blackie?"on":"off"); | |
1462 + mga_param_buff_len = len; | |
1463 + // check boundaries of mga_param_buff before writing to it!!! | |
1464 +} | |
1465 + | |
1466 + | |
1467 +static ssize_t mga_vid_read(struct file *file, char *buf, size_t count, loff_t *ppos) | |
1468 +{ | |
1469 + uint32_t size; | |
1470 + if(!mga_param_buff) return -ESPIPE; | |
1471 + if(!(*ppos)) mga_param_buff_fill(); | |
1472 + if(*ppos >= mga_param_buff_len) return 0; | |
1473 + size = min(count,mga_param_buff_len-(uint32_t)(*ppos)); | |
1474 + memcpy(buf,mga_param_buff,size); | |
1475 + *ppos += size; | |
1476 + return size; | |
1477 +} | |
1478 + | |
1479 +static ssize_t mga_vid_write(struct file *file, const char *buf, size_t count, loff_t *ppos) | |
1480 +{ | |
1481 + if(memcmp(buf,PARAM_BRIGHTNESS,min(count,strlen(PARAM_BRIGHTNESS))) == 0) | |
1482 + { | |
1483 + short brightness; | |
1484 + brightness=simple_strtol(&buf[strlen(PARAM_BRIGHTNESS)],NULL,10); | |
1485 + if (brightness>127 || brightness<-128) { brightness=0;} | |
1486 +// printk(KERN_DEBUG "mga_vid: brightness modified ( %d ) \n",brightness); | |
1487 + mga_brightness=brightness; | |
1488 + } else | |
1489 + if(memcmp(buf,PARAM_CONTRAST,min(count,strlen(PARAM_CONTRAST))) == 0) | |
1490 + { | |
1491 + short contrast; | |
1492 + contrast=simple_strtol(&buf[strlen(PARAM_CONTRAST)],NULL,10); | |
1493 + if (contrast>127 || contrast<-128) { contrast=0;} | |
1494 +// printk(KERN_DEBUG "mga_vid: contrast modified ( %d ) \n",contrast); | |
1495 + mga_contrast=contrast; | |
1496 + } else | |
1497 + | |
1498 + if(memcmp(buf,PARAM_BLACKIE,min(count,strlen(PARAM_BLACKIE))) == 0) | |
1499 + { | |
1500 + short blackie; | |
1501 + blackie=simple_strtol(&buf[strlen(PARAM_BLACKIE)],NULL,10); | |
1502 +// printk(KERN_DEBUG "mga_vid: shadow mode: ( %d ) \n",blackie); | |
1503 + regs.blackie=(blackie>0)?1:0; | |
1504 + } else count = -EIO; | |
1505 + // TODO: reset settings | |
1506 + return count; | |
1507 +} | |
1508 + | |
1509 +static int mga_vid_mmap(struct file *file, struct vm_area_struct *vma) | |
1510 +{ | |
1511 + | |
1512 +#ifdef MP_DEBUG | |
1513 + printk(KERN_DEBUG "mga_vid: mapping video memory into userspace\n"); | |
1514 +#endif | |
1515 + if(remap_page_range(vma->vm_start, mga_mem_base + mga_src_base, | |
1516 + vma->vm_end - vma->vm_start, vma->vm_page_prot)) | |
1517 + { | |
1518 + printk(KERN_ERR "mga_vid: error mapping video memory\n"); | |
1519 + return(-EAGAIN); | |
1520 + } | |
1521 + | |
1522 + return(0); | |
1523 +} | |
1524 + | |
1525 +static int mga_vid_release(struct inode *inode, struct file *file) | |
1526 +{ | |
1527 + //Close the window just in case | |
1528 +#ifdef MP_DEBUG | |
1529 + printk(KERN_DEBUG "mga_vid: Video OFF (release)\n"); | |
1530 +#endif | |
1531 + | |
1532 + vid_src_ready = 0; | |
1533 + regs.besctl &= ~1; | |
1534 + regs.besglobctl &= ~(1<<6); // UYVY format selected | |
1535 +// mga_config.colkey_on=0; //!!! | |
1536 + mga_vid_write_regs(1); | |
1537 + mga_vid_in_use = 0; | |
1538 + | |
1539 + MOD_DEC_USE_COUNT; | |
1540 + return 0; | |
1541 +} | |
1542 + | |
1543 +static long long mga_vid_lseek(struct file *file, long long offset, int origin) | |
1544 +{ | |
1545 + return -ESPIPE; | |
1546 +} | |
1547 + | |
1548 +static int mga_vid_open(struct inode *inode, struct file *file) | |
1549 +{ | |
1550 + int minor = MINOR(inode->i_rdev); | |
1551 + | |
1552 + if(minor != 0) | |
1553 + return(-ENXIO); | |
1554 + | |
1555 + if(mga_vid_in_use == 1) | |
1556 + return(-EBUSY); | |
1557 + | |
1558 + mga_vid_in_use = 1; | |
1559 + MOD_INC_USE_COUNT; | |
1560 + return(0); | |
1561 +} | |
1562 + | |
1563 +#if LINUX_VERSION_CODE >= 0x020400 | |
1564 +static struct file_operations mga_vid_fops = | |
1565 +{ | |
1566 + llseek: mga_vid_lseek, | |
1567 + read: mga_vid_read, | |
1568 + write: mga_vid_write, | |
1569 + ioctl: mga_vid_ioctl, | |
1570 + mmap: mga_vid_mmap, | |
1571 + open: mga_vid_open, | |
1572 + release: mga_vid_release | |
1573 +}; | |
1574 +#else | |
1575 +static struct file_operations mga_vid_fops = | |
1576 +{ | |
1577 + mga_vid_lseek, | |
1578 + mga_vid_read, | |
1579 + mga_vid_write, | |
1580 + NULL, | |
1581 + NULL, | |
1582 + mga_vid_ioctl, | |
1583 + mga_vid_mmap, | |
1584 + mga_vid_open, | |
1585 + NULL, | |
1586 + mga_vid_release | |
1587 +}; | |
1588 +#endif | |
1589 + | |
1590 + | |
1591 +/* | |
1592 + * Main Initialization Function | |
1593 + */ | |
1594 + | |
1595 +static int mga_vid_initialize(void) | |
1596 +{ | |
1597 + mga_vid_in_use = 0; | |
1598 + | |
1599 +// printk(KERN_INFO "Matrox MGA G200/G400 YUV Video interface v0.01 (c) Aaron Holtzman \n"); | |
1600 + printk(KERN_INFO "Matrox MGA G200/G400/G450/G550 YUV Video interface v2.01 (c) Aaron Holtzman & A'rpi\n"); | |
1601 + | |
1602 + if (mga_ram_size) { | |
1603 + if (mga_ram_size<4 || mga_ram_size>64) { | |
1604 + printk(KERN_ERR "mga_vid: invalid RAMSIZE: %d MB\n", mga_ram_size); | |
1605 + return -EINVAL; | |
1606 + } | |
1607 + } | |
1608 + | |
1609 + if(register_chrdev(MGA_VID_MAJOR, "mga_vid", &mga_vid_fops)) | |
1610 + { | |
1611 + printk(KERN_ERR "mga_vid: unable to get major: %d\n", MGA_VID_MAJOR); | |
1612 + return -EIO; | |
1613 + } | |
1614 + | |
1615 + if (!mga_vid_find_card()) | |
1616 + { | |
1617 + printk(KERN_ERR "mga_vid: no supported devices found\n"); | |
1618 + unregister_chrdev(MGA_VID_MAJOR, "mga_vid"); | |
1619 + return -EINVAL; | |
1620 + } | |
1621 + mga_param_buff = kmalloc(PARAM_BUFF_SIZE,GFP_KERNEL); | |
1622 + if(mga_param_buff) mga_param_buff_size = PARAM_BUFF_SIZE; | |
1623 + | |
1624 + return(0); | |
1625 +} | |
1626 + | |
1627 +int init_module(void) | |
1628 +{ | |
1629 + return mga_vid_initialize(); | |
1630 +} | |
1631 + | |
1632 +void cleanup_module(void) | |
1633 +{ | |
1634 + | |
1635 +#ifdef MGA_ALLOW_IRQ | |
1636 + if ( mga_irq != -1) | |
1637 + free_irq(mga_irq, &mga_irq); | |
1638 +#endif | |
1639 + | |
1640 + if(mga_mmio_base) | |
1641 + iounmap(mga_mmio_base); | |
1642 + if(mga_param_buff) | |
1643 + kfree(mga_param_buff); | |
1644 + | |
1645 + //FIXME turn off BES | |
1646 + printk(KERN_INFO "mga_vid: Cleaning up module\n"); | |
1647 + unregister_chrdev(MGA_VID_MAJOR, "mga_vid"); | |
1648 +} | |
1649 + | |
1650 diff -ruN linux.orig/drivers/video/matrox/mga_vid.h linux/drivers/video/matrox/mga_vid.h | |
1651 --- linux.orig/drivers/video/matrox/mga_vid.h Thu Jan 1 01:00:00 1970 | |
1652 +++ linux/drivers/video/matrox/mga_vid.h Mon Apr 15 01:04:11 2002 | |
1653 @@ -0,0 +1,58 @@ | |
1654 +/* | |
1655 + * | |
1656 + * mga_vid.h | |
1657 + * | |
1658 + * Copyright (C) 1999 Aaron Holtzman | |
1659 + * | |
1660 + * Matrox MGA G200/G400 YUV Video Interface module Version 0.1.0 | |
1661 + * | |
1662 + * BES == Back End Scaler | |
1663 + * | |
1664 + * This software has been released under the terms of the GNU Public | |
1665 + * license. See http://www.gnu.org/copyleft/gpl.html for details. | |
1666 + */ | |
1667 + | |
1668 +#ifndef __LINUX_MGAVID_H | |
1669 +#define __LINUX_MGAVID_H | |
1670 + | |
1671 +//#include <inttypes.h> | |
1672 + | |
1673 +typedef struct mga_vid_config_s | |
1674 +{ | |
1675 +uint16_t version; | |
1676 +uint16_t card_type; | |
1677 +uint32_t ram_size; | |
1678 +uint32_t src_width; | |
1679 +uint32_t src_height; | |
1680 +uint32_t dest_width; | |
1681 +uint32_t dest_height; | |
1682 +uint32_t x_org; | |
1683 +uint32_t y_org; | |
1684 +uint8_t colkey_on; | |
1685 +uint8_t colkey_red; | |
1686 +uint8_t colkey_green; | |
1687 +uint8_t colkey_blue; | |
1688 +uint32_t format; | |
1689 +uint32_t frame_size; | |
1690 +uint32_t num_frames; | |
1691 +} mga_vid_config_t; | |
1692 + | |
1693 +#define MGA_VID_FORMAT_YV12 0x32315659 | |
1694 +#define MGA_VID_FORMAT_IYUV (('I'<<24)|('Y'<<16)|('U'<<8)|'V') | |
1695 +#define MGA_VID_FORMAT_I420 (('I'<<24)|('4'<<16)|('2'<<8)|'0') | |
1696 +#define MGA_VID_FORMAT_YUY2 (('Y'<<24)|('U'<<16)|('Y'<<8)|'2') | |
1697 +#define MGA_VID_FORMAT_UYVY (('U'<<24)|('Y'<<16)|('V'<<8)|'Y') | |
1698 + | |
1699 +#define MGA_VID_CONFIG _IOR('J', 1, mga_vid_config_t) | |
1700 +#define MGA_VID_ON _IO ('J', 2) | |
1701 +#define MGA_VID_OFF _IO ('J', 3) | |
1702 +#define MGA_VID_FSEL _IOR('J', 4, int) | |
1703 +#define MGA_VID_GET_LUMA _IOR('J', 5, int) | |
1704 +#define MGA_VID_SET_LUMA _IOR('J', 6, int) | |
1705 + | |
1706 +#define MGA_G200 0x1234 | |
1707 +#define MGA_G400 0x5678 | |
1708 + | |
1709 +#define MGA_VID_VERSION 0x0201 | |
1710 + | |
1711 +#endif |