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comparison vidix/savage_vid.c @ 25370:6ca7e3c62a5a

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fix frame size calculation synchronized with vidix.sf.net r325
author ben
date Fri, 14 Dec 2007 18:36:08 +0000
parents 6f8d4937dd98
children 657c63d001ae
comparison
equal deleted inserted replaced
25369:6f8d4937dd98 25370:6ca7e3c62a5a
227 unsigned int src_w,src_h; 227 unsigned int src_w,src_h;
228 unsigned int drw_w,drw_h; /*scaled width && height*/ 228 unsigned int drw_w,drw_h; /*scaled width && height*/
229 unsigned int wx,wy; /*window x && y*/ 229 unsigned int wx,wy; /*window x && y*/
230 unsigned int screen_x; /*screen width*/ 230 unsigned int screen_x; /*screen width*/
231 unsigned int screen_y; /*screen height*/ 231 unsigned int screen_y; /*screen height*/
232 unsigned long buffer_size; /* size of the image buffer */ 232 unsigned long frame_size; /* frame size */
233 struct savage_chip chip; /* NV architecture structure */ 233 struct savage_chip chip; /* NV architecture structure */
234 void* video_base; /* virtual address of control region */ 234 void* video_base; /* virtual address of control region */
235 void* control_base; /* virtual address of fb region */ 235 void* control_base; /* virtual address of fb region */
236 unsigned long picture_base; /* direct pointer to video picture */ 236 unsigned long picture_base; /* direct pointer to video picture */
237 unsigned long picture_offset; /* offset of video picture in frame buffer */ 237 unsigned long picture_offset; /* offset of video picture in frame buffer */
238 // struct savage_dma dma; /* DMA structure */ 238 // struct savage_dma dma; /* DMA structure */
239 unsigned int cur_frame;
240 unsigned int num_frames; /* number of buffers */ 239 unsigned int num_frames; /* number of buffers */
241 int bps; /* bytes per line */ 240 int bps; /* bytes per line */
242 void (*SavageWaitIdle) (); 241 void (*SavageWaitIdle) ();
243 void (*SavageWaitFifo) (int space); 242 void (*SavageWaitFifo) (int space);
244 }; 243 };
859 info->control_base = map_phys_mem(pci_info.base0+SAVAGE_NEWMMIO_REGBASE_S4, SAVAGE_NEWMMIO_REGSIZE); 858 info->control_base = map_phys_mem(pci_info.base0+SAVAGE_NEWMMIO_REGBASE_S4, SAVAGE_NEWMMIO_REGSIZE);
860 } 859 }
861 860
862 // info->chip.PCIO = (uint8_t *) (info->control_base + SAVAGE_NEWMMIO_VGABASE); 861 // info->chip.PCIO = (uint8_t *) (info->control_base + SAVAGE_NEWMMIO_VGABASE);
863 862
864 // FIXME: enable mmio? 863 /* switch to vga registers */
865 val = VGAIN8 (0x3c3); 864 val = VGAIN8 (0x3c3);
866 VGAOUT8 (0x3c3, val | 0x01); 865 VGAOUT8 (0x3c3, val | 0x01);
867 val = VGAIN8 (0x3cc); 866 val = VGAIN8 (0x3cc);
868 VGAOUT8 (0x3c2, val | 0x01); 867 VGAOUT8 (0x3c2, val | 0x01);
869 868
1127 * -1 otherwise. 1126 * -1 otherwise.
1128 */ 1127 */
1129 static int 1128 static int
1130 savage_config_playback (vidix_playback_t * vinfo) 1129 savage_config_playback (vidix_playback_t * vinfo)
1131 { 1130 {
1132 unsigned int i; 1131 unsigned int i, bpp;
1133 1132
1134 if (!is_supported_fourcc (vinfo->fourcc)) 1133 if (!is_supported_fourcc (vinfo->fourcc))
1135 return -1; 1134 return -1;
1136 1135
1137 1136
1150 info->brightness = 0; 1149 info->brightness = 0;
1151 info->contrast = 128; 1150 info->contrast = 128;
1152 info->saturation = 128; 1151 info->saturation = 128;
1153 info->hue = 0; 1152 info->hue = 0;
1154 1153
1155
1156 vinfo->dga_addr=(void*)(info->picture_base);
1157
1158
1159 vinfo->offset.y = 0; 1154 vinfo->offset.y = 0;
1160 vinfo->offset.v = 0; 1155 vinfo->offset.v = 0;
1161 vinfo->offset.u = 0; 1156 vinfo->offset.u = 0;
1162 1157
1163 vinfo->dest.pitch.y = 32; 1158 vinfo->dest.pitch.y = 32;
1167 // vinfo->dest.pitch.v = 0; 1162 // vinfo->dest.pitch.v = 0;
1168 1163
1169 1164
1170 info->pitch = ((info->src_w << 1) + 15) & ~15; 1165 info->pitch = ((info->src_w << 1) + 15) & ~15;
1171 1166
1172 #if 0
1173 swap_uv = 0;
1174 switch (vinfo->fourcc) 1167 switch (vinfo->fourcc)
1175 { 1168 {
1176 case IMGFMT_YUY2: 1169 case IMGFMT_Y211:
1177 case IMGFMT_UYVY: 1170 bpp = 1;
1178 1171 break;
1179 info->pitch = ((info->src_w << 1) + (vinfo->dest.pitch.y-1)) & ~(vinfo->dest.pitch.y-1); 1172 case IMGFMT_BGR24:
1180 1173 bpp = 3;
1181 info->pitch = info->src_w << 1; 1174 break;
1182 info->pitch = ALIGN_TO (info->src_w << 1, 32); 1175 case IMGFMT_BGR32:
1183 uv_size = 0; 1176 bpp = 4;
1184 break; 1177 break;
1185 case IMGFMT_YV12: 1178 default:
1186 swap_uv = 1; 1179 bpp = 2;
1187 1180 break;
1188
1189
1190 /*
1191 srcPitch = (info->src_w + 3) & ~3;
1192 vinfo->offset.u = srcPitch * info->src_h;
1193 srcPitch2 = ((info->src_w >> 1) + 3) & ~3;
1194 vinfo->offset.v = (srcPitch2 * (info->src_h >> 1)) + vinfo->offset.v;
1195
1196 vinfo->dest.pitch.y=srcPitch ;
1197 vinfo->dest.pitch.v=srcPitch2 ;
1198 vinfo->dest.pitch.u=srcPitch2 ;
1199 */
1200
1201
1202 info->pitch = ALIGN_TO (info->src_w, 32);
1203 uv_size = (info->pitch >> 1) * (info->src_h >> 1);
1204
1205 vinfo->offset.y = 0;
1206 vinfo->offset.v = vinfo->offset.y + info->pitch * info->src_h;
1207 vinfo->offset.u = vinfo->offset.v + uv_size;
1208 vinfo->frame_size = vinfo->offset.u + uv_size;
1209 /* YOffs = info->offset.y;
1210 UOffs = (swap_uv ? vinfo->offset.v : vinfo->offset.u);
1211 VOffs = (swap_uv ? vinfo->offset.u : vinfo->offset.v);
1212 */
1213 // vinfo->offset.y = info->src_w;
1214 // vinfo->offset.v = vinfo->offset.y + info->src_w /2 * info->src_h;
1215 // vinfo->offset.u = vinfo->offset.v + (info->src_w >> 1) * (info->src_h >> 1) ;
1216
1217 break;
1218 } 1181 }
1219 #endif 1182
1220 info->pitch |= ((info->pitch >> 1) << 16); 1183 info->pitch = ((info->src_w * bpp) + 15) & ~15;
1221 1184 info->pitch |= ((info->pitch / bpp) << 16);
1222 vinfo->frame_size = info->pitch * info->src_h; 1185 printf("$#### destination pitch = %u\n", info->pitch & 0xffff);
1223 1186
1224 printf("$#### destination pitch = %u\n", info->pitch&0xffff); 1187 vinfo->frame_size = (info->pitch & 0xffff) * info->src_h;
1225 1188 info->frame_size = vinfo->frame_size;
1226 1189
1227 1190 info->picture_offset = info->screen_x * info->screen_y * (info->bpp >> 3);
1228 1191 if (info->picture_offset > (info->chip.fbsize - vinfo->frame_size)) {
1229 info->buffer_size = vinfo->frame_size; 1192 printf("not enough memory for overlay\n");
1230 info->num_frames = vinfo->num_frames= (info->chip.fbsize - info->picture_offset)/vinfo->frame_size; 1193 return -1;
1231 if(vinfo->num_frames > MAX_FRAMES)vinfo->num_frames = MAX_FRAMES; 1194 }
1232 // vinfo->num_frames = 1; 1195
1233 // printf("[nvidia_vid] Number of frames %i\n",vinfo->num_frames); 1196 if (info->chip.arch == S3_SAVAGE3D)
1234 for(i=0;i <vinfo->num_frames;i++)vinfo->offsets[i] = vinfo->frame_size*i; 1197 info->video_base = map_phys_mem(pci_info.base0, info->chip.fbsize);
1235 1198 else
1199 info->video_base = map_phys_mem(pci_info.base1, info->chip.fbsize);
1200
1201 if (info->video_base == NULL) {
1202 printf("errno = %s\n", strerror(errno));
1203 return -1;
1204 }
1205
1206 info->picture_base = (uint32_t) info->video_base + info->picture_offset;
1207 vinfo->dga_addr = (void*)(info->picture_base);
1208 vinfo->num_frames = (info->chip.fbsize - info->picture_offset)/vinfo->frame_size;
1209 if(vinfo->num_frames > VID_PLAY_MAXFRAMES) vinfo->num_frames = VID_PLAY_MAXFRAMES;
1210
1211 for(i = 0; i < vinfo->num_frames; i++)
1212 vinfo->offsets[i] = vinfo->frame_size * i;
1213
1236 return 0; 1214 return 0;
1237 } 1215 }
1238 1216
1239 /** 1217 /**
1240 * @brief Set playback on : driver should activate BES on this call. 1218 * @brief Set playback on : driver should activate BES on this call.