comparison vidix/drivers/radeon_vid.c @ 4414:7442f588cf48

More correct double_buffering for packed fourcc
author nick
date Wed, 30 Jan 2002 09:18:41 +0000
parents e0acaebf3c1b
children 30d17394db39
comparison
equal deleted inserted replaced
4413:e0acaebf3c1b 4414:7442f588cf48
952 besr.vid_buf2_base_adrs = tmp; 952 besr.vid_buf2_base_adrs = tmp;
953 tmp = config->offset.u; 953 tmp = config->offset.u;
954 config->offset.u = config->offset.v; 954 config->offset.u = config->offset.v;
955 config->offset.v = tmp; 955 config->offset.v = tmp;
956 } 956 }
957 besr.vid_buf3_base_adrs = besr.vid_buf0_base_adrs+config->frame_size;
958 besr.vid_buf4_base_adrs = besr.vid_buf1_base_adrs+config->frame_size;
959 besr.vid_buf5_base_adrs = besr.vid_buf2_base_adrs+config->frame_size;
957 } 960 }
958 else 961 else
959 { 962 {
960 besr.vid_buf0_base_adrs = radeon_overlay_off; 963 besr.vid_buf0_base_adrs = radeon_overlay_off;
961 config->offset.y = config->offset.u = config->offset.v = ((left & ~7) << 1)&VIF_BUF0_BASE_ADRS_MASK; 964 config->offset.y = config->offset.u = config->offset.v = ((left & ~7) << 1)&VIF_BUF0_BASE_ADRS_MASK;
962 besr.vid_buf0_base_adrs += config->offset.y; 965 besr.vid_buf0_base_adrs += config->offset.y;
963 besr.vid_buf1_base_adrs = besr.vid_buf0_base_adrs; 966 besr.vid_buf1_base_adrs = besr.vid_buf0_base_adrs+config->frame_size;
964 besr.vid_buf2_base_adrs = besr.vid_buf0_base_adrs; 967 besr.vid_buf2_base_adrs = besr.vid_buf0_base_adrs;
968 besr.vid_buf3_base_adrs = besr.vif_buf0_base_adrs+config->frame_size;
969 besr.vid_buf4_base_adrs = besr.vid_buf0_base_adrs;
970 besr.vid_buf5_base_adrs = besr.vid_buf0_base_adrs+config->frame_size;
965 } 971 }
966 config->offsets[0] = 0; 972 config->offsets[0] = 0;
967 config->offsets[1] = config->frame_size; 973 config->offsets[1] = config->frame_size;
968 besr.vid_buf3_base_adrs = besr.vid_buf0_base_adrs+config->frame_size;
969 besr.vid_buf4_base_adrs = besr.vid_buf1_base_adrs+config->frame_size;
970 besr.vid_buf5_base_adrs = besr.vid_buf2_base_adrs+config->frame_size;
971 974
972 tmp = (left & 0x0003ffff) + 0x00028000 + (h_inc << 3); 975 tmp = (left & 0x0003ffff) + 0x00028000 + (h_inc << 3);
973 besr.p1_h_accum_init = ((tmp << 4) & 0x000f8000) | 976 besr.p1_h_accum_init = ((tmp << 4) & 0x000f8000) |
974 ((tmp << 12) & 0xf0000000); 977 ((tmp << 12) & 0xf0000000);
975 978