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comparison vidix/drivers/nvidia_vid.c @ 11086:7f659e7b7ce1

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the yv12 image looked more like a yuy2 image ;)
author faust3
date Sun, 12 Oct 2003 12:55:38 +0000
parents 14aea5a85ba1
children 344052fdfc4a
comparison
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11085:14aea5a85ba1 11086:7f659e7b7ce1
3 Copyrights 2003 Sascha Sommer. This file is based on sources from 3 Copyrights 2003 Sascha Sommer. This file is based on sources from
4 RIVATV (rivatv.sf.net) 4 RIVATV (rivatv.sf.net)
5 Licence: GPL 5 Licence: GPL
6 WARNING: THIS DRIVER IS IN BETTA STAGE 6 WARNING: THIS DRIVER IS IN BETTA STAGE
7 7
8 multi buffer support, TNT2 fixes and experimental yv12 support by Dmitry Baryshkov 8 multi buffer support and TNT2 fixes by Dmitry Baryshkov
9 */ 9 */
10 10
11 11
12 #include <errno.h> 12 #include <errno.h>
13 #include <stdio.h> 13 #include <stdio.h>
224 void (* lock) (struct rivatv_chip *, int); 224 void (* lock) (struct rivatv_chip *, int);
225 }; 225 };
226 typedef struct rivatv_chip rivatv_chip; 226 typedef struct rivatv_chip rivatv_chip;
227 227
228 228
229 struct rivatv_info { 229 struct rivatv_info {
230 unsigned int use_colorkey;
230 unsigned int colorkey; /* saved xv colorkey*/ 231 unsigned int colorkey; /* saved xv colorkey*/
231 unsigned int vidixcolorkey; /*currently used colorkey*/ 232 unsigned int vidixcolorkey; /*currently used colorkey*/
232 unsigned int depth; 233 unsigned int depth;
233 unsigned int format; 234 unsigned int format;
234 unsigned int pitch; 235 unsigned int pitch;
369 /* NV_PVIDEO_STOP */ 370 /* NV_PVIDEO_STOP */
370 VID_OR32 (info->chip.PVIDEO, 0x704, 0x11); 371 VID_OR32 (info->chip.PVIDEO, 0x704, 0x11);
371 /* NV_PVIDEO_BUFFER */ 372 /* NV_PVIDEO_BUFFER */
372 VID_AND32 (info->chip.PVIDEO, 0x700, ~0x11); 373 VID_AND32 (info->chip.PVIDEO, 0x700, ~0x11);
373 /* NV_PVIDEO_INTR_EN_BUFFER */ 374 /* NV_PVIDEO_INTR_EN_BUFFER */
374 VID_AND32 (info->chip.PVIDEO, 0x140, ~0x11); 375 // VID_AND32 (info->chip.PVIDEO, 0x140, ~0x11);
375 break; 376 break;
376 case NV_ARCH_03: 377 case NV_ARCH_03:
377 case NV_ARCH_04: 378 case NV_ARCH_04:
378 /* NV_PVIDEO_KEY */ 379 /* NV_PVIDEO_KEY */
379 VID_WR32 (info->chip.PVIDEO, 0x240, info->colorkey); 380 VID_WR32 (info->chip.PVIDEO, 0x240, info->colorkey);
380 /* NV_PVIDEO_OVERLAY_VIDEO_OFF */ 381 /* NV_PVIDEO_OVERLAY_VIDEO_OFF */
381 VID_AND32 (info->chip.PVIDEO, 0x244, ~0x01); 382 VID_AND32 (info->chip.PVIDEO, 0x244, ~0x01);
382 /* NV_PVIDEO_INTR_EN_0_NOTIFY */ 383 /* NV_PVIDEO_INTR_EN_0_NOTIFY */
383 VID_AND32 (info->chip.PVIDEO, 0x140, ~0x01); 384 // VID_AND32 (info->chip.PVIDEO, 0x140, ~0x01);
384 /* NV_PVIDEO_OE_STATE */ 385 /* NV_PVIDEO_OE_STATE */
385 VID_WR32 (info->chip.PVIDEO, 0x224, 0); 386 VID_WR32 (info->chip.PVIDEO, 0x224, 0);
386 /* NV_PVIDEO_SU_STATE */ 387 /* NV_PVIDEO_SU_STATE */
387 VID_WR32 (info->chip.PVIDEO, 0x228, 0); 388 VID_WR32 (info->chip.PVIDEO, 0x228, 0);
388 /* NV_PVIDEO_RM_STATE */ 389 /* NV_PVIDEO_RM_STATE */
424 break; 425 break;
425 case 32: 426 case 32:
426 key = chromakey; 427 key = chromakey;
427 break; 428 break;
428 } 429 }
430 if(!info->use_colorkey)return;
429 switch (info->chip.arch) { 431 switch (info->chip.arch) {
430 case NV_ARCH_10: 432 case NV_ARCH_10:
431 case NV_ARCH_20: 433 case NV_ARCH_20:
432 case NV_ARCH_30: 434 case NV_ARCH_30:
433 VID_WR32 (info->chip.PVIDEO, 0xB00, key); 435 VID_WR32 (info->chip.PVIDEO, 0xB00, key);
471 473
472 474
473 /* Start overlay video. */ 475 /* Start overlay video. */
474 void rivatv_overlay_start (struct rivatv_info *info,int bufno){ 476 void rivatv_overlay_start (struct rivatv_info *info,int bufno){
475 uint32_t base, size, offset, xscale, yscale, pan; 477 uint32_t base, size, offset, xscale, yscale, pan;
478 uint32_t value;
476 int x=8, y=8; 479 int x=8, y=8;
477 int lwidth=info->d_width, lheight=info->d_height; 480 int lwidth=info->d_width, lheight=info->d_height;
478 int bps; 481 int bps;
479 482
480 size = info->buffer_size; 483 size = info->buffer_size;
554 /* NV_PVIDEO_SIZE_OUT */ 557 /* NV_PVIDEO_SIZE_OUT */
555 VID_WR32 (info->chip.PVIDEO, 0x950 + 0, (lheight << 16) | lwidth); 558 VID_WR32 (info->chip.PVIDEO, 0x950 + 0, (lheight << 16) | lwidth);
556 //VID_WR32 (info->chip.PVIDEO, 0x950 + 4, (height << 16) | width); 559 //VID_WR32 (info->chip.PVIDEO, 0x950 + 4, (height << 16) | width);
557 560
558 /* NV_PVIDEO_FORMAT */ 561 /* NV_PVIDEO_FORMAT */
559 VID_WR32 (info->chip.PVIDEO, 0x958 + 0, (info->pitch << 0) | 0x00100000|(((info->format==IMGFMT_YV12)?1:0))<<16); 562 value = info->pitch;
560 //VID_WR32 (info->chip.PVIDEO, 0x958 + 4, (pitch << 1) | 0x00100000); 563 if(info->use_colorkey)value |= 1 << 20;
564 if(info->format == IMGFMT_YUY2)value |= 1 << 16;
565 VID_WR32 (info->chip.PVIDEO, 0x958 + 0, value);
566 //VID_WR32 (info->chip.PVIDEO, 0x958 + 4, (pitch << 1) | 0x00100000);
561 567
562 /* NV_PVIDEO_INTR_EN_BUFFER */ 568 /* NV_PVIDEO_INTR_EN_BUFFER */
563 VID_OR32 (info->chip.PVIDEO, 0x140, 0x01/*0x11*/); 569 // VID_OR32 (info->chip.PVIDEO, 0x140, 0x01/*0x11*/);
564 /* NV_PVIDEO_STOP */ 570 /* NV_PVIDEO_STOP */
565 VID_AND32 (info->chip.PVIDEO, 0x704, 0xFFFFFFEE); 571 VID_WR32 (info->chip.PVIDEO, 0x704,0x0);
566 /* NV_PVIDEO_BUFFER */ 572 /* NV_PVIDEO_BUFFER */
567 VID_OR32 (info->chip.PVIDEO, 0x700, 0x01/*0x11*/); 573 VID_WR32 (info->chip.PVIDEO, 0x700, 0x01/*0x11*/);
568 break; 574 break;
569 575
570 case NV_ARCH_03: 576 case NV_ARCH_03:
571 case NV_ARCH_04: 577 case NV_ARCH_04:
572 578
604 VID_WR32 (info->chip.PVIDEO, 0x28C, 0x00000); /* No colour correction! */ 610 VID_WR32 (info->chip.PVIDEO, 0x28C, 0x00000); /* No colour correction! */
605 611
606 /* NV_PVIDEO_CONTROL_Y (BLUR_ON, LINE_HALF) */ 612 /* NV_PVIDEO_CONTROL_Y (BLUR_ON, LINE_HALF) */
607 VID_WR32 (info->chip.PVIDEO, 0x204, 0x001); 613 VID_WR32 (info->chip.PVIDEO, 0x204, 0x001);
608 /* NV_PVIDEO_CONTROL_X (WEIGHT_HEAVY, SHARPENING_ON, SMOOTHING_ON) */ 614 /* NV_PVIDEO_CONTROL_X (WEIGHT_HEAVY, SHARPENING_ON, SMOOTHING_ON) */
609 VID_WR32 (info->chip.PVIDEO, 0x208, 0x111); /*rivatv 0x110 */ 615 VID_WR32 (info->chip.PVIDEO, 0x208, 0x111); /*directx overlay 0x110 */
610 616
611 /* NV_PVIDEO_FIFO_BURST_LENGTH */ 617 /* NV_PVIDEO_FIFO_BURST_LENGTH */
612 VID_WR32 (info->chip.PVIDEO, 0x23C, 0x03); 618 VID_WR32 (info->chip.PVIDEO, 0x23C, 0x03);
613 /* NV_PVIDEO_FIFO_THRES_SIZE */ 619 /* NV_PVIDEO_FIFO_THRES_SIZE */
614 VID_WR32 (info->chip.PVIDEO, 0x238, 0x38); /*windows uses 0x40*/ 620 VID_WR32 (info->chip.PVIDEO, 0x238, 0x38); /*windows uses 0x40*/
615 621
616 /* NV_PVIDEO_BUFF0_OFFSET */ 622 /* NV_PVIDEO_BUFF0_OFFSET */
617 VID_WR32 (info->chip.PVIDEO, 0x21C + 0, 0); 623 VID_WR32 (info->chip.PVIDEO, 0x21C + 0, 0);
618 VID_WR32 (info->chip.PVIDEO, 0x21C + 4, 0); 624 VID_WR32 (info->chip.PVIDEO, 0x21C + 4, 0);
619 625
620
621
622
623 /* NV_PVIDEO_INTR_EN_0_NOTIFY_ENABLED */ 626 /* NV_PVIDEO_INTR_EN_0_NOTIFY_ENABLED */
624 // VID_OR32 (info->chip.PVIDEO, 0x140, 0x01); 627 // VID_OR32 (info->chip.PVIDEO, 0x140, 0x01);
628
625 /* NV_PVIDEO_OVERLAY (KEY_ON, VIDEO_ON, FORMAT_CCIR) */ 629 /* NV_PVIDEO_OVERLAY (KEY_ON, VIDEO_ON, FORMAT_CCIR) */
626 630 value = 0x1; /*video on*/
627 VID_WR32 (info->chip.PVIDEO, 0x244, (info->format==IMGFMT_YUY2)?0x111:0x011); 631 if(info->format==IMGFMT_YUY2)value |= 0x100;
632 if(info->use_colorkey)value |=0x10;
633 VID_WR32 (info->chip.PVIDEO, 0x244, value);
634
628 /* NV_PVIDEO_SU_STATE */ 635 /* NV_PVIDEO_SU_STATE */
629 VID_XOR32 (info->chip.PVIDEO, 0x228, 1 << 16); 636 VID_XOR32 (info->chip.PVIDEO, 0x228, 1 << 16);
630 break; 637 break;
631 } 638 }
632 /*set colorkey*/ 639 /*set colorkey*/
717 else printf("[nvidia_vid] video mode: %ux%u@%u\n",info->screen_x,info->screen_y, info->depth); 724 else printf("[nvidia_vid] video mode: %ux%u@%u\n",info->screen_x,info->screen_y, info->depth);
718 725
719 726
720 rivatv_enable_PMEDIA(info); 727 rivatv_enable_PMEDIA(info);
721 info->next_frame = 0; 728 info->next_frame = 0;
729 info->use_colorkey = 1;
722 return 0; 730 return 0;
723 } 731 }
724 732
725 void vixDestroy(void){ 733 void vixDestroy(void){
726 unmap_phys_mem(info->control_base ,0x00C00000 + 0x00008000); 734 unmap_phys_mem(info->control_base ,0x00C00000 + 0x00008000);
733 return 0; 741 return 0;
734 } 742 }
735 743
736 inline static int is_supported_fourcc(uint32_t fourcc) 744 inline static int is_supported_fourcc(uint32_t fourcc)
737 { 745 {
738 if (fourcc == IMGFMT_UYVY || 746 if (fourcc == IMGFMT_UYVY || fourcc == IMGFMT_YUY2)
739 (fourcc == IMGFMT_YUY2 && info->chip.arch <= NV_ARCH_04) ||
740 (fourcc == IMGFMT_YV12 && info->chip.arch >= NV_ARCH_10))
741 return 1; 747 return 1;
742 else 748 else
743 return 0; 749 return 0;
744 } 750 }
745 751
781 switch (vinfo->fourcc) 787 switch (vinfo->fourcc)
782 { 788 {
783 case IMGFMT_YUY2: 789 case IMGFMT_YUY2:
784 case IMGFMT_UYVY: 790 case IMGFMT_UYVY:
785 791
786 vinfo->dest.pitch.y = 2; 792 vinfo->dest.pitch.y = 16;
787 vinfo->dest.pitch.u = 0; 793 vinfo->dest.pitch.u = 0;
788 vinfo->dest.pitch.v = 0; 794 vinfo->dest.pitch.v = 0;
789 795
790 vinfo->offset.y = 0; 796 vinfo->offset.y = 0;
791 vinfo->offset.v = 0; 797 vinfo->offset.v = 0;