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comparison vidix/drivers/mga_vid.c @ 4238:9eada2812ed3

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i think, it's better [playback->offsets and offset implemented/corrected]
author alex
date Fri, 18 Jan 2002 15:37:52 +0000
parents 62a6135d090e
children acadddf56508
comparison
equal deleted inserted replaced
4237:1c9bca9154fd 4238:9eada2812ed3
599 // printf("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL)); 599 // printf("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL));
600 // printf("c2misc:0x%08x\n", readl(mga_mmio_base + C2MISC)); 600 // printf("c2misc:0x%08x\n", readl(mga_mmio_base + C2MISC));
601 #endif 601 #endif
602 } 602 }
603 603
604 #if 0
605 static int mga_vid_set_config(mga_vid_config_t *config)
606 {
607 int x, y, sw, sh, dw, dh;
608 int besleft, bestop, ifactor, ofsleft, ofstop, baseadrofs, weight, weights;
609 int frame_size=config->frame_size;
610 #ifdef CRTC2
611 #define right_margin 0
612 #define left_margin 18
613 #define hsync_len 46
614 #define lower_margin 10
615 #define vsync_len 4
616 #define upper_margin 39
617
618 unsigned int hdispend = (config->src_width + 31) & ~31;
619 unsigned int hsyncstart = hdispend + (right_margin & ~7);
620 unsigned int hsyncend = hsyncstart + (hsync_len & ~7);
621 unsigned int htotal = hsyncend + (left_margin & ~7);
622 unsigned int vdispend = config->src_height;
623 unsigned int vsyncstart = vdispend + lower_margin;
624 unsigned int vsyncend = vsyncstart + vsync_len;
625 unsigned int vtotal = vsyncend + upper_margin;
626 #endif
627 x = config->dest.x;
628 y = config->dest.y;
629 sw = config->src.width;
630 sh = config->src.height;
631 dw = config->dest.width;
632 dh = config->dest.height;
633
634 printf("[mga] Setting up a %dx%d+%d+%d video window (src %dx%d) format %X\n",
635 dw, dh, x, y, sw, sh, config->fourcc);
636
637 if((sw < 4) || (sh < 4) || (dw < 4) || (dh < 4))
638 {
639 printf("[mga] Invalid src/dest dimenstions\n");
640 return(EINVAL);
641 }
642
643 //FIXME check that window is valid and inside desktop
644
645 //FIXME figure out a better way to allocate memory on card
646 //allocate 2 megs
647 //mga_src_base = mga_mem_base + (MGA_VIDMEM_SIZE-2) * 0x100000;
648 //mga_src_base = (MGA_VIDMEM_SIZE-3) * 0x100000;
649
650 //Setup the BES registers for a three plane 4:2:0 video source
651
652 regs.besglobctl = 0;
653
654 switch(config->fourcc){
655 case IMGFMT_YV12:
656 case IMGFMT_I420:
657 case IMGFMT_IYUV:
658 regs.besctl = 1 // BES enabled
659 + (0<<6) // even start polarity
660 + (1<<10) // x filtering enabled
661 + (1<<11) // y filtering enabled
662 + (1<<16) // chroma upsampling
663 + (1<<17) // 4:2:0 mode
664 + (1<<18); // dither enabled
665 #if 0
666 if(is_g400)
667 {
668 //zoom disabled, zoom filter disabled, 420 3 plane format, proc amp
669 //disabled, rgb mode disabled
670 regs.besglobctl = (1<<5);
671 }
672 else
673 {
674 //zoom disabled, zoom filter disabled, Cb samples in 0246, Cr
675 //in 1357, BES register update on besvcnt
676 regs.besglobctl = 0;
677 }
678 #endif
679 break;
680
681 case IMGFMT_YUY2:
682 regs.besctl = 1 // BES enabled
683 + (0<<6) // even start polarity
684 + (1<<10) // x filtering enabled
685 + (1<<11) // y filtering enabled
686 + (1<<16) // chroma upsampling
687 + (0<<17) // 4:2:2 mode
688 + (1<<18); // dither enabled
689
690 regs.besglobctl = 0; // YUY2 format selected
691 break;
692
693 case IMGFMT_UYVY:
694 regs.besctl = 1 // BES enabled
695 + (0<<6) // even start polarity
696 + (1<<10) // x filtering enabled
697 + (1<<11) // y filtering enabled
698 + (1<<16) // chroma upsampling
699 + (0<<17) // 4:2:2 mode
700 + (1<<18); // dither enabled
701
702 regs.besglobctl = 1<<6; // UYVY format selected
703 break;
704
705 default:
706 printf("[mga] Unsupported pixel format: %x\n",config->fourcc);
707 return(ENOTSUP);
708 }
709
710
711 //Disable contrast and brightness control
712 regs.besglobctl |= (1<<5) + (1<<7);
713 regs.beslumactl = (0x7f << 16) + (0x80<<0);
714 regs.beslumactl = 0x80<<0;
715
716 //Setup destination window boundaries
717 besleft = x > 0 ? x : 0;
718 bestop = y > 0 ? y : 0;
719 regs.beshcoord = (besleft<<16) + (x + dw-1);
720 regs.besvcoord = (bestop<<16) + (y + dh-1);
721
722 //Setup source dimensions
723 regs.beshsrclst = (sw - 1) << 16;
724 regs.bespitch = (sw + 31) & ~31 ;
725
726 //Setup horizontal scaling
727 ifactor = ((sw-1)<<14)/(dw-1);
728 ofsleft = besleft - x;
729
730 regs.beshiscal = ifactor<<2;
731 regs.beshsrcst = (ofsleft*ifactor)<<2;
732 regs.beshsrcend = regs.beshsrcst + (((dw - ofsleft - 1) * ifactor) << 2);
733
734 //Setup vertical scaling
735 ifactor = ((sh-1)<<14)/(dh-1);
736 ofstop = bestop - y;
737
738 regs.besviscal = ifactor<<2;
739
740 baseadrofs = ((ofstop*regs.besviscal)>>16)*regs.bespitch;
741 //frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2;
742 regs.besa1org = (uint32_t) mga_src_base + baseadrofs;
743 regs.besa2org = (uint32_t) mga_src_base + baseadrofs + 1*frame_size;
744 regs.besb1org = (uint32_t) mga_src_base + baseadrofs + 2*frame_size;
745 regs.besb2org = (uint32_t) mga_src_base + baseadrofs + 3*frame_size;
746
747 if(config->format==MGA_VID_FORMAT_YV12
748 ||config->format==MGA_VID_FORMAT_IYUV
749 ||config->format==MGA_VID_FORMAT_I420
750 ){
751 // planar YUV frames:
752 if (is_g400)
753 baseadrofs = (((ofstop*regs.besviscal)/4)>>16)*regs.bespitch;
754 else
755 baseadrofs = (((ofstop*regs.besviscal)/2)>>16)*regs.bespitch;
756
757 if(config->format==MGA_VID_FORMAT_YV12){
758 regs.besa1corg = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ;
759 regs.besa2corg = (uint32_t) mga_src_base + baseadrofs + 1*frame_size + regs.bespitch * sh;
760 regs.besb1corg = (uint32_t) mga_src_base + baseadrofs + 2*frame_size + regs.bespitch * sh;
761 regs.besb2corg = (uint32_t) mga_src_base + baseadrofs + 3*frame_size + regs.bespitch * sh;
762 regs.besa1c3org = regs.besa1corg + ((regs.bespitch * sh) / 4);
763 regs.besa2c3org = regs.besa2corg + ((regs.bespitch * sh) / 4);
764 regs.besb1c3org = regs.besb1corg + ((regs.bespitch * sh) / 4);
765 regs.besb2c3org = regs.besb2corg + ((regs.bespitch * sh) / 4);
766 } else {
767 regs.besa1c3org = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ;
768 regs.besa2c3org = (uint32_t) mga_src_base + baseadrofs + 1*frame_size + regs.bespitch * sh;
769 regs.besb1c3org = (uint32_t) mga_src_base + baseadrofs + 2*frame_size + regs.bespitch * sh;
770 regs.besb2c3org = (uint32_t) mga_src_base + baseadrofs + 3*frame_size + regs.bespitch * sh;
771 regs.besa1corg = regs.besa1c3org + ((regs.bespitch * sh) / 4);
772 regs.besa2corg = regs.besa2c3org + ((regs.bespitch * sh) / 4);
773 regs.besb1corg = regs.besb1c3org + ((regs.bespitch * sh) / 4);
774 regs.besb2corg = regs.besb2c3org + ((regs.bespitch * sh) / 4);
775 }
776
777 }
778
779 weight = ofstop * (regs.besviscal >> 2);
780 weights = weight < 0 ? 1 : 0;
781 regs.besv2wght = regs.besv1wght = (weights << 16) + ((weight & 0x3FFF) << 2);
782 regs.besv2srclst = regs.besv1srclst = sh - 1 - (((ofstop * regs.besviscal) >> 16) & 0x03FF);
783
784 #ifdef CRTC2
785 // pridat hlavni registry - tj. casovani ...
786
787
788 switch(config->format){
789 case MGA_VID_FORMAT_YV12:
790 case MGA_VID_FORMAT_I420:
791 case MGA_VID_FORMAT_IYUV:
792 cregs.c2ctl = 1 // CRTC2 enabled
793 + (1<<1) // external clock
794 + (0<<2) // external clock
795 + (1<<3) // pixel clock enable - not needed ???
796 + (0<<4) // high prioryty req
797 + (1<<5) // high prioryty req
798 + (0<<6) // high prioryty req
799 + (1<<8) // high prioryty req max
800 + (0<<9) // high prioryty req max
801 + (0<<10) // high prioryty req max
802 + (0<<20) // CRTC1 to DAC
803 + (1<<21) // 420 mode
804 + (1<<22) // 420 mode
805 + (1<<23) // 420 mode
806 + (0<<24) // single chroma line for 420 mode - need to be corrected
807 + (0<<25) /*/ interlace mode - need to be corrected*/
808 + (0<<26) // field legth polariry
809 + (0<<27) // field identification polariry
810 + (1<<28) // VIDRST detection mode
811 + (0<<29) // VIDRST detection mode
812 + (1<<30) // Horizontal counter preload
813 + (1<<31) // Vertical counter preload
814 ;
815 cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode
816 + (1<<1) // Y filter enable
817 + (1<<2) // CbCr filter enable
818 + (0<<3) // subpicture enable (disabled)
819 + (0<<4) // NTSC enable (disabled - PAL)
820 + (0<<5) // C2 static subpicture enable (disabled)
821 + (0<<6) // C2 subpicture offset division (disabled)
822 + (0<<7) // 422 subformat selection !
823 /* + (0<<8) // 15 bpp high alpha
824 + (0<<9) // 15 bpp high alpha
825 + (0<<10) // 15 bpp high alpha
826 + (0<<11) // 15 bpp high alpha
827 + (0<<12) // 15 bpp high alpha
828 + (0<<13) // 15 bpp high alpha
829 + (0<<14) // 15 bpp high alpha
830 + (0<<15) // 15 bpp high alpha
831 + (0<<16) // 15 bpp low alpha
832 + (0<<17) // 15 bpp low alpha
833 + (0<<18) // 15 bpp low alpha
834 + (0<<19) // 15 bpp low alpha
835 + (0<<20) // 15 bpp low alpha
836 + (0<<21) // 15 bpp low alpha
837 + (0<<22) // 15 bpp low alpha
838 + (0<<23) // 15 bpp low alpha
839 + (0<<24) // static subpicture key
840 + (0<<25) // static subpicture key
841 + (0<<26) // static subpicture key
842 + (0<<27) // static subpicture key
843 + (0<<28) // static subpicture key
844 */ ;
845 break;
846
847 case MGA_VID_FORMAT_YUY2:
848 cregs.c2ctl = 1 // CRTC2 enabled
849 + (1<<1) // external clock
850 + (0<<2) // external clock
851 + (1<<3) // pixel clock enable - not needed ???
852 + (0<<4) // high prioryty req - acc to spec
853 + (1<<5) // high prioryty req
854 + (0<<6) // high prioryty req
855 // 7 reserved
856 + (1<<8) // high prioryty req max
857 + (0<<9) // high prioryty req max
858 + (0<<10) // high prioryty req max
859 // 11-19 reserved
860 + (0<<20) // CRTC1 to DAC
861 + (1<<21) // 422 mode
862 + (0<<22) // 422 mode
863 + (1<<23) // 422 mode
864 + (0<<24) // single chroma line for 420 mode - need to be corrected
865 + (0<<25) /*/ interlace mode - need to be corrected*/
866 + (0<<26) // field legth polariry
867 + (0<<27) // field identification polariry
868 + (1<<28) // VIDRST detection mode
869 + (0<<29) // VIDRST detection mode
870 + (1<<30) // Horizontal counter preload
871 + (1<<31) // Vertical counter preload
872 ;
873 cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode
874 + (1<<1) // Y filter enable
875 + (1<<2) // CbCr filter enable
876 + (0<<3) // subpicture enable (disabled)
877 + (0<<4) // NTSC enable (disabled - PAL)
878 + (0<<5) // C2 static subpicture enable (disabled)
879 + (0<<6) // C2 subpicture offset division (disabled)
880 + (0<<7) // 422 subformat selection !
881 /* + (0<<8) // 15 bpp high alpha
882 + (0<<9) // 15 bpp high alpha
883 + (0<<10) // 15 bpp high alpha
884 + (0<<11) // 15 bpp high alpha
885 + (0<<12) // 15 bpp high alpha
886 + (0<<13) // 15 bpp high alpha
887 + (0<<14) // 15 bpp high alpha
888 + (0<<15) // 15 bpp high alpha
889 + (0<<16) // 15 bpp low alpha
890 + (0<<17) // 15 bpp low alpha
891 + (0<<18) // 15 bpp low alpha
892 + (0<<19) // 15 bpp low alpha
893 + (0<<20) // 15 bpp low alpha
894 + (0<<21) // 15 bpp low alpha
895 + (0<<22) // 15 bpp low alpha
896 + (0<<23) // 15 bpp low alpha
897 + (0<<24) // static subpicture key
898 + (0<<25) // static subpicture key
899 + (0<<26) // static subpicture key
900 + (0<<27) // static subpicture key
901 + (0<<28) // static subpicture key
902 */ ;
903 break;
904
905 case MGA_VID_FORMAT_UYVY:
906 cregs.c2ctl = 1 // CRTC2 enabled
907 + (1<<1) // external clock
908 + (0<<2) // external clock
909 + (1<<3) // pixel clock enable - not needed ???
910 + (0<<4) // high prioryty req
911 + (1<<5) // high prioryty req
912 + (0<<6) // high prioryty req
913 + (1<<8) // high prioryty req max
914 + (0<<9) // high prioryty req max
915 + (0<<10) // high prioryty req max
916 + (0<<20) // CRTC1 to DAC
917 + (1<<21) // 422 mode
918 + (0<<22) // 422 mode
919 + (1<<23) // 422 mode
920 + (1<<24) // single chroma line for 420 mode - need to be corrected
921 + (1<<25) /*/ interlace mode - need to be corrected*/
922 + (0<<26) // field legth polariry
923 + (0<<27) // field identification polariry
924 + (1<<28) // VIDRST detection mode
925 + (0<<29) // VIDRST detection mode
926 + (1<<30) // Horizontal counter preload
927 + (1<<31) // Vertical counter preload
928 ;
929 cregs.c2datactl = 0 // enable dither - propably not needed, we are already in YUV mode
930 + (1<<1) // Y filter enable
931 + (1<<2) // CbCr filter enable
932 + (0<<3) // subpicture enable (disabled)
933 + (0<<4) // NTSC enable (disabled - PAL)
934 + (0<<5) // C2 static subpicture enable (disabled)
935 + (0<<6) // C2 subpicture offset division (disabled)
936 + (1<<7) // 422 subformat selection !
937 /* + (0<<8) // 15 bpp high alpha
938 + (0<<9) // 15 bpp high alpha
939 + (0<<10) // 15 bpp high alpha
940 + (0<<11) // 15 bpp high alpha
941 + (0<<12) // 15 bpp high alpha
942 + (0<<13) // 15 bpp high alpha
943 + (0<<14) // 15 bpp high alpha
944 + (0<<15) // 15 bpp high alpha
945 + (0<<16) // 15 bpp low alpha
946 + (0<<17) // 15 bpp low alpha
947 + (0<<18) // 15 bpp low alpha
948 + (0<<19) // 15 bpp low alpha
949 + (0<<20) // 15 bpp low alpha
950 + (0<<21) // 15 bpp low alpha
951 + (0<<22) // 15 bpp low alpha
952 + (0<<23) // 15 bpp low alpha
953 + (0<<24) // static subpicture key
954 + (0<<25) // static subpicture key
955 + (0<<26) // static subpicture key
956 + (0<<27) // static subpicture key
957 + (0<<28) // static subpicture key
958 */ ;
959 break;
960
961 default:
962 printf("[mga] Unsupported pixel format: 0x%X\n",config->format);
963 return -1;
964 }
965
966 cregs.c2hparam=((hdispend - 8) << 16) | (htotal - 8);
967 cregs.c2hsync=((hsyncend - 8) << 16) | (hsyncstart - 8);
968
969 cregs.c2misc=0 // CRTCV2 656 togg f0
970 +(0<<1) // CRTCV2 656 togg f0
971 +(0<<2) // CRTCV2 656 togg f0
972 +(0<<4) // CRTCV2 656 togg f1
973 +(0<<5) // CRTCV2 656 togg f1
974 +(0<<6) // CRTCV2 656 togg f1
975 +(0<<8) // Hsync active high
976 +(0<<9) // Vsync active high
977 // 16-27 c2vlinecomp - nevim co tam dat
978 ;
979 cregs.c2offset=(regs.bespitch << 1);
980
981 cregs.c2pl2startadd0=regs.besa1corg;
982 // cregs.c2pl2startadd1=regs.besa2corg;
983 cregs.c2pl3startadd0=regs.besa1c3org;
984 // cregs.c2pl3startadd1=regs.besa2c3org;
985
986 cregs.c2preload=(vsyncstart << 16) | (hsyncstart); // from
987
988 cregs.c2spicstartadd0=0; // not used
989 // cregs.c2spicstartadd1=0; // not used
990
991 cregs.c2startadd0=regs.besa1org;
992 // cregs.c2startadd1=regs.besa2org;
993
994 cregs.c2subpiclut=0; //not used
995
996 cregs.c2vparam=((vdispend - 1) << 16) | (vtotal - 1);
997 cregs.c2vsync=((vsyncend - 1) << 16) | (vsyncstart - 1);
998
999
1000 #endif
1001
1002 mga_vid_write_regs(0);
1003 return 0;
1004 }
1005 #endif
1006
1007 #ifdef MGA_ALLOW_IRQ 604 #ifdef MGA_ALLOW_IRQ
1008 605
1009 static void enable_irq(){ 606 static void enable_irq(){
1010 long int cc; 607 long int cc;
1011 608
1153 { 750 {
1154 printf("[mga] illegal num_frames: %d, setting to 2\n", config->num_frames); 751 printf("[mga] illegal num_frames: %d, setting to 2\n", config->num_frames);
1155 config->num_frames = 2; 752 config->num_frames = 2;
1156 // return(EINVAL); 753 // return(EINVAL);
1157 } 754 }
755
756 config->num_frames = 2; /* let it be for now */
1158 757
1159 x = config->dest.x; 758 x = config->dest.x;
1160 y = config->dest.y; 759 y = config->dest.y;
1161 sw = config->src.w; 760 sw = config->src.w;
1162 sh = config->src.h; 761 sh = config->src.h;
1197 796
1198 // config->frame_size = config->src.h*config->src.w+(config->src.w*config->src.h)/2; 797 // config->frame_size = config->src.h*config->src.w+(config->src.w*config->src.h)/2;
1199 798
1200 frame_size = config->frame_size; 799 frame_size = config->frame_size;
1201 800
801 config->offsets[0] = 0;
802 config->offsets[1] = config->frame_size; /* ?? */
803
1202 config->offset.y=0; 804 config->offset.y=0;
1203 config->offset.v=((sw + 31) & ~31) * sh; 805 config->offset.v=((sw + 31) & ~31) * sh;
1204 config->offset.u=config->offset.v+((sw + 31) & ~31) * sh /4; 806 config->offset.u=config->offset.v+((sw + 31) & ~31) * sh /4;
1205 807
1206 mga_src_base = (mga_ram_size*0x100000-config->num_frames*config->frame_size); 808 mga_src_base = (mga_ram_size*0x100000-config->num_frames*config->frame_size);
1211 } 813 }
1212 mga_src_base &= (~0xFFFF); /* 64k boundary */ 814 mga_src_base &= (~0xFFFF); /* 64k boundary */
1213 printf("[mga] YUV buffer base: %p\n", mga_src_base); 815 printf("[mga] YUV buffer base: %p\n", mga_src_base);
1214 816
1215 config->dga_addr = mga_mem_base + mga_src_base; 817 config->dga_addr = mga_mem_base + mga_src_base;
818
819 // config->offset.y = config->dga_addr;
820 // config->offset.u = config->offset.y+config->frame_size;
821 // config->offset.v = config->offset.u+2*config->frame_size;
1216 822
1217 if (is_g400) 823 if (is_g400)
1218 mga_config.card_type = MGA_G400; 824 mga_config.card_type = MGA_G400;
1219 else 825 else
1220 mga_config.card_type = MGA_G200; 826 mga_config.card_type = MGA_G200;
1728 #warning "FIXME: implement pciconfig_read! (or enable syscall)\n" 1334 #warning "FIXME: implement pciconfig_read! (or enable syscall)\n"
1729 #if 0 1335 #if 0
1730 /* from linux/pci.h */ 1336 /* from linux/pci.h */
1731 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 1337 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
1732 1338
1733 pciconfig_read(pci_info.bus, PCI_DEVFN(pci_info.card, pci_info.func), 1339 pci_config_read(pci_info.bus, PCI_DEVFN(pci_info.card, pci_info.func),
1734 0x40, 4, &card_option); 1340 0x40, 4, &card_option);
1735 // pci_read_config_dword(dev, 0x40, &card_option); 1341 // pci_read_config_dword(dev, 0x40, &card_option);
1736 printf("[mga] OPTION word: 0x%08X mem: 0x%02X %s\n", card_option, 1342 printf("[mga] OPTION word: 0x%08X mem: 0x%02X %s\n", card_option,
1737 (card_option>>10)&0x17, ((card_option>>14)&1)?"SGRAM":"SDRAM"); 1343 (card_option>>10)&0x17, ((card_option>>14)&1)?"SGRAM":"SDRAM");
1738 #endif 1344 #endif