Mercurial > mplayer.hg
comparison vidix/drivers/unichrome_vid.c @ 13605:c971585ddcab
CLE266 Vidix driver initial patch by Timothy Lee <timothy@siriushk.com>, doxygen comments by Benjamin Zores <ben@tutuxclan.org>
author | faust3 |
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date | Sun, 10 Oct 2004 19:22:38 +0000 |
parents | |
children | be030b3627a1 |
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1 /* | |
2 Driver for VIA CLE266 Unichrome - Version 0.1.0 | |
3 | |
4 Copyright (C) 2004 by Timothy Lee | |
5 | |
6 Based on Cyberblade/i driver by Alastair M. Robison. | |
7 | |
8 Thanks to Gilles Frattini for bugfixes | |
9 | |
10 This program is free software; you can redistribute it and/or modify | |
11 it under the terms of the GNU General Public License as published by | |
12 the Free Software Foundation; either version 2 of the License, or | |
13 (at your option) any later version. | |
14 | |
15 This program is distributed in the hope that it will be useful, | |
16 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 GNU General Public License for more details. | |
19 | |
20 You should have received a copy of the GNU General Public License | |
21 along with this program; if not, write to the Free Software | |
22 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
23 | |
24 Changes: | |
25 2004-03-10 | |
26 Initial version | |
27 2004-10-09 | |
28 Added Doxygen documentation (Benjamin Zores <ben@geexbox.org>) | |
29 | |
30 To Do: | |
31 */ | |
32 | |
33 #include <errno.h> | |
34 #include <stdio.h> | |
35 #include <stdlib.h> | |
36 #include <string.h> | |
37 #include <inttypes.h> | |
38 #include <unistd.h> | |
39 | |
40 #include "../vidix.h" | |
41 #include "../fourcc.h" | |
42 #include "../../libdha/libdha.h" | |
43 #include "../../libdha/pci_ids.h" | |
44 #include "../../libdha/pci_names.h" | |
45 #include "../../config.h" | |
46 | |
47 #include "unichrome_regs.h" | |
48 | |
49 /** | |
50 * @brief Information on PCI device. | |
51 */ | |
52 pciinfo_t pci_info; | |
53 | |
54 /** | |
55 * @brief Unichrome driver colorkey settings. | |
56 */ | |
57 static vidix_grkey_t uc_grkey; | |
58 | |
59 static int frames[VID_PLAY_MAXFRAMES]; | |
60 uint8_t *vio; | |
61 uint8_t *uc_mem; | |
62 uint8_t mclk_save[3]; | |
63 | |
64 #define VIA_OUT(hwregs, reg, val) *(volatile uint32_t *)((hwregs) + (reg)) = (val) | |
65 #define VIA_IN(hwregs, reg) *(volatile uint32_t *)((hwregs) + (reg)) | |
66 #define VGA_OUT8(hwregs, reg, val) *(volatile uint8_t *)((hwregs) + (reg) + 0x8000) = (val) | |
67 #define VGA_IN8(hwregs, reg) *(volatile uint8_t *)((hwregs) + (reg) + 0x8000) | |
68 #define VIDEO_OUT(hwregs, reg, val) VIA_OUT((hwregs)+0x200, reg, val) | |
69 #define VIDEO_IN(hwregs, reg) VIA_IN((hwregs)+0x200, reg) | |
70 | |
71 #define outb(val,reg) OUTPORT8(reg,val) | |
72 #define inb(reg) INPORT8(reg) | |
73 | |
74 #define ALIGN_TO(v, n) (((v) + (n-1)) & ~(n-1)) | |
75 #define UC_MAP_V1_FIFO_CONTROL(depth, pre_thr, thr) \ | |
76 (((depth)-1) | ((thr) << 8) | ((pre_thr) << 24)) | |
77 | |
78 #define FRAMEBUFFER_START 0x600000 | |
79 #define FRAMEBUFFER_SIZE 0x200000 | |
80 | |
81 #ifdef DEBUG_LOGFILE | |
82 FILE *logfile = 0; | |
83 #define LOGWRITE(x) {if(logfile) fprintf(logfile,x);} | |
84 #else | |
85 #define LOGWRITE(x) | |
86 #endif | |
87 | |
88 /** | |
89 * @brief Unichrome driver vidix capabilities. | |
90 */ | |
91 static vidix_capability_t uc_cap = { | |
92 "VIA CLE266 Unichrome driver", | |
93 "Timothy Lee <timothy@siriushk.com>", | |
94 TYPE_OUTPUT, | |
95 {0, 0, 0, 0}, | |
96 4096, | |
97 4096, | |
98 4, | |
99 4, | |
100 -1, | |
101 FLAG_UPSCALER | FLAG_DOWNSCALER, | |
102 VENDOR_VIA2, | |
103 -1, | |
104 {0, 0, 0, 0} | |
105 }; | |
106 | |
107 /** | |
108 * @brief list of card IDs compliant with the Unichrome driver . | |
109 */ | |
110 static unsigned short uc_card_ids[] = { | |
111 DEVICE_VIA2_VT8623_CLE266_AGP | |
112 }; | |
113 | |
114 /** | |
115 * @brief Check age of driver. | |
116 * | |
117 * @return vidix version number. | |
118 */ | |
119 unsigned int | |
120 vixGetVersion (void) | |
121 { | |
122 return (VIDIX_VERSION); | |
123 } | |
124 | |
125 /** | |
126 * @brief Find chip index in Unichrome compliant devices list. | |
127 * | |
128 * @param chip_id PCI device ID. | |
129 * | |
130 * @returns index position in uc_card_ids if successful. | |
131 * -1 if chip_id is not a compliant chipset ID. | |
132 */ | |
133 static int | |
134 find_chip (unsigned chip_id) | |
135 { | |
136 unsigned i; | |
137 for (i = 0; i < sizeof (uc_card_ids) / sizeof (unsigned short); i++) | |
138 { | |
139 if (chip_id == uc_card_ids[i]) | |
140 return i; | |
141 } | |
142 return -1; | |
143 } | |
144 | |
145 /** | |
146 * @brief Map hardware settings for vertical scaling. | |
147 * | |
148 * @param sh source height. | |
149 * @param dh destination height. | |
150 * @param zoom will hold vertical setting of zoom register. | |
151 * @param mini will hold vertical setting of mini register. | |
152 * | |
153 * @returns 1 if successful. | |
154 * 0 if the zooming factor is too large or small. | |
155 * | |
156 * @note Derived from VIA's V4L driver. | |
157 * See ddover.c, DDOVER_HQVCalcZoomHeight() | |
158 */ | |
159 int | |
160 uc_ovl_map_vzoom (int sh, int dh, uint32_t * zoom, uint32_t * mini) | |
161 { | |
162 uint32_t sh1, tmp, d; | |
163 int zoom_ok = 1; | |
164 | |
165 if (sh == dh) /* No zoom */ | |
166 { | |
167 /* Do nothing */ | |
168 } | |
169 else if (sh < dh) /* Zoom in */ | |
170 { | |
171 tmp = (sh * 0x0400) / dh; | |
172 zoom_ok = !(tmp > 0x3ff); | |
173 | |
174 *zoom |= (tmp & 0x3ff) | V1_Y_ZOOM_ENABLE; | |
175 *mini |= V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY; | |
176 } | |
177 else /* sw > dh - Zoom out */ | |
178 { | |
179 /* Find a suitable divider (1 << d) = {2, 4, 8 or 16} */ | |
180 sh1 = sh; | |
181 for (d = 1; d < 5; d++) | |
182 { | |
183 sh1 >>= 1; | |
184 if (sh1 <= dh) | |
185 break; | |
186 } | |
187 if (d == 5) /* too small */ | |
188 { | |
189 d = 4; | |
190 zoom_ok = 0; | |
191 } | |
192 | |
193 *mini |= ((d << 1) - 1) << 16; /* <= {1,3,5,7} << 16 */ | |
194 | |
195 /* Add scaling */ | |
196 if (sh1 < dh) | |
197 { | |
198 tmp = (sh1 * 0x400) / dh; | |
199 *zoom |= ((tmp & 0x3ff) | V1_Y_ZOOM_ENABLE); | |
200 *mini |= V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY; | |
201 } | |
202 } | |
203 | |
204 return zoom_ok; | |
205 } | |
206 | |
207 /** | |
208 * @brief Map hardware settings for horizontal scaling. | |
209 * | |
210 * @param sw source width. | |
211 * @param dw destination width. | |
212 * @param zoom will hold horizontal setting of zoom register. | |
213 * @param mini will hold horizontal setting of mini register. | |
214 * @param falign will hold fetch aligment. | |
215 * @param dcount will hold display count. | |
216 * | |
217 * @returns 1 if successful. | |
218 * 0 if the zooming factor is too large or small. | |
219 * | |
220 * @note Derived from VIA's V4L driver. | |
221 * See ddover.c, DDOVER_HQVCalcZoomWidth() and DDOver_GetDisplayCount() | |
222 */ | |
223 int | |
224 uc_ovl_map_hzoom (int sw, int dw, uint32_t * zoom, uint32_t * mini, | |
225 int *falign, int *dcount) | |
226 { | |
227 uint32_t tmp, sw1, d; | |
228 int md; /* Minify-divider */ | |
229 int zoom_ok = 1; | |
230 | |
231 md = 1; | |
232 *falign = 0; | |
233 | |
234 if (sw == dw) /* no zoom */ | |
235 { | |
236 /* Do nothing */ | |
237 } | |
238 else if (sw < dw) /* zoom in */ | |
239 { | |
240 tmp = (sw * 0x0800) / dw; | |
241 zoom_ok = !(tmp > 0x7ff); | |
242 | |
243 *zoom |= ((tmp & 0x7ff) << 16) | V1_X_ZOOM_ENABLE; | |
244 *mini |= V1_X_INTERPOLY; | |
245 } | |
246 else /* sw > dw - Zoom out */ | |
247 { | |
248 /* Find a suitable divider (1 << d) = {2, 4, 8 or 16} */ | |
249 sw1 = sw; | |
250 for (d = 1; d < 5; d++) | |
251 { | |
252 sw1 >>= 1; | |
253 if (sw1 <= dw) | |
254 break; | |
255 } | |
256 if (d == 5) /* too small */ | |
257 { | |
258 d = 4; | |
259 zoom_ok = 0; | |
260 } | |
261 | |
262 md = 1 << d; /* <= {2,4,8,16} */ | |
263 *falign = ((md << 1) - 1) & 0xf; /* <= {3,7,15,15} */ | |
264 *mini |= V1_X_INTERPOLY; | |
265 *mini |= ((d << 1) - 1) << 24; /* <= {1,3,5,7} << 24 */ | |
266 | |
267 /* Add scaling */ | |
268 if (sw1 < dw) | |
269 { | |
270 /* CLE bug */ | |
271 /* tmp = sw1*0x0800 / dw; */ | |
272 tmp = (sw1 - 2) * 0x0800 / dw; | |
273 *zoom |= ((tmp & 0x7ff) << 16) | V1_X_ZOOM_ENABLE; | |
274 } | |
275 } | |
276 | |
277 *dcount = sw - md; | |
278 return zoom_ok; | |
279 } | |
280 | |
281 /** | |
282 * @brief qword fetch register setting. | |
283 * | |
284 * @param format overlay pixel format. | |
285 * @param sw source width. | |
286 * | |
287 * @return qword fetch register setting | |
288 * | |
289 * @note Derived from VIA's V4L driver. See ddover.c, DDOver_GetFetch() | |
290 * @note Only call after uc_ovl_map_hzoom() | |
291 */ | |
292 uint32_t | |
293 uc_ovl_map_qwfetch (uint32_t format, int sw) | |
294 { | |
295 uint32_t fetch = 0; | |
296 | |
297 switch (format) | |
298 { | |
299 case IMGFMT_YV12: | |
300 case IMGFMT_I420: | |
301 fetch = ALIGN_TO (sw, 32) >> 4; | |
302 break; | |
303 case IMGFMT_UYVY: | |
304 case IMGFMT_YVYU: | |
305 case IMGFMT_YUY2: | |
306 fetch = (ALIGN_TO (sw << 1, 16) >> 4) + 1; | |
307 break; | |
308 case IMGFMT_BGR15: | |
309 case IMGFMT_BGR16: | |
310 fetch = (ALIGN_TO (sw << 1, 16) >> 4) + 1; | |
311 break; | |
312 case IMGFMT_BGR32: | |
313 fetch = (ALIGN_TO (sw << 2, 16) >> 4) + 1; | |
314 break; | |
315 default: | |
316 printf ("[unichrome] Unexpected pixelformat!"); | |
317 break; | |
318 } | |
319 | |
320 if (fetch < 4) | |
321 fetch = 4; | |
322 | |
323 return fetch; | |
324 } | |
325 | |
326 /** | |
327 * @brief Map pixel format. | |
328 * | |
329 * @param format pixel format. | |
330 * | |
331 * @return the mapped pixel format. | |
332 * | |
333 * @note Derived from VIA's V4L driver. See ddover.c, DDOver_GetV1Format() | |
334 */ | |
335 uint32_t | |
336 uc_ovl_map_format (uint32_t format) | |
337 { | |
338 switch (format) | |
339 { | |
340 case IMGFMT_UYVY: | |
341 case IMGFMT_YVYU: | |
342 case IMGFMT_YUY2: | |
343 return V1_COLORSPACE_SIGN | V1_YUV422; | |
344 case IMGFMT_IYUV: | |
345 return V1_COLORSPACE_SIGN | V1_YCbCr420 | V1_SWAP_SW; | |
346 case IMGFMT_YV12: | |
347 case IMGFMT_I420: | |
348 return V1_COLORSPACE_SIGN | V1_YCbCr420; | |
349 case IMGFMT_BGR15: | |
350 return V1_RGB15; | |
351 case IMGFMT_BGR16: | |
352 return V1_RGB16; | |
353 case IMGFMT_BGR32: | |
354 return V1_RGB32; | |
355 default: | |
356 printf ("[unichrome] Unexpected pixelformat!"); | |
357 return V1_YUV422; | |
358 } | |
359 } | |
360 | |
361 /** | |
362 * @brief Calculate V1 control and fifo-control register values. | |
363 * | |
364 * @param format pixel format. | |
365 * @param sw source width. | |
366 * @param hwrev CLE266 hardware revision. | |
367 * @param extfifo_on set this 1 if the extended FIFO is enabled. | |
368 * @param control will hold value for V1_CONTROL. | |
369 * @param fifo will hold value for V1_FIFO_CONTROL. | |
370 */ | |
371 void | |
372 uc_ovl_map_v1_control (uint32_t format, int sw, | |
373 int hwrev, int extfifo_on, | |
374 uint32_t * control, uint32_t * fifo) | |
375 { | |
376 *control = V1_BOB_ENABLE | uc_ovl_map_format (format); | |
377 | |
378 if (hwrev == 0x10) | |
379 { | |
380 *control |= V1_EXPIRE_NUM_F; | |
381 } | |
382 else | |
383 { | |
384 if (extfifo_on) | |
385 { | |
386 *control |= V1_EXPIRE_NUM_A | V1_FIFO_EXTENDED; | |
387 } | |
388 else | |
389 { | |
390 *control |= V1_EXPIRE_NUM; | |
391 } | |
392 } | |
393 | |
394 if ((format == IMGFMT_YV12) || (format == IMGFMT_I420)) | |
395 { | |
396 /* Minified video will be skewed without this workaround. */ | |
397 if (sw <= 80) /* Fetch count <= 5 */ | |
398 { | |
399 *fifo = UC_MAP_V1_FIFO_CONTROL (16, 0, 0); | |
400 } | |
401 else | |
402 { | |
403 if (hwrev == 0x10) | |
404 *fifo = UC_MAP_V1_FIFO_CONTROL (64, 56, 56); | |
405 else | |
406 *fifo = UC_MAP_V1_FIFO_CONTROL (16, 12, 8); | |
407 } | |
408 } | |
409 else | |
410 { | |
411 if (hwrev == 0x10) | |
412 { | |
413 *fifo = UC_MAP_V1_FIFO_CONTROL (64, 56, 56); /* Default rev 0x10 */ | |
414 } | |
415 else | |
416 { | |
417 if (extfifo_on) | |
418 *fifo = UC_MAP_V1_FIFO_CONTROL (48, 40, 40); | |
419 else | |
420 *fifo = UC_MAP_V1_FIFO_CONTROL (32, 29, 16); /* Default */ | |
421 } | |
422 } | |
423 } | |
424 | |
425 /** | |
426 * @brief Setup extended FIFO. | |
427 * | |
428 * @param extfifo_on pointer determining if extended fifo is enable or not. | |
429 * @param dst_w destination width. | |
430 */ | |
431 void | |
432 uc_ovl_setup_fifo (int *extfifo_on, int dst_w) | |
433 { | |
434 if (dst_w <= 1024) /* Disable extended FIFO */ | |
435 { | |
436 outb (0x16, 0x3c4); | |
437 outb (mclk_save[0], 0x3c5); | |
438 outb (0x17, 0x3c4); | |
439 outb (mclk_save[1], 0x3c5); | |
440 outb (0x18, 0x3c4); | |
441 outb (mclk_save[2], 0x3c5); | |
442 *extfifo_on = 0; | |
443 } | |
444 else /* Enable extended FIFO */ | |
445 { | |
446 outb (0x17, 0x3c4); | |
447 outb (0x2f, 0x3c5); | |
448 outb (0x16, 0x3c4); | |
449 outb ((mclk_save[0] & 0xf0) | 0x14, 0x3c5); | |
450 outb (0x18, 0x3c4); | |
451 outb (0x56, 0x3c5); | |
452 *extfifo_on = 1; | |
453 } | |
454 } | |
455 | |
456 void | |
457 uc_ovl_vcmd_wait (volatile uint8_t * vio) | |
458 { | |
459 while ((VIDEO_IN (vio, V_COMPOSE_MODE) | |
460 & (V1_COMMAND_FIRE | V3_COMMAND_FIRE))); | |
461 } | |
462 | |
463 /** | |
464 * @brief Probe hardware to find some useable chipset. | |
465 * | |
466 * @param verbose specifies verbose level. | |
467 * @param force specifies force mode : driver should ignore | |
468 * device_id (danger but useful for new devices) | |
469 * | |
470 * @returns 0 if it can handle something in PC. | |
471 * a negative error code otherwise. | |
472 */ | |
473 int | |
474 vixProbe (int verbose, int force) | |
475 { | |
476 pciinfo_t lst[MAX_PCI_DEVICES]; | |
477 unsigned i, num_pci; | |
478 int err; | |
479 err = pci_scan (lst, &num_pci); | |
480 if (err) | |
481 { | |
482 printf ("[unichrome] Error occurred during pci scan: %s\n", | |
483 strerror (err)); | |
484 return err; | |
485 } | |
486 else | |
487 { | |
488 err = ENXIO; | |
489 for (i = 0; i < num_pci; i++) | |
490 { | |
491 if (lst[i].vendor == VENDOR_VIA2) | |
492 { | |
493 int idx; | |
494 const char *dname; | |
495 idx = find_chip (lst[i].device); | |
496 if (idx == -1) | |
497 continue; | |
498 dname = pci_device_name (VENDOR_VIA2, lst[i].device); | |
499 dname = dname ? dname : "Unknown chip"; | |
500 printf ("[unichrome] Found chip: %s\n", dname); | |
501 if ((lst[i].command & PCI_COMMAND_IO) == 0) | |
502 { | |
503 printf ("[unichrome] Device is disabled, ignoring\n"); | |
504 continue; | |
505 } | |
506 uc_cap.device_id = lst[i].device; | |
507 err = 0; | |
508 memcpy (&pci_info, &lst[i], sizeof (pciinfo_t)); | |
509 break; | |
510 } | |
511 } | |
512 } | |
513 | |
514 if (err && verbose) | |
515 printf ("[unichrome] Can't find chip\n"); | |
516 return err; | |
517 } | |
518 | |
519 /** | |
520 * @brief Initializes driver. | |
521 * | |
522 * @returns 0 if ok. | |
523 * a negative error code otherwise. | |
524 */ | |
525 int | |
526 vixInit (void) | |
527 { | |
528 long tmp; | |
529 uc_mem = map_phys_mem (pci_info.base0, 0x800000); | |
530 enable_app_io (); | |
531 | |
532 outb (0x2f, 0x3c4); | |
533 tmp = inb (0x3c5) << 0x18; | |
534 vio = map_phys_mem (tmp, 0x1000); | |
535 | |
536 outb (0x16, 0x3c4); | |
537 mclk_save[0] = inb (0x3c5); | |
538 outb (0x17, 0x3c4); | |
539 mclk_save[1] = inb (0x3c5); | |
540 outb (0x18, 0x3c4); | |
541 mclk_save[2] = inb (0x3c5); | |
542 | |
543 uc_grkey.ckey.blue = 0x00; | |
544 uc_grkey.ckey.green = 0x00; | |
545 uc_grkey.ckey.red = 0x00; | |
546 | |
547 #ifdef DEBUG_LOGFILE | |
548 logfile = fopen ("/tmp/uc_vidix.log", "w"); | |
549 #endif | |
550 return 0; | |
551 } | |
552 | |
553 /** | |
554 * @brief Destroys driver. | |
555 */ | |
556 void | |
557 vixDestroy (void) | |
558 { | |
559 #ifdef DEBUG_LOGFILE | |
560 if (logfile) | |
561 fclose (logfile); | |
562 #endif | |
563 outb (0x16, 0x3c4); | |
564 outb (mclk_save[0], 0x3c5); | |
565 outb (0x17, 0x3c4); | |
566 outb (mclk_save[1], 0x3c5); | |
567 outb (0x18, 0x3c4); | |
568 outb (mclk_save[2], 0x3c5); | |
569 | |
570 disable_app_io (); | |
571 unmap_phys_mem (uc_mem, 0x800000); | |
572 unmap_phys_mem (vio, 0x1000); | |
573 } | |
574 | |
575 /** | |
576 * @brief Get chipset's hardware capabilities. | |
577 * | |
578 * @param to Pointer to the vidix_capability_t structure to be filled. | |
579 * | |
580 * @returns 0. | |
581 */ | |
582 int | |
583 vixGetCapability (vidix_capability_t * to) | |
584 { | |
585 memcpy (to, &uc_cap, sizeof (vidix_capability_t)); | |
586 return 0; | |
587 } | |
588 | |
589 /** | |
590 * @brief Report if the video FourCC is supported by hardware. | |
591 * | |
592 * @param fourcc input image format. | |
593 * | |
594 * @returns 1 if the fourcc is supported. | |
595 * 0 otherwise. | |
596 */ | |
597 static int | |
598 is_supported_fourcc (uint32_t fourcc) | |
599 { | |
600 switch (fourcc) | |
601 { | |
602 case IMGFMT_YV12: | |
603 case IMGFMT_I420: | |
604 case IMGFMT_UYVY: | |
605 case IMGFMT_YVYU: | |
606 case IMGFMT_YUY2: | |
607 case IMGFMT_BGR15: | |
608 case IMGFMT_BGR16: | |
609 case IMGFMT_BGR32: | |
610 return 1; | |
611 default: | |
612 return 0; | |
613 } | |
614 } | |
615 | |
616 /** | |
617 * @brief Try to configure video memory for given fourcc. | |
618 * | |
619 * @param to Pointer to the vidix_fourcc_t structure to be filled. | |
620 * | |
621 * @returns 0 if ok. | |
622 * errno otherwise. | |
623 */ | |
624 int | |
625 vixQueryFourcc (vidix_fourcc_t * to) | |
626 { | |
627 if (is_supported_fourcc (to->fourcc)) | |
628 { | |
629 to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP | | |
630 VID_DEPTH_4BPP | VID_DEPTH_8BPP | | |
631 VID_DEPTH_12BPP | VID_DEPTH_15BPP | | |
632 VID_DEPTH_16BPP | VID_DEPTH_24BPP | VID_DEPTH_32BPP; | |
633 to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY; | |
634 return 0; | |
635 } | |
636 else | |
637 to->depth = to->flags = 0; | |
638 return ENOSYS; | |
639 } | |
640 | |
641 /** | |
642 * @brief Get the GrKeys | |
643 * | |
644 * @param grkey Pointer to the vidix_grkey_t structure to be filled by driver. | |
645 * | |
646 * @return 0. | |
647 */ | |
648 int | |
649 vixGetGrKeys (vidix_grkey_t * grkey) | |
650 { | |
651 memcpy (grkey, &uc_grkey, sizeof (vidix_grkey_t)); | |
652 return (0); | |
653 } | |
654 | |
655 /** | |
656 * @brief Set the GrKeys | |
657 * | |
658 * @param grkey Colorkey to be set. | |
659 * | |
660 * @return 0. | |
661 */ | |
662 int | |
663 vixSetGrKeys (const vidix_grkey_t * grkey) | |
664 { | |
665 unsigned long dwCompose = VIDEO_IN (vio, V_COMPOSE_MODE) & ~0x0f; | |
666 memcpy (&uc_grkey, grkey, sizeof (vidix_grkey_t)); | |
667 if (uc_grkey.ckey.op != CKEY_FALSE) | |
668 { | |
669 /* Set colorkey (how do I detect BPP in hardware ??) */ | |
670 unsigned long ckey; | |
671 if (1) /* Assume 16-bit graphics */ | |
672 { | |
673 ckey = (grkey->ckey.blue & 0x1f) | |
674 | ((grkey->ckey.green & 0x3f) << 5) | |
675 | ((grkey->ckey.red & 0x1f) << 11); | |
676 } | |
677 else | |
678 { | |
679 ckey = (grkey->ckey.blue) | |
680 | (grkey->ckey.green << 8) | (grkey->ckey.red << 16); | |
681 } | |
682 VIDEO_OUT (vio, V_COLOR_KEY, ckey); | |
683 dwCompose |= SELECT_VIDEO_IF_COLOR_KEY; | |
684 } | |
685 | |
686 /* Execute the changes */ | |
687 VIDEO_OUT (vio, V_COMPOSE_MODE, dwCompose | V1_COMMAND_FIRE); | |
688 return (0); | |
689 } | |
690 | |
691 /** | |
692 * @brief Unichrome driver equalizer capabilities. | |
693 */ | |
694 vidix_video_eq_t equal = { | |
695 VEQ_CAP_BRIGHTNESS | VEQ_CAP_SATURATION | VEQ_CAP_HUE, | |
696 300, 100, 0, 0, 0, 0, 0, 0 | |
697 }; | |
698 | |
699 | |
700 /** | |
701 * @brief Get the equalizer capabilities. | |
702 * | |
703 * @param eq Pointer to the vidix_video_eq_t structure to be filled by driver. | |
704 * | |
705 * @return 0. | |
706 */ | |
707 int | |
708 vixPlaybackGetEq (vidix_video_eq_t * eq) | |
709 { | |
710 memcpy (eq, &equal, sizeof (vidix_video_eq_t)); | |
711 return 0; | |
712 } | |
713 | |
714 /** | |
715 * @brief Set the equalizer capabilities for color correction | |
716 * | |
717 * @param eq equalizer capabilities to be set. | |
718 * | |
719 * @return 0. | |
720 */ | |
721 int | |
722 vixPlaybackSetEq (const vidix_video_eq_t * eq) | |
723 { | |
724 return 0; | |
725 } | |
726 | |
727 /** | |
728 * @brief Y, U, V offsets. | |
729 */ | |
730 static int YOffs, UOffs, VOffs; | |
731 | |
732 /** | |
733 * @brief Configure driver for playback. Driver should prepare BES. | |
734 * | |
735 * @param info configuration description for playback. | |
736 * | |
737 * @returns 0 in case of success. | |
738 * -1 otherwise. | |
739 */ | |
740 int | |
741 vixConfigPlayback (vidix_playback_t * info) | |
742 { | |
743 int src_w, drw_w; | |
744 int src_h, drw_h; | |
745 long base0, pitch; | |
746 int uv_size, swap_uv; | |
747 unsigned int i; | |
748 int extfifo_on; | |
749 | |
750 /* Overlay register settings */ | |
751 uint32_t win_start, win_end; | |
752 uint32_t zoom, mini; | |
753 uint32_t dcount, falign, qwfetch; | |
754 uint32_t y_start, u_start, v_start; | |
755 uint32_t v_ctrl, fifo_ctrl; | |
756 | |
757 if (!is_supported_fourcc (info->fourcc)) | |
758 return -1; | |
759 | |
760 src_w = info->src.w; | |
761 src_h = info->src.h; | |
762 | |
763 drw_w = info->dest.w; | |
764 drw_h = info->dest.h; | |
765 | |
766 /* Setup FIFO */ | |
767 uc_ovl_setup_fifo (&extfifo_on, src_w); | |
768 | |
769 /* Get image format, FIFO size, etc. */ | |
770 uc_ovl_map_v1_control (info->fourcc, src_w, 3, extfifo_on, | |
771 &v_ctrl, &fifo_ctrl); | |
772 | |
773 /* Setup layer window */ | |
774 win_start = (info->dest.x << 16) | info->dest.y; | |
775 win_end = ((info->dest.x + drw_w - 1) << 16) | (info->dest.y + drw_h - 1); | |
776 | |
777 /* Get scaling and data-fetch parameters */ | |
778 zoom = 0; | |
779 mini = 0; | |
780 uc_ovl_map_vzoom (src_h, drw_h, &zoom, &mini); | |
781 uc_ovl_map_hzoom (src_w, drw_w, &zoom, &mini, &falign, &dcount); | |
782 qwfetch = uc_ovl_map_qwfetch (info->fourcc, src_w); | |
783 | |
784 /* Calculate buffer sizes */ | |
785 swap_uv = 0; | |
786 switch (info->fourcc) | |
787 { | |
788 case IMGFMT_YV12: | |
789 swap_uv = 1; | |
790 case IMGFMT_I420: | |
791 case IMGFMT_UYVY: | |
792 case IMGFMT_YVYU: | |
793 pitch = ALIGN_TO (src_w, 32); | |
794 uv_size = (pitch >> 1) * (src_h >> 1); | |
795 break; | |
796 | |
797 case IMGFMT_YUY2: | |
798 case IMGFMT_BGR15: | |
799 case IMGFMT_BGR16: | |
800 pitch = ALIGN_TO (src_w << 1, 32); | |
801 uv_size = 0; | |
802 break; | |
803 | |
804 case IMGFMT_BGR32: | |
805 pitch = ALIGN_TO (src_w << 2, 32); | |
806 uv_size = 0; | |
807 break; | |
808 } | |
809 if ((src_w > 4096) || (src_h > 4096) || | |
810 (src_w < 32) || (src_h < 1) || (pitch > 0x1fff)) | |
811 { | |
812 printf ("[unichrome] Layer size out of bounds\n"); | |
813 } | |
814 | |
815 /* Calculate offsets */ | |
816 info->offset.y = 0; | |
817 info->offset.v = info->offset.y + pitch * src_h; | |
818 info->offset.u = info->offset.v + uv_size; | |
819 info->frame_size = info->offset.u + uv_size; | |
820 YOffs = info->offset.y; | |
821 UOffs = (swap_uv ? info->offset.v : info->offset.u); | |
822 VOffs = (swap_uv ? info->offset.u : info->offset.v); | |
823 | |
824 /* Assume we have 2 MB to play with */ | |
825 info->num_frames = FRAMEBUFFER_SIZE / info->frame_size; | |
826 if (info->num_frames > VID_PLAY_MAXFRAMES) | |
827 info->num_frames = VID_PLAY_MAXFRAMES; | |
828 | |
829 /* Start at 6 MB. Let's hope it's not in use. */ | |
830 base0 = FRAMEBUFFER_START; | |
831 info->dga_addr = uc_mem + base0; | |
832 | |
833 info->dest.pitch.y = 32; | |
834 info->dest.pitch.u = 32; | |
835 info->dest.pitch.v = 32; | |
836 | |
837 for (i = 0; i < info->num_frames; i++) | |
838 { | |
839 info->offsets[i] = info->frame_size * i; | |
840 frames[i] = base0 + info->offsets[i]; | |
841 } | |
842 | |
843 /* Write to the hardware */ | |
844 uc_ovl_vcmd_wait (vio); | |
845 | |
846 /* Configure diy_pitchlay parameters now */ | |
847 if (v_ctrl & V1_COLORSPACE_SIGN) | |
848 { | |
849 VIDEO_OUT (vio, V1_ColorSpaceReg_2, ColorSpaceValue_2); | |
850 VIDEO_OUT (vio, V1_ColorSpaceReg_1, ColorSpaceValue_1); | |
851 } | |
852 | |
853 VIDEO_OUT (vio, V1_CONTROL, v_ctrl); | |
854 VIDEO_OUT (vio, V_FIFO_CONTROL, fifo_ctrl); | |
855 | |
856 VIDEO_OUT (vio, V1_WIN_START_Y, win_start); | |
857 VIDEO_OUT (vio, V1_WIN_END_Y, win_end); | |
858 | |
859 VIDEO_OUT (vio, V1_SOURCE_HEIGHT, (src_h << 16) | dcount); | |
860 | |
861 VIDEO_OUT (vio, V12_QWORD_PER_LINE, qwfetch << 20); | |
862 VIDEO_OUT (vio, V1_STRIDE, pitch | ((pitch >> 1) << 16)); | |
863 | |
864 VIDEO_OUT (vio, V1_MINI_CONTROL, mini); | |
865 VIDEO_OUT (vio, V1_ZOOM_CONTROL, zoom); | |
866 | |
867 /* Configure buffer address and execute the changes now! */ | |
868 vixPlaybackFrameSelect (0); | |
869 | |
870 return 0; | |
871 } | |
872 | |
873 /** | |
874 * @brief Set playback on : driver should activate BES on this call. | |
875 * | |
876 * @return 0. | |
877 */ | |
878 int | |
879 vixPlaybackOn (void) | |
880 { | |
881 LOGWRITE ("Enable overlay\n"); | |
882 | |
883 /* Turn on overlay */ | |
884 VIDEO_OUT (vio, V1_CONTROL, VIDEO_IN (vio, V1_CONTROL) | V1_ENABLE); | |
885 | |
886 /* Execute the changes */ | |
887 VIDEO_OUT (vio, V_COMPOSE_MODE, | |
888 VIDEO_IN (vio, V_COMPOSE_MODE) | V1_COMMAND_FIRE); | |
889 | |
890 return 0; | |
891 } | |
892 | |
893 /** | |
894 * @brief Set playback off : driver should deactivate BES on this call. | |
895 * | |
896 * @return 0. | |
897 */ | |
898 int | |
899 vixPlaybackOff (void) | |
900 { | |
901 LOGWRITE ("Disable overlay\n"); | |
902 | |
903 uc_ovl_vcmd_wait (vio); | |
904 | |
905 /* Restore FIFO */ | |
906 VIDEO_OUT (vio, V_FIFO_CONTROL, UC_MAP_V1_FIFO_CONTROL (16, 12, 8)); | |
907 | |
908 /* Turn off overlay */ | |
909 VIDEO_OUT (vio, V1_CONTROL, VIDEO_IN (vio, V1_CONTROL) & ~V1_ENABLE); | |
910 | |
911 /* Execute the changes */ | |
912 VIDEO_OUT (vio, V_COMPOSE_MODE, | |
913 VIDEO_IN (vio, V_COMPOSE_MODE) | V1_COMMAND_FIRE); | |
914 | |
915 return 0; | |
916 } | |
917 | |
918 /** | |
919 * @brief Driver should prepare and activate corresponded frame. | |
920 * | |
921 * @param frame the frame index. | |
922 * | |
923 * @return 0. | |
924 * | |
925 * @note This function is used only for double and triple buffering | |
926 * and never used for single buffering playback. | |
927 */ | |
928 int | |
929 vixPlaybackFrameSelect (unsigned int frame) | |
930 { | |
931 LOGWRITE ("Frame select\n"); | |
932 | |
933 uc_ovl_vcmd_wait (vio); | |
934 | |
935 /* Configure buffer address */ | |
936 VIDEO_OUT (vio, V1_STARTADDR_Y0, frames[frame] + YOffs); | |
937 VIDEO_OUT (vio, V1_STARTADDR_CB0, frames[frame] + UOffs); | |
938 VIDEO_OUT (vio, V1_STARTADDR_CR0, frames[frame] + VOffs); | |
939 | |
940 /* Execute the changes */ | |
941 VIDEO_OUT (vio, V_COMPOSE_MODE, | |
942 VIDEO_IN (vio, V_COMPOSE_MODE) | V1_COMMAND_FIRE); | |
943 | |
944 return 0; | |
945 } |