Mercurial > mplayer.hg
comparison vidix/drivers/radeon_vid.c @ 8564:e1329263197b
fixed a 10l, some cosmetics, and initial ppc (bigendian) support
author | alex |
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date | Wed, 25 Dec 2002 20:57:11 +0000 |
parents | 82ecba0b039b |
children | 39776935e99c |
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8563:f1faba87cfa4 | 8564:e1329263197b |
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1 /* | 1 /* |
2 radeon_vid - VIDIX based video driver for Radeon and Rage128 chips | 2 radeon_vid - VIDIX based video driver for Radeon and Rage128 chips |
3 Copyrights 2002 Nick Kurshev. This file is based on sources from | 3 Copyrights 2002 Nick Kurshev. This file is based on sources from |
4 GATOS (gatos.sf.net) and X11 (www.xfree86.org) | 4 GATOS (gatos.sf.net) and X11 (www.xfree86.org) |
5 Licence: GPL | 5 Licence: GPL |
6 PPC support by Alex Beregszaszi | |
6 */ | 7 */ |
7 | 8 |
8 #include <errno.h> | 9 #include <errno.h> |
9 #include <stdio.h> | 10 #include <stdio.h> |
10 #include <stdlib.h> | 11 #include <stdlib.h> |
11 #include <string.h> | 12 #include <string.h> |
12 #include <math.h> | 13 #include <math.h> |
13 #include <inttypes.h> | 14 #include <inttypes.h> |
15 | |
16 #include "../../config.h" | |
17 #include "../../bswap.h" | |
14 #include "../../libdha/pci_ids.h" | 18 #include "../../libdha/pci_ids.h" |
15 #include "../../libdha/pci_names.h" | 19 #include "../../libdha/pci_names.h" |
16 #include "../vidix.h" | 20 #include "../vidix.h" |
17 #include "../fourcc.h" | 21 #include "../fourcc.h" |
18 #include "../../libdha/libdha.h" | 22 #include "../../libdha/libdha.h" |
19 #include "radeon.h" | 23 #include "radeon.h" |
20 | 24 |
21 #ifdef RAGE128 | 25 #ifdef RAGE128 |
22 #define RADEON_MSG "Rage128_vid:" | 26 #define RADEON_MSG "[rage128]" |
23 #define X_ADJUST 0 | 27 #define X_ADJUST 0 |
24 #else | 28 #else |
25 #define RADEON_MSG "Radeon_vid:" | 29 #define RADEON_MSG "[radeon]" |
26 #define X_ADJUST (is_shift_required ? 8 : 0) | 30 #define X_ADJUST (is_shift_required ? 8 : 0) |
27 #ifndef RADEON | 31 #ifndef RADEON |
28 #define RADEON | 32 #define RADEON |
29 #endif | 33 #endif |
30 #endif | 34 #endif |
31 | 35 |
32 static int __verbose = 0; | 36 static int __verbose = 0; |
33 #ifdef RADEON | 37 #ifdef RADEON |
34 static int rage_ckey_model=0; | 38 static int rage_ckey_model=0; |
35 static int is_shift_required; | 39 static int is_shift_required = 0; |
36 #endif | 40 #endif |
37 | 41 |
38 typedef struct bes_registers_s | 42 typedef struct bes_registers_s |
39 { | 43 { |
40 /* base address of yuv framebuffer */ | 44 /* base address of yuv framebuffer */ |
208 #define GETREG(TYPE,PTR,OFFZ) (*((volatile TYPE*)((PTR)+(OFFZ)))) | 212 #define GETREG(TYPE,PTR,OFFZ) (*((volatile TYPE*)((PTR)+(OFFZ)))) |
209 #define SETREG(TYPE,PTR,OFFZ,VAL) (*((volatile TYPE*)((PTR)+(OFFZ))))=VAL | 213 #define SETREG(TYPE,PTR,OFFZ,VAL) (*((volatile TYPE*)((PTR)+(OFFZ))))=VAL |
210 | 214 |
211 #define INREG8(addr) GETREG(uint8_t,(uint32_t)(radeon_mmio_base),addr) | 215 #define INREG8(addr) GETREG(uint8_t,(uint32_t)(radeon_mmio_base),addr) |
212 #define OUTREG8(addr,val) SETREG(uint8_t,(uint32_t)(radeon_mmio_base),addr,val) | 216 #define OUTREG8(addr,val) SETREG(uint8_t,(uint32_t)(radeon_mmio_base),addr,val) |
213 #define INREG(addr) GETREG(uint32_t,(uint32_t)(radeon_mmio_base),addr) | 217 |
214 #define OUTREG(addr,val) SETREG(uint32_t,(uint32_t)(radeon_mmio_base),addr,val) | 218 static inline uint32_t INREG (uint32_t addr) { |
219 uint32_t tmp = GETREG(uint32_t,(uint32_t)(radeon_mmio_base),addr); | |
220 return le2me_32(tmp); | |
221 } | |
222 //#define OUTREG(addr,val) SETREG(uint32_t,(uint32_t)(radeon_mmio_base),addr,val) | |
223 #define OUTREG(addr,val) SETREG(uint32_t,(uint32_t)(radeon_mmio_base),addr,le2me_32(val)) | |
215 #define OUTREGP(addr,val,mask) \ | 224 #define OUTREGP(addr,val,mask) \ |
216 do { \ | 225 do { \ |
217 unsigned int _tmp = INREG(addr); \ | 226 unsigned int _tmp = INREG(addr); \ |
218 _tmp &= (mask); \ | 227 _tmp &= (mask); \ |
219 _tmp |= (val); \ | 228 _tmp |= (val); \ |
416 radeon_fifo_wait(1); | 425 radeon_fifo_wait(1); |
417 OUTREG(DEFAULT_OFFSET, (INREG(DEFAULT_OFFSET) & 0xC0000000) | | 426 OUTREG(DEFAULT_OFFSET, (INREG(DEFAULT_OFFSET) & 0xC0000000) | |
418 (pitch64 << 22)); | 427 (pitch64 << 22)); |
419 | 428 |
420 radeon_fifo_wait(1); | 429 radeon_fifo_wait(1); |
421 #if defined(__BIG_ENDIAN) | 430 //#if defined(__BIG_ENDIAN) |
431 #if defined(WORDS_BIGENDIAN) | |
422 OUTREGP(DP_DATATYPE, | 432 OUTREGP(DP_DATATYPE, |
423 HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN); | 433 HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN); |
424 #else | 434 #else |
425 OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN); | 435 OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN); |
426 #endif | 436 #endif |
837 if(chip_id == ati_card_ids[i]) return i; | 847 if(chip_id == ati_card_ids[i]) return i; |
838 } | 848 } |
839 return -1; | 849 return -1; |
840 } | 850 } |
841 | 851 |
842 pciinfo_t pci_info; | 852 static pciinfo_t pci_info; |
843 static int probed=0; | 853 static int probed=0; |
844 | 854 |
845 vidix_capability_t def_cap = | 855 vidix_capability_t def_cap = |
846 { | 856 { |
847 #ifdef RAGE128 | 857 #ifdef RAGE128 |
848 "BES driver for rage128 cards", | 858 "BES driver for Rage128 cards", |
849 #else | 859 #else |
850 "BES driver for radeon cards", | 860 "BES driver for Radeon cards", |
851 #endif | 861 #endif |
852 "Nick Kurshev", | 862 "Nick Kurshev", |
853 TYPE_OUTPUT | TYPE_FX, | 863 TYPE_OUTPUT | TYPE_FX, |
854 { 0, 0, 0, 0 }, | 864 { 0, 0, 0, 0 }, |
855 2048, | 865 2048, |