Mercurial > mplayer.hg
comparison drivers/radeon/radeon_vid.c @ 2965:eb5e41e06ccc
Minor lacks fixed
author | nick |
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date | Sun, 18 Nov 2001 09:45:49 +0000 |
parents | 31730e84515d |
children | 64ce4a515a78 |
comparison
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2964:ab8df016b2f1 | 2965:eb5e41e06ccc |
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65 #define RADEON_VID_MAJOR 178 | 65 #define RADEON_VID_MAJOR 178 |
66 | 66 |
67 | 67 |
68 MODULE_AUTHOR("Nick Kurshev <nickols_k@mail.ru>"); | 68 MODULE_AUTHOR("Nick Kurshev <nickols_k@mail.ru>"); |
69 MODULE_DESCRIPTION("Accelerated YUV BES driver for Radeons. Version: "RADEON_VID_VERSION); | 69 MODULE_DESCRIPTION("Accelerated YUV BES driver for Radeons. Version: "RADEON_VID_VERSION); |
70 #ifdef MODULE_LICENSE | |
70 MODULE_LICENSE("GPL"); | 71 MODULE_LICENSE("GPL"); |
71 | 72 #endif |
72 | 73 |
73 typedef struct bes_registers_s | 74 typedef struct bes_registers_s |
74 { | 75 { |
75 /* base address of yuv framebuffer */ | 76 /* base address of yuv framebuffer */ |
76 uint32_t yuv_base; | 77 uint32_t yuv_base; |
221 ,besr.p1_x_start_end,besr.p2_x_start_end,besr.p2_x_start_end); | 222 ,besr.p1_x_start_end,besr.p2_x_start_end,besr.p2_x_start_end); |
222 RTRACE("radeon_vid: OV0: p1_v_accum_init=%x p1_h_accum_init=%x p23_h_accum_init=%x\n" | 223 RTRACE("radeon_vid: OV0: p1_v_accum_init=%x p1_h_accum_init=%x p23_h_accum_init=%x\n" |
223 ,besr.p1_v_accum_init,besr.p1_h_accum_init,besr.p23_h_accum_init); | 224 ,besr.p1_v_accum_init,besr.p1_h_accum_init,besr.p23_h_accum_init); |
224 OUTREG(OV0_REG_LOAD_CNTL, REG_LD_CTL_LOCK); | 225 OUTREG(OV0_REG_LOAD_CNTL, REG_LD_CTL_LOCK); |
225 while(!(INREG(OV0_REG_LOAD_CNTL)®_LD_CTL_LOCK_READBACK)); | 226 while(!(INREG(OV0_REG_LOAD_CNTL)®_LD_CTL_LOCK_READBACK)); |
226 /* | 227 |
227 OUTREG(OV0_AUTO_FLIP_CNTL,OV0_AUTO_FLIP_CNTL_SOFT_BUF_ODD); | 228 OUTREG(OV0_AUTO_FLIP_CNTL,OV0_AUTO_FLIP_CNTL_SOFT_BUF_ODD); |
228 | 229 |
229 OUTREG(OV0_DEINTERLACE_PATTERN,0xAAAAAAAA); | 230 OUTREG(OV0_DEINTERLACE_PATTERN,0xAAAAAAAA); |
230 | 231 |
231 OUTREG(OV0_AUTO_FLIP_CNTL,(INREG(OV0_AUTO_FLIP_CNTL)^OV0_AUTO_FLIP_CNTL_SOFT_EOF_TOGGLE)); | 232 OUTREG(OV0_AUTO_FLIP_CNTL,(INREG(OV0_AUTO_FLIP_CNTL)^OV0_AUTO_FLIP_CNTL_SOFT_EOF_TOGGLE)); |
232 OUTREG(OV0_AUTO_FLIP_CNTL,(INREG(OV0_AUTO_FLIP_CNTL)^OV0_AUTO_FLIP_CNTL_SOFT_EOF_TOGGLE)); | 233 OUTREG(OV0_AUTO_FLIP_CNTL,(INREG(OV0_AUTO_FLIP_CNTL)^OV0_AUTO_FLIP_CNTL_SOFT_EOF_TOGGLE)); |
233 */ | 234 |
234 OUTREG(OV0_H_INC, besr.h_inc); | 235 OUTREG(OV0_H_INC, besr.h_inc); |
235 OUTREG(OV0_STEP_BY, besr.step_by); | 236 OUTREG(OV0_STEP_BY, besr.step_by); |
236 OUTREG(OV0_Y_X_START, besr.y_x_start); | 237 OUTREG(OV0_Y_X_START, besr.y_x_start); |
237 OUTREG(OV0_Y_X_END, besr.y_x_end); | 238 OUTREG(OV0_Y_X_END, besr.y_x_end); |
238 OUTREG(OV0_V_INC, besr.v_inc); | 239 OUTREG(OV0_V_INC, besr.v_inc); |
252 OUTREG(OV0_P1_H_ACCUM_INIT, besr.p1_h_accum_init); | 253 OUTREG(OV0_P1_H_ACCUM_INIT, besr.p1_h_accum_init); |
253 OUTREG(OV0_P23_H_ACCUM_INIT, besr.p23_h_accum_init); | 254 OUTREG(OV0_P23_H_ACCUM_INIT, besr.p23_h_accum_init); |
254 | 255 |
255 bes_flags = SCALER_ENABLE | | 256 bes_flags = SCALER_ENABLE | |
256 SCALER_DOUBLE_BUFFER | | 257 SCALER_DOUBLE_BUFFER | |
257 // SCALER_ADAPTIVE_DEINT | | 258 SCALER_ADAPTIVE_DEINT | |
258 SCALER_SMART_SWITCH | | 259 SCALER_SMART_SWITCH | |
259 SCALER_HORZ_PICK_NEAREST; | 260 SCALER_HORZ_PICK_NEAREST; |
260 switch(besr.fourcc) | 261 switch(besr.fourcc) |
261 { | 262 { |
262 case IMGFMT_RGB15: | 263 case IMGFMT_RGB15: |