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AMD's Family 6 CPUs come with two flavors: one that supports SSE and one that dosen't. However, they're not easily distinguishible from their signature (family, model and stepping). Original configure might set -march=athlon-4 for a CPU that dosen't support SSE and causes gcc to generate code that won't run on the target machine. Closes bug #267. patch by Zuxy Meng zuxy -- dot -- meng -- at -- gmail -- dot -- com
author diego
date Thu, 01 Dec 2005 02:51:22 +0000
parents 72c87b2ec779
children 3f0d00abc073
line wrap: on
line source

#ifndef __ASPECT_H
#define __ASPECT_H
/* Stuff for correct aspect scaling. */

extern int vo_panscan_x;
extern int vo_panscan_y;
extern float vo_panscan_amount;

extern void panscan_init( void );
extern void panscan_calc( void );

void aspect_save_orig(int orgw, int orgh);

void aspect_save_prescale(int prew, int preh);

void aspect_save_screenres(int scrw, int scrh);

#define A_ZOOM 1
#define A_NOZOOM 0

void aspect(int *srcw, int *srch, int zoom);

#endif