view cpudetect.h @ 23968:a9c0184eedcb

r23687: Implemented tv://[<channel>][/<input_id>] url syntax r23748: Leave out (no) prefix from option names for consistency. r23852: af channels example for ffdca to ALSA reordering r23856: small wording improvement r23897: Experimental negative panscan values r23898: Set -vo gl slice-height default to 0 r23917: Document -rawvideo format="format string" r23920 + r23924: Teletext support r23926: update man page with v4l2 a/v outputs r23978: add possibly incorrect subfont entry r23982: i_certify_that_my_video_stream_does_not_use_b_frames is gone. r23984: Added FIXME skeletons for missing lavc options.

#ifndef CPUDETECT_H
#define CPUDETECT_H

#define CPUTYPE_I386	3
#define CPUTYPE_I486	4
#define CPUTYPE_I586	5
#define CPUTYPE_I686    6

#ifdef ARCH_X86_64
#  define REGa    rax
#  define REGb    rbx
#  define REGBP   rbp
#  define REGSP   rsp
#  define REG_a  "rax"
#  define REG_b  "rbx"
#  define REG_c  "rcx"
#  define REG_d  "rdx"
#  define REG_S  "rsi"
#  define REG_D  "rdi"
#  define REG_SP "rsp"
#  define REG_BP "rbp"
#else
#  define REGa    eax
#  define REGb    ebx
#  define REGBP   ebp
#  define REGSP   esp
#  define REG_a  "eax"
#  define REG_b  "ebx"
#  define REG_c  "ecx"
#  define REG_d  "edx"
#  define REG_S  "esi"
#  define REG_D  "edi"
#  define REG_SP "esp"
#  define REG_BP "ebp"
#endif

typedef struct cpucaps_s {
	int cpuType;
	int cpuModel;
	int cpuStepping;
	int hasMMX;
	int hasMMX2;
	int has3DNow;
	int has3DNowExt;
	int hasSSE;
	int hasSSE2;
	int isX86;
	unsigned cl_size; /* size of cache line */
        int hasAltiVec;
	int hasTSC;
} CpuCaps;

extern CpuCaps gCpuCaps;

void GetCpuCaps(CpuCaps *caps);

/* returned value is malloc()'ed so free() it after use */
char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]);

#endif /* !CPUDETECT_H */