# HG changeset patch
# User gpoirier
# Date 1159723185 0
# Node ID 2d5790e4ee8f9005ac6149f55a6c1f3e916f010d
# Parent  fa122b7c71c6e48e4adffec3324be1f4f7b3dc03
Add support for "Safer Mode Extensions", "Supplemental SSE3", "Direct Cache Access"
Patch by Zuxy Meng

diff -r fa122b7c71c6 -r 2d5790e4ee8f TOOLS/cpuinfo.c
--- a/TOOLS/cpuinfo.c	Sun Oct 01 17:09:04 2006 +0000
+++ b/TOOLS/cpuinfo.c	Sun Oct 01 17:19:45 2006 +0000
@@ -194,11 +194,14 @@
       CPUID_FEATURE_DEF(3, "monitor", "MONITOR/MWAIT"),
       CPUID_FEATURE_DEF(4, "ds_cpl", "CPL Qualified Debug Store"),
       CPUID_FEATURE_DEF(5, "vmx", "Virtual Machine Extensions"),
+      CPUID_FEATURE_DEF(6, "smx", "Safer Mode Extensions"),
       CPUID_FEATURE_DEF(7, "est", "Enhanced Intel SpeedStep Technology"),
       CPUID_FEATURE_DEF(8, "tm2", "Thermal Monitor 2"),
+      CPUID_FEATURE_DEF(9, "ssse3", "Supplemental SSE3"),
       CPUID_FEATURE_DEF(10, "cid", "L1 Context ID"),
       CPUID_FEATURE_DEF(13, "cx16", "CMPXCHG16B Available"),
       CPUID_FEATURE_DEF(14, "xtpr", "xTPR Disable"), 
+      CPUID_FEATURE_DEF(18, "dca", "Direct Cache Access"), 
       { -1 }
     };
     static struct {