# HG changeset patch
# User reimar
# Date 1221751823 0
# Node ID 5b7f52928bcd70bd9af21ade37dc02ff4463e5a5
# Parent  4b7f86c4a8b9c750caacc1a5c90fef7f7f4b7c42
Simplify cpudetect OS-support detection code, e.g. using one mp_msg to print either yes or no instead of two.
Should not change code behaviour.

diff -r 4b7f86c4a8b9 -r 5b7f52928bcd cpudetect.c
--- a/cpudetect.c	Thu Sep 18 00:26:37 2008 +0000
+++ b/cpudetect.c	Thu Sep 18 15:30:23 2008 +0000
@@ -382,25 +382,15 @@
 
    mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " );
    ret = sysctl(mib, 2, &has_sse, &varlen, NULL, 0);
-   if (ret < 0 || !has_sse) {
-      gCpuCaps.hasSSE=0;
-      mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" );
-   } else {
-      gCpuCaps.hasSSE=1;
-      mp_msg(MSGT_CPUDETECT,MSGL_V, "yes!\n" );
-   }
+   gCpuCaps.hasSSE = ret >= 0 && has_sse;
+   mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE ? "yes.\n" : "no!\n" );
 
    mib[1] = CPU_SSE2;
    varlen = sizeof(has_sse2);
    mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE2... " );
    ret = sysctl(mib, 2, &has_sse2, &varlen, NULL, 0);
-   if (ret < 0 || !has_sse2) {
-      gCpuCaps.hasSSE2=0;
-      mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" );
-   } else {
-      gCpuCaps.hasSSE2=1;
-      mp_msg(MSGT_CPUDETECT,MSGL_V, "yes!\n" );
-   }
+   gCpuCaps.hasSSE2 = ret >= 0 && has_sse2;
+   mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE2 ? "yes.\n" : "no!\n" );
 #else
    gCpuCaps.hasSSE = 0;
    mp_msg(MSGT_CPUDETECT,MSGL_WARN, "No OS support for SSE, disabling to be safe.\n" );
@@ -412,8 +402,7 @@
       exc_fil = SetUnhandledExceptionFilter(win32_sig_handler_sse);
       __asm __volatile ("xorps %xmm0, %xmm0");
       SetUnhandledExceptionFilter(exc_fil);
-      if ( gCpuCaps.hasSSE ) mp_msg(MSGT_CPUDETECT,MSGL_V, "yes.\n" );
-      else mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" );
+      mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE ? "yes.\n" : "no!\n" );
    }
 #elif defined(__OS2__)
    EXCEPTIONREGISTRATIONRECORD RegRec = { 0, &os2_sig_handler_sse };
@@ -422,8 +411,7 @@
       DosSetExceptionHandler( &RegRec );
       __asm __volatile ("xorps %xmm0, %xmm0");
       DosUnsetExceptionHandler( &RegRec );
-      if ( gCpuCaps.hasSSE ) mp_msg(MSGT_CPUDETECT,MSGL_V, "yes.\n" );
-      else mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" );
+      mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE ? "yes.\n" : "no!\n" );
    }
 #elif defined(__linux__)
 #if defined(_POSIX_SOURCE)
@@ -447,11 +435,7 @@
 //      __asm __volatile ("xorps %%xmm0, %%xmm0");
       __asm __volatile ("xorps %xmm0, %xmm0");
 
-      if ( gCpuCaps.hasSSE ) {
-	 mp_msg(MSGT_CPUDETECT,MSGL_V, "yes.\n" );
-      } else {
-	 mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" );
-      }
+      mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE ? "yes.\n" : "no!\n" );
    }
 
    /* Restore the original signal handlers.
@@ -461,11 +445,7 @@
    /* If we've gotten to here and the XMM CPUID bit is still set, we're
     * safe to go ahead and hook out the SSE code throughout Mesa.
     */
-   if ( gCpuCaps.hasSSE ) {
-      mp_msg(MSGT_CPUDETECT,MSGL_V, "Tests of OS support for SSE passed.\n" );
-   } else {
-      mp_msg(MSGT_CPUDETECT,MSGL_V, "Tests of OS support for SSE failed!\n" );
-   }
+   mp_msg(MSGT_CPUDETECT,MSGL_V, "Tests of OS support for SSE %s\n", gCpuCaps.hasSSE ? "passed." : "failed!" );
 #else
    /* We can't use POSIX signal handling to test the availability of
     * SSE, so we disable it by default.