# HG changeset patch
# User nick
# Date 1015832764 0
# Node ID 8a708971d372b4c1f6f6df91bf3412f1336951be
# Parent  568ca851a05b7c29f05a2d41d47e7213e41cc7c7
Fixed swapping of UV planes in single buffered mode

diff -r 568ca851a05b -r 8a708971d372 vidix/drivers/radeon_vid.c
--- a/vidix/drivers/radeon_vid.c	Mon Mar 11 01:13:13 2002 +0000
+++ b/vidix/drivers/radeon_vid.c	Mon Mar 11 07:46:04 2002 +0000
@@ -966,12 +966,12 @@
     OUTREG(OV0_BASE_ADDR,		besr.base_addr);
 #endif
     OUTREG(OV0_VID_BUF0_BASE_ADRS,	besr.vid_buf_base_adrs_y[0]);
-    OUTREG(OV0_VID_BUF1_BASE_ADRS,	besr.vid_buf_base_adrs_u[0]);
-    OUTREG(OV0_VID_BUF2_BASE_ADRS,	besr.vid_buf_base_adrs_v[0]);
+    OUTREG(OV0_VID_BUF1_BASE_ADRS,	besr.vid_buf_base_adrs_v[0]);
+    OUTREG(OV0_VID_BUF2_BASE_ADRS,	besr.vid_buf_base_adrs_u[0]);
     radeon_fifo_wait(9);
     OUTREG(OV0_VID_BUF3_BASE_ADRS,	besr.vid_buf_base_adrs_y[0]);
-    OUTREG(OV0_VID_BUF4_BASE_ADRS,	besr.vid_buf_base_adrs_u[0]);
-    OUTREG(OV0_VID_BUF5_BASE_ADRS,	besr.vid_buf_base_adrs_v[0]);
+    OUTREG(OV0_VID_BUF4_BASE_ADRS,	besr.vid_buf_base_adrs_v[0]);
+    OUTREG(OV0_VID_BUF5_BASE_ADRS,	besr.vid_buf_base_adrs_u[0]);
     OUTREG(OV0_P1_V_ACCUM_INIT,		besr.p1_v_accum_init);
     OUTREG(OV0_P1_H_ACCUM_INIT,		besr.p1_h_accum_init);
     OUTREG(OV0_P23_H_ACCUM_INIT,	besr.p23_h_accum_init);