# HG changeset patch
# User michael
# Date 1005004155 0
# Node ID 96c1d1e6cb9e0d65df51cef97ee3bedac62875e5
# Parent  a44484066941367d24c1cbfad4fcf218cbdc362e
only 6 registers used

diff -r a44484066941 -r 96c1d1e6cb9e postproc/swscale.c
--- a/postproc/swscale.c	Mon Nov 05 21:49:20 2001 +0000
+++ b/postproc/swscale.c	Mon Nov 05 23:49:15 2001 +0000
@@ -474,10 +474,10 @@
 			"psllq $16, %%mm3		\n\t" /* RGBRGB00 3 */\
 			"por %%mm4, %%mm3		\n\t" /* RGBRGBRG 2.5 */\
 \
-			"leal (%%eax, %%eax, 2), %%ebx	\n\t"\
-			MOVNTQ(%%mm0, (%4, %%ebx))\
-			MOVNTQ(%%mm2, 8(%4, %%ebx))\
-			MOVNTQ(%%mm3, 16(%4, %%ebx))\
+			MOVNTQ(%%mm0, (%%ebx))\
+			MOVNTQ(%%mm2, 8(%%ebx))\
+			MOVNTQ(%%mm3, 16(%%ebx))\
+			"addl $24, %%ebx		\n\t"\
 \
 			"addl $8, %%eax			\n\t"\
 			"cmpl %5, %%eax			\n\t"\
@@ -740,10 +740,11 @@
 		else if(dstbpp==24)
 		{
 			asm volatile(
+				"movl %4, %%ebx			\n\t"
 				YSCALEYUV2RGB
 				WRITEBGR24
 
-			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstw),
+			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), "m" (dstw),
 			"m" (yalpha1), "m" (uvalpha1)
 			: "%eax", "%ebx"
 			);
@@ -922,9 +923,10 @@
 		else if(dstbpp==24)
 		{
 			asm volatile(
+				"movl %4, %%ebx			\n\t"
 				YSCALEYUV2RGB1
 				WRITEBGR24
-			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstw),
+			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), "m" (dstw),
 			"m" (yalpha1), "m" (uvalpha1)
 			: "%eax", "%ebx"
 			);
@@ -978,9 +980,10 @@
 		else if(dstbpp==24)
 		{
 			asm volatile(
+				"movl %4, %%ebx			\n\t"
 				YSCALEYUV2RGB1b
 				WRITEBGR24
-			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstw),
+			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), "m" (dstw),
 			"m" (yalpha1), "m" (uvalpha1)
 			: "%eax", "%ebx"
 			);
diff -r a44484066941 -r 96c1d1e6cb9e postproc/swscale_template.c
--- a/postproc/swscale_template.c	Mon Nov 05 21:49:20 2001 +0000
+++ b/postproc/swscale_template.c	Mon Nov 05 23:49:15 2001 +0000
@@ -474,10 +474,10 @@
 			"psllq $16, %%mm3		\n\t" /* RGBRGB00 3 */\
 			"por %%mm4, %%mm3		\n\t" /* RGBRGBRG 2.5 */\
 \
-			"leal (%%eax, %%eax, 2), %%ebx	\n\t"\
-			MOVNTQ(%%mm0, (%4, %%ebx))\
-			MOVNTQ(%%mm2, 8(%4, %%ebx))\
-			MOVNTQ(%%mm3, 16(%4, %%ebx))\
+			MOVNTQ(%%mm0, (%%ebx))\
+			MOVNTQ(%%mm2, 8(%%ebx))\
+			MOVNTQ(%%mm3, 16(%%ebx))\
+			"addl $24, %%ebx		\n\t"\
 \
 			"addl $8, %%eax			\n\t"\
 			"cmpl %5, %%eax			\n\t"\
@@ -740,10 +740,11 @@
 		else if(dstbpp==24)
 		{
 			asm volatile(
+				"movl %4, %%ebx			\n\t"
 				YSCALEYUV2RGB
 				WRITEBGR24
 
-			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstw),
+			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), "m" (dstw),
 			"m" (yalpha1), "m" (uvalpha1)
 			: "%eax", "%ebx"
 			);
@@ -922,9 +923,10 @@
 		else if(dstbpp==24)
 		{
 			asm volatile(
+				"movl %4, %%ebx			\n\t"
 				YSCALEYUV2RGB1
 				WRITEBGR24
-			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstw),
+			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), "m" (dstw),
 			"m" (yalpha1), "m" (uvalpha1)
 			: "%eax", "%ebx"
 			);
@@ -978,9 +980,10 @@
 		else if(dstbpp==24)
 		{
 			asm volatile(
+				"movl %4, %%ebx			\n\t"
 				YSCALEYUV2RGB1b
 				WRITEBGR24
-			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "r" (dest), "m" (dstw),
+			:: "r" (buf0), "r" (buf1), "r" (uvbuf0), "r" (uvbuf1), "m" (dest), "m" (dstw),
 			"m" (yalpha1), "m" (uvalpha1)
 			: "%eax", "%ebx"
 			);