# HG changeset patch # User zuxy # Date 1263908157 0 # Node ID a1383e528fa7917e075a51fa84c5d977a2d57ed7 # Parent 2c0866c165ef1e7c49eb270e536bc3f30f7b6c32 Set HAVE_FAST_CLZ according to CPU type. diff -r 2c0866c165ef -r a1383e528fa7 configure --- a/configure Tue Jan 19 11:35:04 2010 +0000 +++ b/configure Tue Jan 19 13:35:57 2010 +0000 @@ -519,6 +519,7 @@ _ssse3=auto _cmov=auto _fast_cmov=auto +_fast_clz=auto _armv5te=auto _armv6=auto _armv6t2=auto @@ -1333,6 +1334,8 @@ --disable-cmov) _cmov=no ;; --enable-fast-cmov) _fast_cmov=yes ;; --disable-fast-cmov) _fast_cmov=no ;; + --enable-fast-clz) _fast_clz=yes ;; + --disable-fast-clz) _fast_clz=no ;; --enable-altivec) _altivec=yes ;; --disable-altivec) _altivec=no ;; --enable-armv5te) _armv5te=yes ;; @@ -1818,7 +1821,9 @@ proc=k8 ;; - *) proc=amdfam10 iproc=686 ;; + *) proc=amdfam10 iproc=686 + test $_fast_clz = "auto" && _fast_clz=yes + ;; esac ;; GenuineIntel) @@ -1844,6 +1849,7 @@ else proc=i686 fi + test $_fast_clz = "auto" && _fast_clz=yes ;; 15) iproc=686 # A nocona in 32-bit mode has no more capabilities than a prescott. @@ -1851,6 +1857,7 @@ proc=prescott else proc=pentium4 + test $_fast_clz = "auto" && _fast_clz=yes fi test $_fast_cmov = "auto" && _fast_cmov=no ;; @@ -1889,6 +1896,7 @@ *) proc=i586 iproc=586 ;; esac + test $_fast_clz = "auto" && _fast_clz=no fi # test "$_runtime_cpudetection" = no @@ -2000,6 +2008,7 @@ else _fast_cmov="no" fi + test $_fast_clz = "auto" && _fast_clz=yes echores "$proc" ;; @@ -2029,7 +2038,9 @@ case "$pvendor" in AuthenticAMD) case "$pfamily" in - 15) proc=k8;; + 15) proc=k8 + test $_fast_clz = "auto" && _fast_clz=no + ;; *) proc=amdfam10;; esac ;; @@ -2041,6 +2052,7 @@ # have the same capabilities as a nocona. proc=nocona test $_fast_cmov = "auto" && _fast_cmov=no + test $_fast_clz = "auto" && _fast_clz=no ;; esac ;; @@ -2098,6 +2110,7 @@ _optimizing="$proc" test $_fast_cmov = "auto" && _fast_cmov=yes + test $_fast_clz = "auto" && _fast_clz=yes echores "$proc" ;; @@ -2141,6 +2154,7 @@ _target_arch='ARCH_AVR32 = yes' def_fast_unaligned='#define HAVE_FAST_UNALIGNED 1' iproc='avr32' + test $_fast_clz = "auto" && _fast_clz=yes ;; sh|sh4) @@ -2261,6 +2275,8 @@ echores "none" fi + test $_fast_clz = "auto" && _fast_clz=yes + ;; alpha*) @@ -2301,6 +2317,8 @@ _mcpu="-mcpu=$proc" echores "$proc" + test $_fast_clz = "auto" && _fast_clz=yes + _optimizing="$proc" ;; @@ -2327,6 +2345,8 @@ echores "$proc" fi + test $_fast_clz = "auto" && _fast_clz=yes + ;; hppa) @@ -2761,6 +2781,8 @@ fi echores "$_armv5te" + test $_armv5te = "yes" && test $_fast_clz = "auto" && _fast_clz=yes + echocheck "ARMv6 (SIMD instructions)" if test $_armv6 = "auto" ; then cat > $TMPC << EOF @@ -2812,7 +2834,7 @@ echores "$_iwmmxt" fi -_cpuexts_all='ALTIVEC MMX MMX2 AMD3DNOW AMD3DNOWEXT SSE SSE2 SSSE3 FAST_CMOV CMOV PLD ARMV5TE ARMV6 ARMV6T2 ARMVFP NEON IWMMXT MMI VIS MVI' +_cpuexts_all='ALTIVEC MMX MMX2 AMD3DNOW AMD3DNOWEXT SSE SSE2 SSSE3 FAST_CMOV CMOV FAST_CLZ PLD ARMV5TE ARMV6 ARMV6T2 ARMVFP NEON IWMMXT MMI VIS MVI' test "$_altivec" = yes && _cpuexts="ALTIVEC $_cpuexts" test "$_mmx" = yes && _cpuexts="MMX $_cpuexts" test "$_mmxext" = yes && _cpuexts="MMX2 $_cpuexts" @@ -2823,6 +2845,7 @@ test "$_ssse3" = yes && _cpuexts="SSSE3 $_cpuexts" test "$_cmov" = yes && _cpuexts="CMOV $_cpuexts" test "$_fast_cmov" = yes && _cpuexts="FAST_CMOV $_cpuexts" +test "$_fast_clz" = yes && _cpuexts="FAST_CLZ $_cpuexts" test "$pld" = yes && _cpuexts="PLD $_cpuexts" test "$_armv5te" = yes && _cpuexts="ARMV5TE $_cpuexts" test "$_armv6" = yes && _cpuexts="ARMV6 $_cpuexts" @@ -9141,7 +9164,6 @@ #endif #define HAVE_ATTRIBUTE_PACKED 1 -#define HAVE_FAST_CLZ 0 #define HAVE_GETHRTIME 0 #define HAVE_INLINE_ASM 1 #define HAVE_LDBRX 0