# HG changeset patch
# User gpoirier
# Date 1119125779 0
# Node ID da8f4e7e4b956f341d969f78b1c9164567509cc3
# Parent  f75ba7f7b7b248e5901ca39f96ce0fb56aa17a4c
GCC-4 fix for AMD-64
Warning: high cola-affinity here)

diff -r f75ba7f7b7b2 -r da8f4e7e4b95 postproc/swscale_template.c
--- a/postproc/swscale_template.c	Sat Jun 18 18:32:29 2005 +0000
+++ b/postproc/swscale_template.c	Sat Jun 18 20:16:19 2005 +0000
@@ -765,14 +765,14 @@
 		asm volatile(
 				YSCALEYUV2YV12X(0, CHR_MMX_FILTER_OFFSET)
 				:: "r" (&c->redDither),
-				"r" (uDest), "m" ((long)chrDstW)
+				"r" (uDest), "p" ((long)chrDstW)
 				: "%"REG_a, "%"REG_d, "%"REG_S
 			);
 
 		asm volatile(
 				YSCALEYUV2YV12X(4096, CHR_MMX_FILTER_OFFSET)
 				:: "r" (&c->redDither),
-				"r" (vDest), "m" ((long)chrDstW)
+				"r" (vDest), "p" ((long)chrDstW)
 				: "%"REG_a, "%"REG_d, "%"REG_S
 			);
 	}
@@ -780,7 +780,7 @@
 	asm volatile(
 			YSCALEYUV2YV12X(0, LUM_MMX_FILTER_OFFSET)
 			:: "r" (&c->redDither),
-			   "r" (dest), "m" ((long)dstW)
+			   "r" (dest), "p" ((long)dstW)
 			: "%"REG_a, "%"REG_d, "%"REG_S
 		);
 #else
@@ -2547,7 +2547,7 @@
 		"cmp %2, %%"REG_a"		\n\t"
 		" jb 1b				\n\t"
 
-		:: "m" (src1), "m" (dst), "m" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
+		:: "m" (src1), "m" (dst), "p" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
 		"r" (src2)
 		: "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi"
 		);