Mercurial > mplayer.hg
changeset 6254:034b12194350
rage128/radeon fixes, mach64 mess^H^H^H^Hcleanup, pm3 driver.
sync with mplayerxp
| author | arpi |
|---|---|
| date | Fri, 31 May 2002 23:17:43 +0000 |
| parents | 136c061fab12 |
| children | 140e94c4c89b |
| files | vidix/drivers/Makefile vidix/drivers/mach64.h vidix/drivers/pm3_regs.h vidix/drivers/pm3_vid.c vidix/drivers/radeon.h vidix/drivers/radeon_vid.c |
| diffstat | 6 files changed, 1818 insertions(+), 77 deletions(-) [+] |
line wrap: on
line diff
--- a/vidix/drivers/Makefile Fri May 31 22:41:02 2002 +0000 +++ b/vidix/drivers/Makefile Fri May 31 23:17:43 2002 +0000 @@ -17,6 +17,12 @@ RAGE128_LIBS=-L../../libdha -ldha RAGE128_CFLAGS=$(OPTFLAGS) -fPIC -I. -I.. -Wall -W -DRAGE128 +PM3_VID=pm3_vid.so +PM3_SRCS=pm3_vid.c +PM3_OBJS=pm3_vid.o +PM3_LIBS=-L../../libdha -ldha +PM3_CFLAGS=$(OPTFLAGS) -fPIC -I. -I.. -Wall -W + MACH64_VID=mach64_vid.so MACH64_SRCS=mach64_vid.c MACH64_OBJS=mach64_vid.o @@ -47,13 +53,19 @@ MGA_CRTC2_LIBS=-L../../libdha -ldha -lm MGA_CRTC2_CFLAGS=$(OPTFLAGS) -fPIC -I. -I.. -Wall -W -DCRTC2 -all: $(RADEON_VID) $(RAGE128_VID) $(MACH64_VID) $(NVIDIA_VID) $(GENFB_VID) $(MGA_VID) $(MGA_CRTC2_VID) +all: $(RADEON_VID) $(RAGE128_VID) $(MACH64_VID) $(NVIDIA_VID) $(GENFB_VID) $(MGA_VID) $(MGA_CRTC2_VID) $(PM3_VID) .SUFFIXES: .c .o # .PHONY: all clean +$(PM3_OBJS): $(PM3_SRCS) + $(CC) -c $(PM3_CFLAGS) -o $@ $< + +$(PM3_VID): $(PM3_OBJS) + $(LD) $(PM3_LIBS) -shared -soname $(PM3_VID) -o $(PM3_VID) $(PM3_OBJS) + $(RADEON_OBJS): $(RADEON_SRCS) $(CC) -c $(RADEON_CFLAGS) -o $@ $< @@ -105,11 +117,15 @@ dep: depend depend: - echo "depend not supported" +# do nothing here install: mkdir -p $(BINDIR) install -m 755 -s -p *.so $(BINDIR) +uninstall: + rm -f $(BINDIR)/*.so + rmdir -p --ignore-fail-on-non-empty $(BINDIR) + # # include dependency files if they exist #
--- a/vidix/drivers/mach64.h Fri May 31 22:41:02 2002 +0000 +++ b/vidix/drivers/mach64.h Fri May 31 23:17:43 2002 +0000 @@ -845,18 +845,19 @@ /* ? 0x80000000ul */ #define TV_OUT_DATA BlockIOTag(0x27u) /* LTPro */ #define BUS_CNTL IOPortTag(0x13u, 0x28u) -#define BUS_WS 0x0000000ful -#define BUS_DBL_RESYNC 0x00000001ul /* VTB/GTB/LT */ -#define BUS_MSTR_RESET 0x00000002ul /* VTB/GTB/LT */ -#define BUS_FLUSH_BUF 0x00000004ul /* VTB/GTB/LT */ -#define BUS_STOP_REQ_DIS 0x00000008ul /* VTB/GTB/LT */ -#define BUS_ROM_WS 0x000000f0ul -#define BUS_APER_REG_DIS 0x00000010ul /* VTB/GTB/LT */ -#define BUS_EXTRA_PIPE_DIS 0x00000020ul /* VTB/GTB/LT */ -#define BUS_MASTER_DIS 0x00000040ul /* VTB/GTB/LT */ -#define BUS_ROM_WRT_EN 0x00000080ul /* GTPro */ -#define BUS_ROM_PAGE 0x00000f00ul -#define BUS_MINOR_REV_ID 0x00000700ul /* LTPro */ +# define BUS_WS 0x0000000ful +# define BUS_DBL_RESYNC 0x00000001ul /* VTB/GTB/LT */ +# define BUS_MSTR_RESET 0x00000002ul /* VTB/GTB/LT */ +# define BUS_FLUSH_BUF 0x00000004ul /* VTB/GTB/LT */ +# define BUS_STOP_REQ_DIS 0x00000008ul /* VTB/GTB/LT */ +# define BUS_ROM_WS 0x000000f0ul +# define BUS_APER_REG_DIS 0x00000010ul /* VTB/GTB/LT */ +# define BUS_EXTRA_PIPE_DIS 0x00000020ul /* VTB/GTB/LT */ +# define BUS_MASTER_DIS 0x00000040ul /* VTB/GTB/LT */ +# define BUS_ROM_WRT_EN 0x00000080ul /* GTPro */ +# define BUS_ROM_PAGE 0x00000f00ul +# define BUS_MINOR_REV_ID 0x00000700ul /* LTPro */ +# define BUS_EXT_REG_EN 0x08000000ul /* First silicom - Prototype (A11) 0x00000000ul */ /* Metal mask spin (A12 & A13) 0x00000100ul */ /* All layer spin (A21) 0x00000200ul */ @@ -1283,20 +1284,24 @@ #define SRC_HEIGHT2 BlockIOTag(0x6bu) #define SRC_HEIGHT2_WIDTH2 BlockIOTag(0x6cu) #define SRC_CNTL BlockIOTag(0x6du) -#define SRC_PATT_EN 0x00000001ul -#define SRC_PATT_ROT_EN 0x00000002ul -#define SRC_LINEAR_EN 0x00000004ul -#define SRC_BYTE_ALIGN 0x00000008ul -#define SRC_LINE_X_DIR 0x00000010ul -#define SRC_8X8X8_BRUSH 0x00000020ul /* VTB/GTB */ -#define FAST_FILL_EN 0x00000040ul /* VTB/GTB */ -#define SRC_TRACK_DST 0x00000080ul /* VTB/GTB */ -#define BUS_MASTER_EN 0x00000100ul /* VTB/GTB */ -#define BUS_MASTER_SYNC 0x00000200ul /* VTB/GTB */ -#define BUS_MASTER_OP 0x00000c00ul /* VTB/GTB */ -#define SRC_8X8X8_BRUSH_LOADED 0x00001000ul /* VTB/GTB */ -#define COLOR_REG_WRITE_EN 0x00002000ul /* VTB/GTB */ -#define BLOCK_WRITE_EN 0x00004000ul /* VTB/GTB */ +# define SRC_PATT_EN 0x00000001ul +# define SRC_PATT_ROT_EN 0x00000002ul +# define SRC_LINEAR_EN 0x00000004ul +# define SRC_BYTE_ALIGN 0x00000008ul +# define SRC_LINE_X_DIR 0x00000010ul +# define SRC_8X8X8_BRUSH 0x00000020ul /* VTB/GTB */ +# define FAST_FILL_EN 0x00000040ul /* VTB/GTB */ +# define SRC_TRACK_DST 0x00000080ul /* VTB/GTB */ +# define BUS_MASTER_EN 0x00000100ul /* VTB/GTB */ +# define BUS_MASTER_SYNC 0x00000200ul /* VTB/GTB */ +# define BUS_MASTER_OP 0x00000c00ul /* VTB/GTB */ +# define BM_OP_FRAME_TO_SYSTEM (0 << 10) +# define BM_OP_SYSTEM_TO_FRAME (1 << 10) +# define BM_OP_REG_TO_SYSTEM (2 << 10) +# define BM_OP_SYSTEM_TO_REG (3 << 10) +# define SRC_8X8X8_BRUSH_LOADED 0x00001000ul /* VTB/GTB */ +# define COLOR_REG_WRITE_EN 0x00002000ul /* VTB/GTB */ +# define BLOCK_WRITE_EN 0x00004000ul /* VTB/GTB */ /* ? 0xffff8000ul */ /* ? BlockIOTag(0x6eu) */ /* ? BlockIOTag(0x6fu) */ @@ -1348,6 +1353,11 @@ #define BM_ADDR BlockIOTag(0x92u) /* VTB/GTB */ #define BM_DATA BlockIOTag(0x92u) /* VTB/GTB */ #define BM_GUI_TABLE_CMD BlockIOTag(0x93u) /* GTPro */ +# define CIRCULAR_BUF_SIZE_16KB (0 << 0) +# define CIRCULAR_BUF_SIZE_32KB (1 << 0) +# define CIRCULAR_BUF_SIZE_64KB (2 << 0) +# define CIRCULAR_BUF_SIZE_128KB (3 << 0) +# define LAST_DESCRIPTOR (1 << 31) /* ? BlockIOTag(0x94u) */ /* ? BlockIOTag(0x95u) */ /* ? BlockIOTag(0x96u) */ @@ -1409,21 +1419,57 @@ #define DP_C14_RGB_HIGH_NIBBLE 0x08000000ul /* GTB */ #define DP_SCALE_PIX_WIDTH 0xf0000000ul /* GTB */ #define DP_MIX BlockIOTag(0xb5u) -#define DP_BKGD_MIX 0x0000001ful -/* ? 0x0000ffe0ul */ -#define DP_FRGD_MIX 0x001f0000ul -/* ? 0xffe00000ul */ +# define BKGD_MIX_NOT_D (0 << 0) +# define BKGD_MIX_ZERO (1 << 0) +# define BKGD_MIX_ONE (2 << 0) +# define BKGD_MIX_D (3 << 0) +# define BKGD_MIX_NOT_S (4 << 0) +# define BKGD_MIX_D_XOR_S (5 << 0) +# define BKGD_MIX_NOT_D_XOR_S (6 << 0) +# define BKGD_MIX_S (7 << 0) +# define BKGD_MIX_NOT_D_OR_NOT_S (8 << 0) +# define BKGD_MIX_D_OR_NOT_S (9 << 0) +# define BKGD_MIX_NOT_D_OR_S (10 << 0) +# define BKGD_MIX_D_OR_S (11 << 0) +# define BKGD_MIX_D_AND_S (12 << 0) +# define BKGD_MIX_NOT_D_AND_S (13 << 0) +# define BKGD_MIX_D_AND_NOT_S (14 << 0) +# define BKGD_MIX_NOT_D_AND_NOT_S (15 << 0) +# define BKGD_MIX_D_PLUS_S_DIV2 (23 << 0) +# define FRGD_MIX_NOT_D (0 << 16) +# define FRGD_MIX_ZERO (1 << 16) +# define FRGD_MIX_ONE (2 << 16) +# define FRGD_MIX_D (3 << 16) +# define FRGD_MIX_NOT_S (4 << 16) +# define FRGD_MIX_D_XOR_S (5 << 16) +# define FRGD_MIX_NOT_D_XOR_S (6 << 16) +# define FRGD_MIX_S (7 << 16) +# define FRGD_MIX_NOT_D_OR_NOT_S (8 << 16) +# define FRGD_MIX_D_OR_NOT_S (9 << 16) +# define FRGD_MIX_NOT_D_OR_S (10 << 16) +# define FRGD_MIX_D_OR_S (11 << 16) +# define FRGD_MIX_D_AND_S (12 << 16) +# define FRGD_MIX_NOT_D_AND_S (13 << 16) +# define FRGD_MIX_D_AND_NOT_S (14 << 16) +# define FRGD_MIX_NOT_D_AND_NOT_S (15 << 16) +# define FRGD_MIX_D_PLUS_S_DIV2 (23 << 16) #define DP_SRC BlockIOTag(0xb6u) -#define DP_BKGD_SRC 0x00000007ul -/* ? 0x000000feul */ -#define DP_FRGD_SRC 0x00000700ul -/* ? 0x0000fe00ul */ -#define DP_MONO_SRC 0x00030000ul -#define DP_MONO_SRC_ALLONES 0x00000000ul -#define DP_MONO_SRC_PATTERN 0x00010000ul -#define DP_MONO_SRC_HOST 0x00020000ul -#define DP_MONO_SRC_BLIT 0x00030000ul -/* ? 0xfffc0000ul */ +# define BKGD_SRC_BKGD_CLR (0 << 0) +# define BKGD_SRC_FRGD_CLR (1 << 0) +# define BKGD_SRC_HOST (2 << 0) +# define BKGD_SRC_BLIT (3 << 0) +# define BKGD_SRC_PATTERN (4 << 0) +# define BKGD_SRC_3D (5 << 0) +# define FRGD_SRC_BKGD_CLR (0 << 8) +# define FRGD_SRC_FRGD_CLR (1 << 8) +# define FRGD_SRC_HOST (2 << 8) +# define FRGD_SRC_BLIT (3 << 8) +# define FRGD_SRC_PATTERN (4 << 8) +# define FRGD_SRC_3D (5 << 8) +# define MONO_SRC_ONE (0 << 16) +# define MONO_SRC_PATTERN (1 << 16) +# define MONO_SRC_HOST (2 << 16) +# define MONO_SRC_BLIT (3 << 16) #define DP_FRGD_CLR_MIX BlockIOTag(0xb7u) /* VTB/GTB */ #define DP_FRGD_BKGD_CLR BlockIOTag(0xb8u) /* VTB/GTB */ /* ? BlockIOTag(0xb9u) */ @@ -1677,12 +1723,16 @@ #define GUI_CMDFIFO_DEBUG BlockIOTag(0x15cu) /* GT2c/VT4 */ #define GUI_CMDFIFO_DATA BlockIOTag(0x15du) /* GT2c/VT4 */ #define GUI_CNTL BlockIOTag(0x15eu) /* GT2c/VT4 */ -#define CMDFIFO_SIZE_MODE 0x00000003ul +# define CMDFIFO_SIZE_MASK 0x00000003ul +# define CMDFIFO_SIZE_192 0x00000000ul +# define CMDFIFO_SIZE_128 0x00000001ul +# define CMDFIFO_SIZE_64 0x00000002ul /* ? 0x0000fffcul */ -#define IDCT_PRSR_MODE 0x00010000ul /* XL/XC */ -#define IDCT_BLOCK_GUI_INITIATOR 0x00020000ul /* XL/XC */ +# define IDCT_PRSR_MODE 0x00010000ul /* XL/XC */ +# define IDCT_BLOCK_GUI_INITIATOR 0x00020000ul /* XL/XC */ /* ? 0xfffc0000ul */ /* ? BlockIOTag(0x15fu) */ +/* BUS MASTERING */ #define BM_FRAME_BUF_OFFSET BlockIOTag(0x160u) /* VTB/GTB */ #define BM_SYSTEM_MEM_ADDR BlockIOTag(0x161u) /* VTB/GTB */ #define BM_COMMAND BlockIOTag(0x162u) /* VTB/GTB */ @@ -1699,6 +1749,14 @@ /* ? BlockIOTag(0x16du) */ #define BM_GUI_TABLE BlockIOTag(0x16eu) /* VTB/GTB */ #define BM_SYSTEM_TABLE BlockIOTag(0x16fu) /* VTB/GTB */ +# define DMA_GUI_COMMAND__BYTE_COUNT_MASK 0x001fffff +# define DMA_GUI_COMMAND__HOLD_VIDEO_OFFSET 0x40000000 +# define DMA_GUI_COMMAND__EOL 0x80000000 +# define SYSTEM_TRIGGER_SYSTEM_TO_VIDEO 0x0 +# define SYSTEM_TRIGGER_VIDEO_TO_SYSTEM 0x1 +# define SYSTEM_TRIGGER_VIDEO_TO_SYSTEM_AFTER_BUF0_READY 0x2 +# define SYSTEM_TRIGGER_VIDEO_TO_SYSTEM_AFTER_BUF1_READY 0x3 +# define SYSTEM_TRIGGER_VIDEO_TO_SYSTEM_AFTER_SNAPSHOT_READY 0x4 /* ? BlockIOTag(0x170u) */ /* ? BlockIOTag(0x171u) */ /* ? BlockIOTag(0x172u) */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/vidix/drivers/pm3_regs.h Fri May 31 23:17:43 2002 +0000 @@ -0,0 +1,1113 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_regs.h,v 1.9 2001/11/20 00:09:15 alanh Exp $ */ + +/* + * glint register file + * + * Copyright by Sven Luther + * Authors: Sven Luther, <luther@dpt-info.u-strasbg.fr> + * Thomas Witzel, <twitzel@nmr.mgh.harvard.edu> + * + * this work is sponsored by Appian Graphics. + * + */ + +#ifndef _PM3_REG_H_ +#define _PM3_REG_H_ + +/********************************************** +* GLINT Permedia3 Control Status registers * +***********************************************/ +/* Control Status Registers */ +#define PM3ResetStatus 0x0000 +#define PM3IntEnable 0x0008 +#define PM3IntFlags 0x0010 +#define PM3InFIFOSpace 0x0018 +#define PM3OutFIFOWords 0x0020 +#define PM3DMAAddress 0x0028 +#define PM3DMACount 0x0030 +#define PM3ErrorFlags 0x0038 +#define PM3VClkCtl 0x0040 +#define PM3TestRegister 0x0048 +#define PM3Aperture0 0x0050 +#define PM3Aperture1 0x0058 +#define PM3DMAControl 0x0060 +#define PM3FIFODis 0x0068 +#define PM3ChipConfig 0x0070 +#define PM3AGPControl 0x0078 + +#define PM3GPOutDMAAddress 0x0080 +#define PM3PCIFeedbackCount 0x0088 +#define PM3PCIAbortStatus 0x0090 +#define PM3PCIAbortAddress 0x0098 + +#define PM3PCIPLLStatus 0x00f0 + +#define PM3HostTextureAddress 0x0100 +#define PM3TextureDownloadControl 0x0108 +#define PM3TextureOperation 0x0110 +#define PM3LogicalTexturePage 0x0118 +#define PM3TexDMAAddress 0x0120 +#define PM3TexFIFOSpace 0x0128 + +/********************************************** +* GLINT Permedia3 Region 0 Bypass Controls * +***********************************************/ +#define PM3ByAperture1Mode 0x0300 + #define PM3ByApertureMode_BYTESWAP_ABCD (0<<0) + #define PM3ByApertureMode_BYTESWAP_BADC (1<<0) + #define PM3ByApertureMode_BYTESWAP_CDAB (2<<0) + #define PM3ByApertureMode_BYTESWAP_DCBA (3<<0) + #define PM3ByApertureMode_PATCH_DISABLE (0<<2) + #define PM3ByApertureMode_PATCH_ENABLE (1<<2) + #define PM3ByApertureMode_FORMAT_RAW (0<<3) + #define PM3ByApertureMode_FORMAT_YUYV (1<<3) + #define PM3ByApertureMode_FORMAT_UYVY (2<<3) + #define PM3ByApertureMode_PIXELSIZE_8BIT (0<<5) + #define PM3ByApertureMode_PIXELSIZE_16BIT (1<<5) + #define PM3ByApertureMode_PIXELSIZE_32BIT (2<<5) + #define PM3ByApertureMode_EFFECTIVE_STRIDE_1024 (0<<7) + #define PM3ByApertureMode_EFFECTIVE_STRIDE_2048 (1<<7) + #define PM3ByApertureMode_EFFECTIVE_STRIDE_4096 (2<<7) + #define PM3ByApertureMode_EFFECTIVE_STRIDE_8192 (3<<7) + #define PM3ByApertureMode_PATCH_OFFSET_X(off) (((off)&7f)<<9) + #define PM3ByApertureMode_PATCH_OFFSET_Y(off) (((off)&7f)<<16) + #define PM3ByApertureMode_FRAMEBUFFER (0<<21) + #define PM3ByApertureMode_LOCALBUFFER (1<<21) + #define PM3ByApertureMode_DOUBLE_WRITE_OFF (0<<22) + #define PM3ByApertureMode_DOUBLE_WRITE_1MB (1<<22) + #define PM3ByApertureMode_DOUBLE_WRITE_2MB (2<<22) + #define PM3ByApertureMode_DOUBLE_WRITE_4MB (3<<22) + #define PM3ByApertureMode_DOUBLE_WRITE_8MB (4<<22) + #define PM3ByApertureMode_DOUBLE_WRITE_16MB (5<<22) + #define PM3ByApertureMode_DOUBLE_WRITE_32MB (6<<22) + +#define PM3ByAperture2Mode 0x0328 + +/********************************************** +* GLINT Permedia3 Memory Control (0x1000) * +***********************************************/ +#define PM3MemCounter 0x1000 +#define PM3MemBypassWriteMask 0x1008 +#define PM3MemScratch 0x1010 +#define PM3LocalMemCaps 0x1018 + #define PM3LocalMemCaps_NoWriteMask (1<<28) +#define PM3LocalMemTimings 0x1020 +#define PM3LocalMemControl 0x1028 +#define PM3LocalMemRefresh 0x1030 +#define PM3LocalMemPowerDown 0x1038 +#define PM3RemoteMemControl 0x1100 + +/********************************************** +* GLINT Permedia3 Video Control (0x3000) * +***********************************************/ + +#define PM3ScreenBase 0x3000 +#define PM3ScreenStride 0x3008 +#define PM3HTotal 0x3010 +#define PM3HgEnd 0x3018 +#define PM3HbEnd 0x3020 +#define PM3HsStart 0x3028 +#define PM3HsEnd 0x3030 +#define PM3VTotal 0x3038 +#define PM3VbEnd 0x3040 +#define PM3VsStart 0x3048 +#define PM3VsEnd 0x3050 +#define PM3VideoControl 0x3058 + #define PM3VideoControl_DISABLE (0<<0) + #define PM3VideoControl_ENABLE (1<<0) + #define PM3VideoControl_BLANK_ACTIVE_HIGH (0<<1) + #define PM3VideoControl_BLANK_ACTIVE_LOW (1<<1) + #define PM3VideoControl_LINE_DOUBLE_OFF (0<<2) + #define PM3VideoControl_LINE_DOUBLE_ON (1<<2) + #define PM3VideoControl_HSYNC_FORCE_HIGH (0<<3) + #define PM3VideoControl_HSYNC_ACTIVE_HIGH (1<<3) + #define PM3VideoControl_HSYNC_FORCE_LOW (2<<3) + #define PM3VideoControl_HSYNC_ACTIVE_LOW (3<<3) + #define PM3VideoControl_VSYNC_FORCE_HIGH (0<<5) + #define PM3VideoControl_VSYNC_ACTIVE_HIGH (1<<5) + #define PM3VideoControl_VSYNC_FORCE_LOW (2<<5) + #define PM3VideoControl_VSYNC_ACTIVE_LOW (3<<5) + #define PM3VideoControl_BYTE_DOUBLE_OFF (0<<7) + #define PM3VideoControl_BYTE_DOUBLE_ON (1<<7) + #define PM3VideoControl_BUFFER_SWAP_SYNCON_FRAMEBLANK (0<<9) + #define PM3VideoControl_BUFFER_SWAP_FREE_RUNNING (1<<9) + #define PM3VideoControl_BUFFER_SWAP_LIMITETO_FRAMERATE (2<<9) + #define PM3VideoControl_STEREO_DISABLE (0<<11) + #define PM3VideoControl_STEREO_ENABLE (1<<11) + #define PM3VideoControl_RIGHT_EYE_ACTIVE_HIGH (0<<12) + #define PM3VideoControl_RIGHT_EYE_ACTIVE_LOW (1<<12) + #define PM3VideoControl_VIDEO_EXT_LOW (0<<14) + #define PM3VideoControl_VIDEO_EXT_HIGH (1<<14) + #define PM3VideoControl_SYNC_MODE_INDEPENDENT (0<<16) + #define PM3VideoControl_SYNC_MODE_SYNCTO_VSA (1<<16) + #define PM3VideoControl_SYNC_MODE_SYNCTO_VSB (2<<16) + #define PM3VideoControl_PATCH_DISABLE (0<<18) + #define PM3VideoControl_PATCH_ENABLE (1<<18) + #define PM3VideoControl_PIXELSIZE_8BIT (0<<19) + #define PM3VideoControl_PIXELSIZE_16BIT (1<<19) + #define PM3VideoControl_PIXELSIZE_32BIT (2<<19) + #define PM3VideoControl_DISPLAY_DISABLE (0<<21) + #define PM3VideoControl_DISPLAY_ENABLE (1<<21) + #define PM3VideoControl_PATCH_OFFSET_X(off) (((off)&0x3f)<<22) + #define PM3VideoControl_PATCH_OFFSET_Y(off) (((off)&0x3f)<<28) +#define PM3InterruptLine 0x3060 +#define PM3DisplayData 0x3068 +#define PM3VerticalLineCount 0x3070 +#define PM3FifoControl 0x3078 +#define PM3ScreenBaseRight 0x3080 +#define PM3MiscControl 0x3088 + +#define PM3VideoOverlayUpdate 0x3100 + #define PM3VideoOverlayUpdate_DISABLE (0<<0) + #define PM3VideoOverlayUpdate_ENABLE (1<<0) +#define PM3VideoOverlayMode 0x3108 + #define PM3VideoOverlayMode_DISABLE (0<<0) + #define PM3VideoOverlayMode_ENABLE (1<<0) + #define PM3VideoOverlayMode_BUFFERSYNC_MANUAL (0<<1) + #define PM3VideoOverlayMode_BUFFERSYNC_VIDEOSTREAMA (1<<1) + #define PM3VideoOverlayMode_BUFFERSYNC_VIDEOSTREAMB (2<<1) + #define PM3VideoOverlayMode_FIELDPOLARITY_NORMAL (0<<4) + #define PM3VideoOverlayMode_FIELDPOLARITY_INVERT (1<<4) + #define PM3VideoOverlayMode_PIXELSIZE_8BIT (0<<5) + #define PM3VideoOverlayMode_PIXELSIZE_16BIT (1<<5) + #define PM3VideoOverlayMode_PIXELSIZE_32BIT (2<<5) + #define PM3VideoOverlayMode_COLORFORMAT_RGB8888 ((0<<7)|(1<<12)|(2<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_RGB4444 ((1<<7)|(1<<12)|(1<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_RGB5551 ((2<<7)|(1<<12)|(1<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_RGB565 ((3<<7)|(1<<12)|(1<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_RGB332 ((4<<7)|(1<<12)|(0<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_BGR8888 ((0<<7)|(2<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_BGR4444 ((1<<7)|(1<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_BGR5551 ((2<<7)|(1<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_BGR565 ((3<<7)|(1<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_BGR332 ((4<<7)|(0<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_CI8 ((5<<7)|(1<<12)|(0<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_VUY444 ((2<<10)|(1<<12)|(2<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_YUV444 ((2<<10)|(2<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_VUY422 ((1<<10)|(1<<12)|(1<<5)) + #define PM3VideoOverlayMode_COLORFORMAT_YUV422 ((1<<10)|(1<<5)) + #define PM3VideoOverlayMode_COLORORDER_BGR (0<<12) + #define PM3VideoOverlayMode_COLORORDER_RGB (1<<12) + #define PM3VideoOverlayMode_LINEARCOLOREXT_OFF (0<<13) + #define PM3VideoOverlayMode_LINEARCOLOREXT_ON (1<<13) + #define PM3VideoOverlayMode_FILTER_MASK (3<<14) + #define PM3VideoOverlayMode_FILTER_OFF (0<<14) + #define PM3VideoOverlayMode_FILTER_FULL (1<<14) + #define PM3VideoOverlayMode_FILTER_PARTIAL (2<<14) + #define PM3VideoOverlayMode_DEINTERLACE_OFF (0<<16) + #define PM3VideoOverlayMode_DEINTERLACE_BOB (1<<16) + #define PM3VideoOverlayMode_PATCHMODE_OFF (0<<18) + #define PM3VideoOverlayMode_PATCHMODE_ON (1<<18) + #define PM3VideoOverlayMode_FLIP_VIDEO (0<<20) + #define PM3VideoOverlayMode_FLIP_VIDEOSTREAMA (1<<20) + #define PM3VideoOverlayMode_FLIP_VIDEOSTREAMB (2<<20) + #define PM3VideoOverlayMode_MIRROR_MASK (3<<23) + #define PM3VideoOverlayMode_MIRRORX_OFF (0<<23) + #define PM3VideoOverlayMode_MIRRORX_ON (1<<23) + #define PM3VideoOverlayMode_MIRRORY_OFF (0<<24) + #define PM3VideoOverlayMode_MIRRORY_ON (1<<24) +#define PM3VideoOverlayFifoControl 0x3110 +#define PM3VideoOverlayIndex 0x3118 +#define PM3VideoOverlayBase 0x3120 +#define PM3VideoOverlayBase0 0x3120 +#define PM3VideoOverlayBase1 0x3128 +#define PM3VideoOverlayBase2 0x3130 +#define PM3VideoOverlayStride 0x3138 + #define PM3VideoOverlayStride_STRIDE(s) (((s)&0xfff)<<0) +#define PM3VideoOverlayWidth 0x3140 + #define PM3VideoOverlayWidth_WIDTH(w) (((w)&0xfff)<<0) +#define PM3VideoOverlayHeight 0x3148 + #define PM3VideoOverlayHeight_HEIGHT(h) (((h)&0xfff)<<0) +#define PM3VideoOverlayOrigin 0x3150 + #define PM3VideoOverlayOrigin_XORIGIN(x) (((x)&0xfff)<<0) + #define PM3VideoOverlayOrigin_YORIGIN(y) (((y)&0xfff)<<16) +#define PM3VideoOverlayShrinkXDelta 0x3158 + #define PM3VideoOverlayShrinkXDelta_NONE (1<<16) + #define PM3VideoOverlayShrinkXDelta_DELTA(s,d) \ + ((((s)<<16)/(d))&0x0ffffff0) +#define PM3VideoOverlayZoomXDelta 0x3160 + #define PM3VideoOverlayZoomXDelta_NONE (1<<16) + #define PM3VideoOverlayZoomXDelta_DELTA(s,d) \ + ((((s)<<16)/(d))&0x0001fff0) +#define PM3VideoOverlayYDelta 0x3168 + #define PM3VideoOverlayYDelta_NONE (1<<16) + #define PM3VideoOverlayYDelta_DELTA(s,d) \ + ((((s)<<16)/(d))&0x0ffffff0) +#define PM3VideoOverlayFieldOffset 0x3170 +#define PM3VideoOverlayStatus 0x3178 + +/********************************************** +* GLINT Permedia3 RAMDAC Registers (0x4000) * +***********************************************/ +/* Direct Registers */ +#define PM3RD_PaletteWriteAddress 0x4000 +#define PM3RD_PaletteData 0x4008 +#define PM3RD_PixelMask 0x4010 +#define PM3RD_PaletteReadAddress 0x4018 + +#define PM3RD_IndexLow 0x4020 +#define PM3RD_IndexHigh 0x4028 +#define PM3RD_IndexedData 0x4030 +#define PM3RD_IndexControl 0x4038 + #define PM3RD_IndexControl_AUTOINCREMENT_ENABLE (1<<0) + #define PM3RD_IndexControl_AUTOINCREMENT_DISABLE (0<<0) + +/* Indirect Registers */ +#define PM3RD_MiscControl 0x000 + #define PM3RD_MiscControl_HIGHCOLOR_RES_DISABLE (0<<0) + #define PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE (1<<0) + #define PM3RD_MiscControl_PIXELDOUBLE_DISABLE (0<<1) + #define PM3RD_MiscControl_PIXELDOUBLE_ENABLE (1<<1) + #define PM3RD_MiscControl_LASTREAD_ADDR_DISABLE (0<<2) + #define PM3RD_MiscControl_LASTREAD_ADDR_ENABLE (1<<2) + #define PM3RD_MiscControl_DIRECTCOLOR_DISABLE (0<<3) + #define PM3RD_MiscControl_DIRECTCOLOR_ENABLE (1<<3) + #define PM3RD_MiscControl_OVERLAY_DISABLE (0<<4) + #define PM3RD_MiscControl_OVERLAY_ENABLE (1<<4) + #define PM3RD_MiscControl_PIXELDOUBLE_BUFFER_DISABLE (0<<5) + #define PM3RD_MiscControl_PIXELDOUBLE_BUFFER_ENABLE (1<<5) + #define PM3RD_MiscControl_VSB_OUTPUT_DISABLE (0<<6) + #define PM3RD_MiscControl_VSB_OUTPUT_ENABLE (1<<6) + #define PM3RD_MiscControl_STEREODOUBLE_BUFFER_DISABLE (0<<7) + #define PM3RD_MiscControl_STEREODOUBLE_BUFFER_ENABLE (1<<7) +#define PM3RD_SyncControl 0x001 + #define PM3RD_SyncControl_HSYNC_ACTIVE_LOW (0<<0) + #define PM3RD_SyncControl_HSYNC_ACTIVE_HIGH (1<<0) + #define PM3RD_SyncControl_HSYNC_FORCE_ACTIVE (3<<0) + #define PM3RD_SyncControl_HSYNC_FORCE_INACTIVE (4<<0) + #define PM3RD_SyncControl_HSYNC_TRI_STATE (2<<0) + #define PM3RD_SyncControl_VSYNC_ACTIVE_LOW (0<<3) + #define PM3RD_SyncControl_VSYNC_ACTIVE_HIGH (1<<3) + #define PM3RD_SyncControl_VSYNC_TRI_STATE (2<<3) + #define PM3RD_SyncControl_VSYNC_FORCE_ACTIVE (3<<3) + #define PM3RD_SyncControl_VSYNC_FORCE_INACTIVE (4<<3) + #define PM3RD_SyncControl_HSYNC_OVERRIDE_SETBY_HSYNC (0<<6) + #define PM3RD_SyncControl_HSYNC_OVERRIDE_FORCE_HIGH (1<<6) + #define PM3RD_SyncControl_VSYNC_OVERRIDE_SETBY_VSYNC (0<<7) + #define PM3RD_SyncControl_VSYNC_OVERRIDE_FORCE_HIGH (1<<7) +#define PM3RD_DACControl 0x002 + #define PM3RD_DACControl_DAC_POWER_ON (0<<0) + #define PM3RD_DACControl_DAC_POWER_OFF (1<<0) + #define PM3RD_DACControl_SYNC_ON_GREEN_DISABLE (0<<3) + #define PM3RD_DACControl_SYNC_ON_GREEN_ENABLE (1<<3) + #define PM3RD_DACControl_BLANK_RED_DAC_DISABLE (0<<4) + #define PM3RD_DACControl_BLANK_RED_DAC_ENABLE (1<<4) + #define PM3RD_DACControl_BLANK_GREEN_DAC_DISABLE (0<<5) + #define PM3RD_DACControl_BLANK_GREEN_DAC_ENABLE (1<<5) + #define PM3RD_DACControl_BLANK_BLUE_DAC_DISABLE (0<<6) + #define PM3RD_DACControl_BLANK_BLUE_DAC_ENABLE (1<<6) + #define PM3RD_DACControl_BLANK_PEDESTAL_DISABLE (0<<7) + #define PM3RD_DACControl_BLANK_PEDESTAL_ENABLE (1<<7) +#define PM3RD_PixelSize 0x003 + #define PM3RD_PixelSize_24_BIT_PIXELS (4<<0) + #define PM3RD_PixelSize_32_BIT_PIXELS (2<<0) + #define PM3RD_PixelSize_16_BIT_PIXELS (1<<0) + #define PM3RD_PixelSize_8_BIT_PIXELS (0<<0) +#define PM3RD_ColorFormat 0x004 + #define PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE (1<<6) + #define PM3RD_ColorFormat_LINEAR_COLOR_EXT_DISABLE (0<<6) + #define PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW (1<<5) + #define PM3RD_ColorFormat_COLOR_ORDER_RED_LOW (0<<5) + #define PM3RD_ColorFormat_COLOR_FORMAT_MASK (0x1f<<0) + #define PM3RD_ColorFormat_8888_COLOR (0<<0) + #define PM3RD_ColorFormat_5551_FRONT_COLOR (1<<0) + #define PM3RD_ColorFormat_4444_COLOR (2<<0) + #define PM3RD_ColorFormat_332_FRONT_COLOR (5<<0) + #define PM3RD_ColorFormat_332_BACK_COLOR (6<<0) + #define PM3RD_ColorFormat_2321_FRONT_COLOR (9<<0) + #define PM3RD_ColorFormat_2321_BACK_COLOR (10<<0) + #define PM3RD_ColorFormat_232_FRONTOFF_COLOR (11<<0) + #define PM3RD_ColorFormat_232_BACKOFF_COLOR (12<<0) + #define PM3RD_ColorFormat_5551_BACK_COLOR (13<<0) + #define PM3RD_ColorFormat_CI8_COLOR (14<<0) + #define PM3RD_ColorFormat_565_FRONT_COLOR (16<<0) + #define PM3RD_ColorFormat_565_BACK_COLOR (17<<0) +#define PM3RD_CursorMode 0x005 + #define PM3RD_CursorMode_CURSOR_DISABLE (0<<0) + #define PM3RD_CursorMode_CURSOR_ENABLE (1<<0) + #define PM3RD_CursorMode_FORMAT_64x64_2BPE_P0123 (0<<2) + #define PM3RD_CursorMode_FORMAT_32x32_2BPE_P0 (1<<2) + #define PM3RD_CursorMode_FORMAT_32x32_2BPE_P1 (2<<2) + #define PM3RD_CursorMode_FORMAT_32x32_2BPE_P2 (3<<2) + #define PM3RD_CursorMode_FORMAT_32x32_2BPE_P3 (4<<2) + #define PM3RD_CursorMode_FORMAT_32x32_4BPE_P01 (5<<2) + #define PM3RD_CursorMode_FORMAT_32x32_4BPE_P23 (6<<2) + #define PM3RD_CursorMode_TYPE_MS (0<<4) + #define PM3RD_CursorMode_TYPE_X (1<<4) + #define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_DISABLE (0<<6) + #define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_ENABLE (1<<6) + #define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_3_COLOR (2<<6) + #define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_15_COLOR (3<<6) +#define PM3RD_CursorControl 0x006 + #define PM3RD_CursorControl_DOUBLE_X_DISABLED (0<<0) + #define PM3RD_CursorControl_DOUBLE_X_ENABLED (1<<0) + #define PM3RD_CursorControl_DOUBLE_Y_DISABLED (0<<1) + #define PM3RD_CursorControl_DOUBLE_Y_ENABLED (1<<1) + #define PM3RD_CursorControl_READBACK_POS_DISABLED (0<<2) + #define PM3RD_CursorControl_READBACK_POS_ENABLED (1<<2) + +#define PM3RD_CursorXLow 0x007 +#define PM3RD_CursorXHigh 0x008 +#define PM3RD_CursorYLow 0x009 +#define PM3RD_CursorYHigh 0x00a +#define PM3RD_CursorHotSpotX 0x00b +#define PM3RD_CursorHotSpotY 0x00c +#define PM3RD_OverlayKey 0x00d +#define PM3RD_Pan 0x00e + #define PM3RD_Pan_DISABLE (0<<0) + #define PM3RD_Pan_ENABLE (1<<0) + #define PM3RD_Pan_GATE_DISABLE (0<<1) + #define PM3RD_Pan_GATE_ENABLE (1<<1) +#define PM3RD_Sense 0x00f + +#define PM3RD_CheckControl 0x018 + #define PM3RD_CheckControl_PIXEL_DISABLED (0<<0) + #define PM3RD_CheckControl_PIXEL_ENABLED (1<<0) + #define PM3RD_CheckControl_LUT_DISABLED (0<<1) + #define PM3RD_CheckControl_LUT_ENABLED (1<<1) +#define PM3RD_CheckPixelRed 0x019 +#define PM3RD_CheckPixelGreen 0x01a +#define PM3RD_CheckPixelBlue 0x01b +#define PM3RD_CheckLUTRed 0x01c +#define PM3RD_CheckLUTGreen 0x01d +#define PM3RD_CheckLUTBlue 0x01e +#define PM3RD_Scratch 0x01f + +#define PM3RD_VideoOverlayControl 0x020 + #define PM3RD_VideoOverlayControl_DISABLE (0<<0) + #define PM3RD_VideoOverlayControl_ENABLE (1<<0) + #define PM3RD_VideoOverlayControl_MODE_MASK (3<<1) + #define PM3RD_VideoOverlayControl_MODE_MAINKEY (0<<1) + #define PM3RD_VideoOverlayControl_MODE_OVERLAYKEY (1<<1) + #define PM3RD_VideoOverlayControl_MODE_ALWAYS (2<<1) + #define PM3RD_VideoOverlayControl_MODE_BLEND (3<<1) + #define PM3RD_VideoOverlayControl_DIRECTCOLOR_DISABLED (0<<3) + #define PM3RD_VideoOverlayControl_DIRECTCOLOR_ENABLED (1<<3) + #define PM3RD_VideoOverlayControl_BLENDSRC_MAIN (0<<4) + #define PM3RD_VideoOverlayControl_BLENDSRC_REGISTER (1<<4) + #define PM3RD_VideoOverlayControl_KEY_COLOR (0<<5) + #define PM3RD_VideoOverlayControl_KEY_ALPHA (1<<5) +#define PM3RD_VideoOverlayXStartLow 0x021 +#define PM3RD_VideoOverlayXStartHigh 0x022 +#define PM3RD_VideoOverlayYStartLow 0x023 +#define PM3RD_VideoOverlayYStartHigh 0x024 +#define PM3RD_VideoOverlayXEndLow 0x025 +#define PM3RD_VideoOverlayXEndHigh 0x026 +#define PM3RD_VideoOverlayYEndLow 0x027 +#define PM3RD_VideoOverlayYEndHigh 0x028 +#define PM3RD_VideoOverlayKeyR 0x029 +#define PM3RD_VideoOverlayKeyG 0x02a +#define PM3RD_VideoOverlayKeyB 0x02b +#define PM3RD_VideoOverlayBlend 0x02c + #define PM3RD_VideoOverlayBlend_FACTOR_0_PERCENT (0<<6) + #define PM3RD_VideoOverlayBlend_FACTOR_25_PERCENT (1<<6) + #define PM3RD_VideoOverlayBlend_FACTOR_75_PERCENT (2<<6) + #define PM3RD_VideoOverlayBlend_FACTOR_100_PERCENT (3<<6) + +#define PM3RD_DClkSetup1 0x1f0 +#define PM3RD_DClkSetup2 0x1f1 +#define PM3RD_KClkSetup1 0x1f2 +#define PM3RD_KClkSetup2 0x1f3 + +#define PM3RD_DClkControl 0x200 + #define PM3RD_DClkControl_SOURCE_PLL (0<<4) + #define PM3RD_DClkControl_SOURCE_VSA (1<<4) + #define PM3RD_DClkControl_SOURCE_VSB (2<<4) + #define PM3RD_DClkControl_SOURCE_EXT (3<<4) + #define PM3RD_DClkControl_STATE_RUN (2<<2) + #define PM3RD_DClkControl_STATE_HIGH (1<<2) + #define PM3RD_DClkControl_STATE_LOW (0<<2) + #define PM3RD_DClkControl_LOCKED (1<<1) + #define PM3RD_DClkControl_NOT_LOCKED (0<<1) + #define PM3RD_DClkControl_ENABLE (1<<0) + #define PM3RD_DClkControl_DISABLE (0<<0) +#define PM3RD_DClk0PreScale 0x201 +#define PM3RD_DClk0FeedbackScale 0x202 +#define PM3RD_DClk0PostScale 0x203 +#define PM3RD_DClk1PreScale 0x204 +#define PM3RD_DClk1FeedbackScale 0x205 +#define PM3RD_DClk1PostScale 0x206 +#define PM3RD_DClk2PreScale 0x207 +#define PM3RD_DClk2FeedbackScale 0x208 +#define PM3RD_DClk2PostScale 0x209 +#define PM3RD_DClk3PreScale 0x20a +#define PM3RD_DClk3FeedbackScale 0x20b +#define PM3RD_DClk3PostScale 0x20c +#define PM3RD_KClkControl 0x20d + #define PM3RD_KClkControl_DISABLE (0<<0) + #define PM3RD_KClkControl_ENABLE (1<<0) + #define PM3RD_KClkControl_NOT_LOCKED (0<<1) + #define PM3RD_KClkControl_LOCKED (1<<1) + #define PM3RD_KClkControl_STATE_LOW (0<<2) + #define PM3RD_KClkControl_STATE_HIGH (1<<2) + #define PM3RD_KClkControl_STATE_RUN (2<<2) + #define PM3RD_KClkControl_STATE_LOW_POWER (3<<2) + #define PM3RD_KClkControl_SOURCE_PCLK (0<<4) + #define PM3RD_KClkControl_SOURCE_HALF_PCLK (1<<4) + #define PM3RD_KClkControl_SOURCE_PLL (2<<4) +#define PM3RD_KClkPreScale 0x20e +#define PM3RD_KClkFeedbackScale 0x20f +#define PM3RD_KClkPostScale 0x210 +#define PM3RD_MClkControl 0x211 + #define PM3RD_MClkControl_DISABLE (0<<0) + #define PM3RD_MClkControl_ENABLE (1<<0) + #define PM3RD_MClkControl_NOT_LOCKED (0<<1) + #define PM3RD_MClkControl_LOCKED (1<<1) + #define PM3RD_MClkControl_STATE_LOW (0<<2) + #define PM3RD_MClkControl_STATE_HIGH (1<<2) + #define PM3RD_MClkControl_STATE_RUN (2<<2) + #define PM3RD_MClkControl_STATE_LOW_POWER (3<<2) + #define PM3RD_MClkControl_SOURCE_PCLK (0<<4) + #define PM3RD_MClkControl_SOURCE_HALF_PCLK (1<<4) + #define PM3RD_MClkControl_SOURCE_HALF_EXT (3<<4) + #define PM3RD_MClkControl_SOURCE_EXT (4<<4) + #define PM3RD_MClkControl_SOURCE_HALF_KCLK (5<<4) + #define PM3RD_MClkControl_SOURCE_KCLK (6<<4) +#define PM3RD_MClkPreScale 0x212 +#define PM3RD_MClkFeedbackScale 0x213 +#define PM3RD_MClkPostScale 0x214 +#define PM3RD_SClkControl 0x215 + #define PM3RD_SClkControl_DISABLE (0<<0) + #define PM3RD_SClkControl_ENABLE (1<<0) + #define PM3RD_SClkControl_NOT_LOCKED (0<<1) + #define PM3RD_SClkControl_LOCKED (1<<1) + #define PM3RD_SClkControl_STATE_LOW (0<<2) + #define PM3RD_SClkControl_STATE_HIGH (1<<2) + #define PM3RD_SClkControl_STATE_RUN (2<<2) + #define PM3RD_SClkControl_STATE_LOW_POWER (3<<2) + #define PM3RD_SClkControl_SOURCE_PCLK (0<<4) + #define PM3RD_SClkControl_SOURCE_HALF_PCLK (1<<4) + #define PM3RD_SClkControl_SOURCE_HALF_EXT (3<<4) + #define PM3RD_SClkControl_SOURCE_EXT (4<<4) + #define PM3RD_SClkControl_SOURCE_HALF_KCLK (5<<4) + #define PM3RD_SClkControl_SOURCE_KCLK (6<<4) +#define PM3RD_SClkPreScale 0x216 +#define PM3RD_SClkFeedbackScale 0x217 +#define PM3RD_SClkPostScale 0x218 + +#define PM3RD_CursorPalette(p) (0x303+(p)) +#define PM3RD_CursorPattern(p) (0x400+(p)) +/****************************************************** +* GLINT Permedia3 Video Streaming Registers (0x5000) * +*******************************************************/ + +#define PM3VSConfiguration 0x5800 + +/********************************************** +* GLINT Permedia3 Core Registers (0x8000+) * +***********************************************/ +#define PM3AALineWidth 0x94c0 +#define PM3AAPointsize 0x94a0 +#define PM3AlphaBlendAlphaMode 0xafa8 +#define PM3AlphaBlendAlphaModeAnd 0xad30 +#define PM3AlphaBlendAlphaModeOr 0xad38 +#define PM3AlphaBlendColorMode 0xafa0 +#define PM3AlphaBlendColorModeAnd 0xacb0 +#define PM3AlphaBlendColorModeOr 0xacb8 +#define PM3AlphaDestColor 0xaf88 +#define PM3AlphaSourceColor 0xaf80 +#define PM3AlphaTestMode 0x8800 +#define PM3AlphaTestModeAnd 0xabf0 +#define PM3AlphaTestModeOr 0xabf8 +#define PM3AntialiasMode 0x8808 +#define PM3AntialiasModeAnd 0xac00 +#define PM3AntialiasModeOr 0xac08 +/* ... */ +#define PM3BackgroundColor 0xb0c8 +/* ... */ +#define PM3ColorDDAMode 0x87e0 +#define PM3ColorDDAModeAnd 0xabe0 +#define PM3ColorDDAModeOr 0xabe8 +#define PM3CommandInterrupt 0xa990 +#define PM3ConstantColorDDA 0xafb0 + #define PM3ConstantColorDDA_R(r) ((r)&0xff) + #define PM3ConstantColorDDA_G(g) (((g)&0xff)<<8) + #define PM3ConstantColorDDA_B(b) (((b)&0xff)<<16) + #define PM3ConstantColorDDA_A(a) (((a)&0xff)<<24) +#define PM3ContextData 0x8dd0 +#define PM3ContextDump 0x8dc0 +#define PM3ContextRestore 0x8dc8 +#define PM3Continue 0x8058 +#define PM3ContinueNewDom 0x8048 +#define PM3ContinueNewLine 0x8040 +#define PM3ContinueNewSub 0x8050 +#define PM3Count 0x8030 +/* ... */ +#define PM3DeltaControl 0x9350 +#define PM3DeltaControlAnd 0xab20 +#define PM3DeltaControlOr 0xab28 +#define PM3DeltaMode 0x9300 +#define PM3DeltaModeAnd 0xaad0 +#define PM3DeltaModeOr 0xaad8 +/* ... */ +#define PM3DitherMode 0x8818 +#define PM3DitherModeAnd 0xacd0 +#define PM3DitherModeOr 0xacd8 +/* ... */ +#define PM3dXDom 0x8008 +#define PM3dXSub 0x8018 +#define PM3dY 0x8028 +/* ... */ +#define PM3FBBlockColor 0x8ac8 +#define PM3FBBlockColor0 0xb060 +#define PM3FBBlockColor1 0xb068 +#define PM3FBBlockColor2 0xb070 +#define PM3FBBlockColor3 0xb078 +#define PM3FBBlockColorBack 0xb0a0 +#define PM3FBBlockColorBack0 0xb080 +#define PM3FBBlockColorBack1 0xb088 +#define PM3FBBlockColorBack2 0xb090 +#define PM3FBBlockColorBack3 0xb098 +#define PM3FBColor 0x8a98 +#define PM3FBDestReadBufferAddr0 0xae80 +#define PM3FBDestReadBufferAddr1 0xae88 +#define PM3FBDestReadBufferAddr2 0xae90 +#define PM3FBDestReadBufferAddr3 0xae98 +#define PM3FBDestReadBufferOffset0 0xaea0 +#define PM3FBDestReadBufferOffset1 0xaea8 +#define PM3FBDestReadBufferOffset2 0xaeb0 +#define PM3FBDestReadBufferOffset3 0xaeb8 + #define PM3FBDestReadBufferOffset_XOffset(x) ((x)&0xffff) + #define PM3FBDestReadBufferOffset_YOffset(y) (((y)&0xffff)<<16) +#define PM3FBDestReadBufferWidth0 0xaec0 +#define PM3FBDestReadBufferWidth1 0xaec8 +#define PM3FBDestReadBufferWidth2 0xaed0 +#define PM3FBDestReadBufferWidth3 0xaed8 + #define PM3FBDestReadBufferWidth_Width(w) ((w)&0x0fff) + +#define PM3FBDestReadEnables 0xaee8 +#define PM3FBDestReadEnablesAnd 0xad20 +#define PM3FBDestReadEnablesOr 0xad28 + #define PM3FBDestReadEnables_E(e) ((e)&0xff) + #define PM3FBDestReadEnables_E0 1<<0 + #define PM3FBDestReadEnables_E1 1<<1 + #define PM3FBDestReadEnables_E2 1<<2 + #define PM3FBDestReadEnables_E3 1<<3 + #define PM3FBDestReadEnables_E4 1<<4 + #define PM3FBDestReadEnables_E5 1<<5 + #define PM3FBDestReadEnables_E6 1<<6 + #define PM3FBDestReadEnables_E7 1<<7 + #define PM3FBDestReadEnables_R(r) (((r)&0xff)<<8) + #define PM3FBDestReadEnables_R0 1<<8 + #define PM3FBDestReadEnables_R1 1<<9 + #define PM3FBDestReadEnables_R2 1<<10 + #define PM3FBDestReadEnables_R3 1<<11 + #define PM3FBDestReadEnables_R4 1<<12 + #define PM3FBDestReadEnables_R5 1<<13 + #define PM3FBDestReadEnables_R6 1<<14 + #define PM3FBDestReadEnables_R7 1<<15 + #define PM3FBDestReadEnables_ReferenceAlpha(a) (((a)&0xff)<<24) + +#define PM3FBDestReadMode 0xaee0 +#define PM3FBDestReadModeAnd 0xac90 +#define PM3FBDestReadModeOr 0xac98 + #define PM3FBDestReadMode_ReadDisable 0<<0 + #define PM3FBDestReadMode_ReadEnable 1<<0 + #define PM3FBDestReadMode_StripePitch(sp) (((sp)&0x7)<<2) + #define PM3FBDestReadMode_StripeHeight(sh) (((sh)&0x7)<<7) + #define PM3FBDestReadMode_Enable0 1<<8 + #define PM3FBDestReadMode_Enable1 1<<9 + #define PM3FBDestReadMode_Enable2 1<<10 + #define PM3FBDestReadMode_Enable3 1<<11 + #define PM3FBDestReadMode_Layout0(l) (((l)&0x3)<<12) + #define PM3FBDestReadMode_Layout1(l) (((l)&0x3)<<14) + #define PM3FBDestReadMode_Layout2(l) (((l)&0x3)<<16) + #define PM3FBDestReadMode_Layout3(l) (((l)&0x3)<<18) + #define PM3FBDestReadMode_Origin0 1<<20 + #define PM3FBDestReadMode_Origin1 1<<21 + #define PM3FBDestReadMode_Origin2 1<<22 + #define PM3FBDestReadMode_Origin3 1<<23 + #define PM3FBDestReadMode_Blocking 1<<24 + #define PM3FBDestReadMode_UseReadEnabled 1<<26 + #define PM3FBDestReadMode_AlphaFiltering 1<<27 + +#define PM3FBHardwareWriteMask 0x8ac0 +#define PM3FBSoftwareWriteMask 0x8820 +#define PM3FBData 0x8aa0 +#define PM3FBSourceData 0x8aa8 +#define PM3FBSourceReadBufferAddr 0xaf08 +#define PM3FBSourceReadBufferOffset 0xaf10 + #define PM3FBSourceReadBufferOffset_XOffset(x) ((x)&0xffff) + #define PM3FBSourceReadBufferOffset_YOffset(y) (((y)&0xffff)<<16) +#define PM3FBSourceReadBufferWidth 0xaf18 + #define PM3FBSourceReadBufferWidth_Width(w) ((w)&0x0fff) +#define PM3FBSourceReadMode 0xaf00 +#define PM3FBSourceReadModeAnd 0xaca0 +#define PM3FBSourceReadModeOr 0xaca8 + #define PM3FBSourceReadMode_ReadDisable (0<<0) + #define PM3FBSourceReadMode_ReadEnable (1<<0) + #define PM3FBSourceReadMode_StripePitch(sp) (((sp)&0x7)<<2) + #define PM3FBSourceReadMode_StripeHeight(sh) (((sh)&0x7)<<7) + #define PM3FBSourceReadMode_Layout(l) (((l)&0x3)<<8) + #define PM3FBSourceReadMode_Origin 1<<10 + #define PM3FBSourceReadMode_Blocking 1<<11 + #define PM3FBSourceReadMode_UserTexelCoord 1<<13 + #define PM3FBSourceReadMode_WrapXEnable 1<<14 + #define PM3FBSourceReadMode_WrapYEnable 1<<15 + #define PM3FBSourceReadMode_WrapX(w) (((w)&0xf)<<16) + #define PM3FBSourceReadMode_WrapY(w) (((w)&0xf)<<20) + #define PM3FBSourceReadMode_ExternalSourceData 1<<24 +#define PM3FBWriteBufferAddr0 0xb000 +#define PM3FBWriteBufferAddr1 0xb008 +#define PM3FBWriteBufferAddr2 0xb010 +#define PM3FBWriteBufferAddr3 0xb018 + +#define PM3FBWriteBufferOffset0 0xb020 +#define PM3FBWriteBufferOffset1 0xb028 +#define PM3FBWriteBufferOffset2 0xb030 +#define PM3FBWriteBufferOffset3 0xb038 + #define PM3FBWriteBufferOffset_XOffset(x) ((x)&0xffff) + #define PM3FBWriteBufferOffset_YOffset(y) (((y)&0xffff)<<16) + +#define PM3FBWriteBufferWidth0 0xb040 +#define PM3FBWriteBufferWidth1 0xb048 +#define PM3FBWriteBufferWidth2 0xb050 +#define PM3FBWriteBufferWidth3 0xb058 + #define PM3FBWriteBufferWidth_Width(w) ((w)&0x0fff) + +#define PM3FBWriteMode 0x8ab8 +#define PM3FBWriteModeAnd 0xacf0 +#define PM3FBWriteModeOr 0xacf8 + #define PM3FBWriteMode_WriteDisable 0<<0 + #define PM3FBWriteMode_WriteEnable 1<<0 + #define PM3FBWriteMode_Replicate 1<<4 + #define PM3FBWriteMode_OpaqueSpan 1<<5 + #define PM3FBWriteMode_StripePitch(p) (((p)&0x7)<<6) + #define PM3FBWriteMode_StripeHeight(h) (((h)&0x7)<<9) + #define PM3FBWriteMode_Enable0 1<<12 + #define PM3FBWriteMode_Enable1 1<<13 + #define PM3FBWriteMode_Enable2 1<<14 + #define PM3FBWriteMode_Enable3 1<<15 + #define PM3FBWriteMode_Layout0(l) (((l)&0x3)<<16) + #define PM3FBWriteMode_Layout1(l) (((l)&0x3)<<18) + #define PM3FBWriteMode_Layout2(l) (((l)&0x3)<<20) + #define PM3FBWriteMode_Layout3(l) (((l)&0x3)<<22) + #define PM3FBWriteMode_Origin0 1<<24 + #define PM3FBWriteMode_Origin1 1<<25 + #define PM3FBWriteMode_Origin2 1<<26 + #define PM3FBWriteMode_Origin3 1<<27 +#define PM3ForegroundColor 0xb0c0 +/* ... */ +#define PM3GIDMode 0xb538 +#define PM3GIDModeAnd 0xb5b0 +#define PM3GIDModeOr 0xb5b8 +/* ... */ +#define PM3LBDestReadBufferAddr 0xb510 +#define PM3LBDestReadBufferOffset 0xb518 +#define PM3LBDestReadEnables 0xb508 +#define PM3LBDestReadEnablesAnd 0xb590 +#define PM3LBDestReadEnablesOr 0xb598 +#define PM3LBDestReadMode 0xb500 +#define PM3LBDestReadModeAnd 0xb580 +#define PM3LBDestReadModeOr 0xb588 + #define PM3LBDestReadMode_Disable 0<<0 + #define PM3LBDestReadMode_Enable 1<<0 + #define PM3LBDestReadMode_StripePitch(p) (((p)&0x7)<<2) + #define PM3LBDestReadMode_StripeHeight(h) (((h)&0x7)<<5) + #define PM3LBDestReadMode_Layout 1<<8 + #define PM3LBDestReadMode_Origin 1<<9 + #define PM3LBDestReadMode_UserReadEnables 1<<10 + #define PM3LBDestReadMode_Packed16 1<<11 + #define PM3LBDestReadMode_Width(w) (((w)&0xfff)<<12) +#define PM3LBReadFormat 0x8888 + #define PM3LBReadFormat_DepthWidth(w) (((w)&0x3)<<0) + #define PM3LBReadFormat_StencilWidth(w) (((w)&0xf)<<2) + #define PM3LBReadFormat_StencilPosition(p) (((p)&0x1f)<<6) + #define PM3LBReadFormat_FCPWidth(w) (((w)&0xf)<<11) + #define PM3LBReadFormat_FCPPosition(p) (((p)&0x1f)<<15) + #define PM3LBReadFormat_GIDWidth(w) (((w)&0x7)<<20) + #define PM3LBReadFormat_GIDPosition(p) (((p)&0x1f)<<23) +#define PM3LBSourceReadBufferAddr 0xb528 +#define PM3LBSourceReadBufferOffset 0xb530 +#define PM3LBSourceReadMode 0xb520 +#define PM3LBSourceReadModeAnd 0xb5a0 +#define PM3LBSourceReadModeOr 0xb5a8 + #define PM3LBSourceReadMode_Enable 1<<0 + #define PM3LBSourceReadMode_StripePitch(p) (((p)&0x7)<<2) + #define PM3LBSourceReadMode_StripeHeight(h) (((h)&0x7)<<5) + #define PM3LBSourceReadMode_Layout 1<<8 + #define PM3LBSourceReadMode_Origin 1<<9 + #define PM3LBSourceReadMode_Packed16 1<<10 + #define PM3LBSourceReadMode_Width(w) (((w)&0xfff)<<11) +#define PM3LBStencil 0x88a8 +#define PM3LBWriteBufferAddr 0xb540 +#define PM3LBWriteBufferOffset 0xb548 +#define PM3LBWriteFormat 0x88c8 + #define PM3LBWriteFormat_DepthWidth(w) (((w)&0x3)<<0) + #define PM3LBWriteFormat_StencilWidth(w) (((w)&0xf)<<2) + #define PM3LBWriteFormat_StencilPosition(p) (((p)&0x1f)<<6) + #define PM3LBWriteFormat_GIDWidth(w) (((w)&0x7)<<20) + #define PM3LBWriteFormat_GIDPosition(p) (((p)&0x1f)<<23) +#define PM3LBWriteMode 0x88c0 +#define PM3LBWriteModeAnd 0xac80 +#define PM3LBWriteModeOr 0xac88 + #define PM3LBWriteMode_WriteDisable 0<<0 + #define PM3LBWriteMode_WriteEnable 1<<0 + #define PM3LBWriteMode_StripePitch(p) (((p)&0x7)<<3) + #define PM3LBWriteMode_StripeHeight(h) (((h)&0x7)<<6) + #define PM3LBWriteMode_Layout 1<<9 + #define PM3LBWriteMode_Origin 1<<10 + #define PM3LBWriteMode_Packed16 1<<11 + #define PM3LBWriteMode_Width(w) (((w)&0xfff)<<12) +/* ... */ +#define PM3LineStippleMode 0x81a8 +#define PM3LineStippleModeAnd 0xabc0 +#define PM3LineStippleModeOr 0xabc8 +#define PM3LoadLineStippleCounters 0x81b0 +/* ... */ +#define PM3LogicalOpMode 0x8828 +#define PM3LogicalOpModeAnd 0xace0 +#define PM3LogicalOpModeOr 0xace8 + #define PM3LogicalOpMode_Disable (0<<0) + #define PM3LogicalOpMode_Enable (1<<0) + #define PM3LogicalOpMode_LogicOp(op) (((op)&0xf)<<1) + #define PM3LogicalOpMode_UseConstantWriteData_Disable (0<<5) + #define PM3LogicalOpMode_UseConstantWriteData_Enable (1<<5) + #define PM3LogicalOpMode_Background_Disable (0<<6) + #define PM3LogicalOpMode_Background_Enable (1<<6) + #define PM3LogicalOpMode_Background_LogicOp(op) (((op)&0xf)<<7) + #define PM3LogicalOpMode_UseConstantSource_Disable (0<<11) + #define PM3LogicalOpMode_UseConstantSource_Enable (1<<11) + +/* ... */ +#define PM3LUT 0x8e80 +/* ... */ +#define PM3LUT 0x8e80 +#define PM3LUTAddress 0x84d0 +#define PM3LUTData 0x84c8 +#define PM3LUTIndex 0x84c0 +#define PM3LUTMode 0xb378 +#define PM3LUTModeAnd 0xad70 +#define PM3LUTModeOr 0xad78 +#define PM3LUTTransfer 0x84d8 +/* ... */ +#define PM3PixelSize 0x80c0 + #define PM3PixelSize_GLOBAL_32BIT (0<<0) + #define PM3PixelSize_GLOBAL_16BIT (1<<0) + #define PM3PixelSize_GLOBAL_8BIT (2<<0) + #define PM3PixelSize_RASTERIZER_32BIT (0<<2) + #define PM3PixelSize_RASTERIZER_16BIT (1<<2) + #define PM3PixelSize_RASTERIZER_8BIT (2<<2) + #define PM3PixelSize_SCISSOR_AND_STIPPLE_32BIT (0<<4) + #define PM3PixelSize_SCISSOR_AND_STIPPLE_16BIT (1<<4) + #define PM3PixelSize_SCISSOR_AND_STIPPLE_8BIT (2<<4) + #define PM3PixelSize_TEXTURE_32BIT (0<<6) + #define PM3PixelSize_TEXTURE_16BIT (1<<6) + #define PM3PixelSize_TEXTURE_8BIT (2<<6) + #define PM3PixelSize_LUT_32BIT (0<<8) + #define PM3PixelSize_LUT_16BIT (1<<8) + #define PM3PixelSize_LUT_8BIT (2<<8) + #define PM3PixelSize_FRAMEBUFFER_32BIT (0<<10) + #define PM3PixelSize_FRAMEBUFFER_16BIT (1<<10) + #define PM3PixelSize_FRAMEBUFFER_8BIT (2<<10) + #define PM3PixelSize_LOGICAL_OP_32BIT (0<<12) + #define PM3PixelSize_LOGICAL_OP_16BIT (1<<12) + #define PM3PixelSize_LOGICAL_OP_8BIT (2<<12) + #define PM3PixelSize_LOCALBUFFER_32BIT (0<<14) + #define PM3PixelSize_LOCALBUFFER_16BIT (1<<14) + #define PM3PixelSize_LOCALBUFFER_8BIT (2<<14) + #define PM3PixelSize_SETUP_32BIT (0<<16) + #define PM3PixelSize_SETUP_16BIT (1<<16) + #define PM3PixelSize_SETUP_8BIT (2<<16) + #define PM3PixelSize_GLOBAL (0<<31) + #define PM3PixelSize_INDIVIDUAL (1<<31) +/* ... */ +#define PM3Render 0x8038 + #define PM3Render_AreaStipple_Disable (0<<0) + #define PM3Render_AreaStipple_Enable (1<<0) + #define PM3Render_LineStipple_Disable (0<<1) + #define PM3Render_LineStipple_Enable (1<<1) + #define PM3Render_ResetLine_Disable (0<<2) + #define PM3Render_ResetLine_Enable (1<<2) + #define PM3Render_FastFill_Disable (0<<3) + #define PM3Render_FastFill_Enable (1<<3) + #define PM3Render_Primitive_Line (0<<6) + #define PM3Render_Primitive_Trapezoid (1<<6) + #define PM3Render_Primitive_Point (2<<6) + #define PM3Render_Antialias_Disable (0<<8) + #define PM3Render_Antialias_Enable (1<<8) + #define PM3Render_Antialias_SubPixelRes_4x4 (0<<9) + #define PM3Render_Antialias_SubPixelRes_8x8 (1<<9) + #define PM3Render_UsePointTable_Disable (0<<10) + #define PM3Render_UsePointTable_Enable (1<<10) + #define PM3Render_SyncOnbitMask_Disable (0<<11) + #define PM3Render_SyncOnBitMask_Enable (1<<11) + #define PM3Render_SyncOnHostData_Disable (0<<12) + #define PM3Render_SyncOnHostData_Enable (1<<12) + #define PM3Render_Texture_Disable (0<<13) + #define PM3Render_Texture_Enable (1<<13) + #define PM3Render_Fog_Disable (0<<14) + #define PM3Render_Fog_Enable (1<<14) + #define PM3Render_Coverage_Disable (0<<15) + #define PM3Render_Coverage_Enable (1<<15) + #define PM3Render_SubPixelCorrection_Disable (0<<16) + #define PM3Render_SubPixelCorrection_Enable (1<<16) + #define PM3Render_SpanOperation_Disable (0<<18) + #define PM3Render_SpanOperation_Enable (1<<18) + #define PM3Render_FBSourceRead_Disable (0<<27) + #define PM3Render_FBSourceRead_Enable (1<<27) +#define PM3RasterizerMode 0x80a0 +#define PM3RasterizerModeAnd 0xaba0 +#define PM3RasterizerModeOr 0xabb8 +#define PM3RectangleHeight 0x94e0 +#define PM3Render 0x8038 +#define PM3RepeatLine 0x9328 +#define PM3ResetPickResult 0x8c20 +#define PM3RLEMask 0x8c48 +#define PM3RouterMode 0x8840 +#define PM3RStart 0x8780 +#define PM3S1Start 0x8400 +#define PM3aveLineStippleCounters 0x81c0 +#define PM3ScissorMaxXY 0x8190 +#define PM3ScissorMinXY 0x8188 +#define PM3ScissorMode 0x8180 +#define PM3ScissorModeAnd 0xabb0 +#define PM3ScissorModeOr 0xabb8 +#define PM3ScreenSize 0x8198 +#define PM3Security 0x8908 +#define PM3SetLogicalTexturePage 0xb360 +#define PM3SizeOfFramebuffer 0xb0a8 +#define PM3SStart 0x8388 +#define PM3StartXDom 0x8000 +#define PM3StartXSub 0x8010 +#define PM3StartY 0x8020 +/* ... */ +#define PM3SpanColorMask 0x8168 +/* ... */ +#define PM3TextureApplicationMode 0x8680 +#define PM3TextureApplicationModeAnd 0xac50 +#define PM3TextureApplicationModeOr 0xac58 +#define PM3TextureBaseAddr 0x8500 +#define PM3TextureCacheControl 0x8490 +#define PM3TextureChromaLower0 0x84f0 +#define PM3TextureChromaLower1 0x8608 +#define PM3TextureChromaUpper0 0x84e8 +#define PM3TextureChromaUpper1 0x8600 +#define PM3TextureCompositeAlphaMode0 0xb310 +#define PM3TextureCompositeAlphaMode0And 0xb390 +#define PM3TextureCompositeAlphaMode0Or 0xb398 +#define PM3TextureCompositeAlphaMode1 0xb320 +#define PM3TextureCompositeAlphaMode1And 0xb3b0 +#define PM3TextureCompositeAlphaMode1Or 0xb3b8 +#define PM3TextureCompositeColorMode0 0xb308 +#define PM3TextureCompositeColorMode0And 0xb380 +#define PM3TextureCompositeColorMode0Or 0xb388 +#define PM3TextureCompositeColorMode1 0xb318 +#define PM3TextureCompositeColorMode1And 0xb3a0 +#define PM3TextureCompositeColorMode1Or 0xb3a8 +#define PM3TextureCompositeFactor0 0xb328 +#define PM3TextureCompositeFactor1 0xb330 +#define PM3TextureCompositeMode 0xb300 +#define PM3TextureCoordMode 0x8380 +#define PM3TextureCoordModeAnd 0xac20 +#define PM3TextureCoordModeOr 0xac28 +#define PM3TextureData 0x88e8 +/* +#define PM3TextureDownloadControl 0x0108 +*/ +#define PM3TextureDownloadOffset 0x88f0 +#define PM3TextureEnvColor 0x8688 +#define PM3TextureFilterMode 0x84e0 +#define PM3TextureFilterModeAnd 0xad50 +#define PM3TextureFilterModeOr 0xad58 +#define PM3TextureIndexMode0 0xb338 +#define PM3TextureIndexMode0And 0xb3c0 +#define PM3TextureIndexMode0Or 0xb3c8 +#define PM3TextureIndexMode1 0xb340 +#define PM3TextureIndexMode1And 0xb3d0 +#define PM3TextureIndexMode1Or 0xb3d8 +#define PM3TextureLODBiasS 0x8450 +#define PM3TextureLODBiasT 0x8458 +/* ... */ +#define PM3TextureMapSize 0xb428 +#define PM3TextureMapWidth0 0x8580 +#define PM3TextureMapWidth1 0x8588 + #define PM3TextureMapWidth_Width(w) ((w&0xfff)<<0) + #define PM3TextureMapWidth_BorderLayout (1<<12) + #define PM3TextureMapWidth_Layout_Linear (0<<13) + #define PM3TextureMapWidth_Layout_Patch64 (1<<13) + #define PM3TextureMapWidth_Layout_Patch32_2 (2<<13) + #define PM3TextureMapWidth_Layout_Patch2 (3<<13) + #define PM3TextureMapWidth_HostTexture (1<<15) +#define PM3TextureReadMode0 0xb400 +#define PM3TextureReadMode0And 0xac30 +#define PM3TextureReadMode0Or 0xac38 +#define PM3TextureReadMode1 0xb408 +#define PM3TextureReadMode1And 0xad40 +#define PM3TextureReadMode1Or 0xad48 +/* ... */ +#define PM3WaitForCompletion 0x80b8 +#define PM3Window 0x8980 + #define PM3Window_ForceLBUpdate 1<<3 + #define PM3Window_LBUpdateSource 1<<4 + #define PM3Window_FrameCount(c) (((c)&0xff)<<9) + #define PM3Window_StencilFCP 1<<17 + #define PM3Window_DepthFCP 1<<18 + #define PM3Window_OverrideWriteFiltering 1<<19 +#define PM3WindowAnd 0xab80 +#define PM3WindowOr 0xab88 +#define PM3WindowOrigin 0x81c8 +#define PM3XBias 0x9480 +#define PM3YBias 0x9488 +#define PM3YLimits 0x80a8 +#define PM3UVMode 0x8f00 +#define PM3ZFogBias 0x86b8 +#define PM3ZStart 0xadd8 +#define PM3ZStartL 0x89b8 +#define PM3ZStartU 0x89b0 + + +/********************************************** +* GLINT Permedia3 2D setup Unit * +***********************************************/ +#define PM3Config2D 0xb618 + #define PM3Config2D_OpaqueSpan 1<<0 + #define PM3Config2D_MultiRXBlit 1<<1 + #define PM3Config2D_UserScissorEnable 1<<2 + #define PM3Config2D_FBDestReadEnable 1<<3 + #define PM3Config2D_AlphaBlendEnable 1<<4 + #define PM3Config2D_DitherEnable 1<<5 + #define PM3Config2D_ForegroundROPEnable 1<<6 + #define PM3Config2D_ForegroundROP(rop) (((rop)&0xf)<<7) + #define PM3Config2D_BackgroundROPEnable 1<<11 + #define PM3Config2D_BackgroundROP(rop) (((rop)&0xf)<<12) + #define PM3Config2D_UseConstantSource 1<<16 + #define PM3Config2D_FBWriteEnable 1<<17 + #define PM3Config2D_Blocking 1<<18 + #define PM3Config2D_ExternalSourceData 1<<19 + #define PM3Config2D_LUTModeEnable 1<<20 +#define PM3DownloadGlyphwidth 0xb658 + #define PM3DownloadGlyphwidth_GlyphWidth(gw) ((gw)&0xffff) +#define PM3DownloadTarget 0xb650 + #define PM3DownloadTarget_TagName(tag) ((tag)&0x1fff) +#define PM3GlyphData 0xb660 +#define PM3GlyphPosition 0xb608 + #define PM3GlyphPosition_XOffset(x) ((x)&0xffff) + #define PM3GlyphPosition_YOffset(y) (((y)&0xffff)<<16) +#define PM3Packed4Pixels 0xb668 +#define PM3Packed8Pixels 0xb630 +#define PM3Packed16Pixels 0xb638 +#define PM3RectanglePosition 0xb600 + #define PM3RectanglePosition_XOffset(x) ((x)&0xffff) + #define PM3RectanglePosition_YOffset(y) (((y)&0xffff)<<16) +#define PM3Render2D 0xb640 + #define PM3Render2D_Width(w) ((w)&0x0fff) + #define PM3Render2D_Operation_Normal 0<<12 + #define PM3Render2D_Operation_SyncOnHostData 1<<12 + #define PM3Render2D_Operation_SyncOnBitMask 2<<12 + #define PM3Render2D_Operation_PatchOrderRendering 3<<12 + #define PM3Render2D_FBSourceReadEnable 1<<14 + #define PM3Render2D_SpanOperation 1<<15 + #define PM3Render2D_Height(h) (((h)&0x0fff)<<16) + #define PM3Render2D_XPositive 1<<28 + #define PM3Render2D_YPositive 1<<29 + #define PM3Render2D_AreaStippleEnable 1<<30 + #define PM3Render2D_TextureEnable 1<<31 +#define PM3Render2DGlyph 0xb648 + #define PM3Render2DGlyph_Width(w) ((w)&0x7f) + #define PM3Render2DGlyph_Height(h) (((h)&0x7f)<<7) + #define PM3Render2DGlyph_XOffset(x) (((x)&0x1ff)<<14) + #define PM3Render2DGlyph_YOffset(y) (((y)&0x1ff)<<23) +#define PM3RenderPatchOffset 0xb610 + #define PM3RenderPatchOffset_XOffset(x) ((x)&0xffff) + #define PM3RenderPatchOffset_YOffset(y) (((y)&0xffff)<<16) +#define PM3RLCount 0xb678 + #define PM3RLCount_Count(c) ((c)&0x0fff) +#define PM3RLData 0xb670 + +/********************************************** +* GLINT Permedia3 Alias Register * +***********************************************/ +#define PM3FillBackgroundColor 0x8330 +#define PM3FillConfig2D0 0x8338 +#define PM3FillConfig2D1 0x8360 + #define PM3FillConfig2D_OpaqueSpan 1<<0 + #define PM3FillConfig2D_MultiRXBlit 1<<1 + #define PM3FillConfig2D_UserScissorEnable 1<<2 + #define PM3FillConfig2D_FBDestReadEnable 1<<3 + #define PM3FillConfig2D_AlphaBlendEnable 1<<4 + #define PM3FillConfig2D_DitherEnable 1<<5 + #define PM3FillConfig2D_ForegroundROPEnable 1<<6 + #define PM3FillConfig2D_ForegroundROP(rop) (((rop)&0xf)<<7) + #define PM3FillConfig2D_BackgroundROPEnable 1<<11 + #define PM3FillConfig2D_BackgroundROP(rop) (((rop)&0xf)<<12) + #define PM3FillConfig2D_UseConstantSource 1<<16 + #define PM3FillConfig2D_FBWriteEnable 1<<17 + #define PM3FillConfig2D_Blocking 1<<18 + #define PM3FillConfig2D_ExternalSourceData 1<<19 + #define PM3FillConfig2D_LUTModeEnable 1<<20 +#define PM3FillFBDestReadBufferAddr 0x8310 +#define PM3FillFBSourceReadBufferAddr 0x8308 +#define PM3FillFBSourceReadBufferOffset 0x8340 + #define PM3FillFBSourceReadBufferOffset_XOffset(x) ((x)&0xffff) + #define PM3FillFBSourceReadBufferOffset_YOffset(y) (((y)&0xffff)<<16) +#define PM3FillFBWriteBufferAddr 0x8300 +#define PM3FillForegroundColor0 0x8328 +#define PM3FillForegroundColor1 0x8358 +#define PM3FillGlyphPosition 0x8368 + #define PM3FillGlyphPosition_XOffset(x) ((x)&0xffff) + #define PM3FillGlyphPosition_YOffset(y) (((y)&0xffff)<<16) +#define PM3FillRectanglePosition 0x8348 + #define PM3FillRectanglePosition_XOffset(x) ((x)&0xffff) + #define PM3FillRectanglePosition_YOffset(y) (((y)&0xffff)<<16) + +#if 1 + +/********************************************** +* GLINT Permedia3 Macros * +***********************************************/ + +extern void *pm3_reg_base; + +#define WRITE_REG(offset,val) \ + *(volatile unsigned long *)(((unsigned char *)(pm3_reg_base)) + offset) = (val) + +#define READ_REG(offset) \ + *(volatile unsigned long *)(((unsigned char *)(pm3_reg_base)) + offset) + +#define UPDATE_SET_REG(offset,val) \ + { \ + unsigned long temp; \ + temp = READ_REG(offset); \ + WRITE_REG(offset,temp|(val)); \ + } + +#define UPDATE_CLEAR_REG(offset,val) \ + { \ + unsigned long temp; \ + temp = READ_REG(offset); \ + WRITE_REG(offset,temp&(~(val))); \ + } + +#define RAMDAC_DELAY(x) do { \ + int delay = x; \ + unsigned char tmp; \ + while(delay--){tmp = READ_REG(PM3InFIFOSpace);}; \ +} while(0) + +#define SLOW_WRITE_REG(v,r) \ +do{ \ + RAMDAC_DELAY(5); \ + WRITE_REG(v,r); \ + RAMDAC_DELAY(5); \ +}while(0) + +#define RAMDAC_SET_INDEX(index) \ +{ \ + SLOW_WRITE_REG (PM3RD_IndexHigh,(index>>8)&0xff); \ + SLOW_WRITE_REG (PM3RD_IndexLow,index&0xff); \ +} + +#define RAMDAC_SET_REG(index, data) \ +{ \ + RAMDAC_SET_INDEX(index); \ + SLOW_WRITE_REG(PM3RD_IndexedData, data); \ +} + +#define RAMDAC_GET_REG(index, temp) \ +{ \ + RAMDAC_SET_INDEX(index); \ + temp = READ_REG(PM3RD_IndexedData); \ +} +#endif +#endif /* _PM3_REG_H_ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/vidix/drivers/pm3_vid.c Fri May 31 23:17:43 2002 +0000 @@ -0,0 +1,370 @@ +/** + Driver for 3DLabs GLINT R3 and Permedia3 chips. + + Copyright (C) 2002 Måns Rullgård + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +**/ + +#include <errno.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <inttypes.h> +#include <unistd.h> + +#include "../vidix.h" +#include "../fourcc.h" +#include "../../libdha/libdha.h" +#include "../../libdha/pci_ids.h" +#include "../../libdha/pci_names.h" +#include "../../config.h" + +#include "pm3_regs.h" + +#if 0 +#define TRACE_ENTER() fprintf(stderr, "%s: enter\n", __FUNCTION__) +#define TRACE_EXIT() fprintf(stderr, "%s: exit\n", __FUNCTION__) +#else +#define TRACE_ENTER() +#define TRACE_EXIT() +#endif + +pciinfo_t pci_info; + +void *pm3_reg_base; +void *pm3_mem; + +static vidix_capability_t pm3_cap = +{ + "3DLabs GLINT R3/Permedia3 driver", + "Måns Rullgård <mru@users.sf.net>", + TYPE_OUTPUT, + { 0, 0, 0, 0 }, + 2048, + 2048, + 4, + 4, + -1, + FLAG_UPSCALER|FLAG_DOWNSCALER, + VENDOR_3DLABS, + -1, + { 0, 0, 0, 0 } +}; + + +unsigned int vixGetVersion(void) +{ + return(VIDIX_VERSION); +} + +static unsigned short pm3_card_ids[] = +{ + DEVICE_3DLABS_GLINT_R3 +}; + +static int find_chip(unsigned chip_id) +{ + unsigned i; + for(i = 0;i < sizeof(pm3_card_ids)/sizeof(unsigned short);i++) + { + if(chip_id == pm3_card_ids[i]) return i; + } + return -1; +} + +int vixProbe(int verbose, int force) +{ + pciinfo_t lst[MAX_PCI_DEVICES]; + unsigned i,num_pci; + int err; + + err = pci_scan(lst,&num_pci); + if(err) + { + printf("[pm3] Error occured during pci scan: %s\n",strerror(err)); + return err; + } + else + { + err = ENXIO; + for(i=0; i < num_pci; i++) + { + if(lst[i].vendor == VENDOR_3DLABS) + { + int idx; + const char *dname; + idx = find_chip(lst[i].device); + if(idx == -1) + continue; + dname = pci_device_name(VENDOR_3DLABS, lst[i].device); + dname = dname ? dname : "Unknown chip"; + printf("[pm3] Found chip: %s\n", dname); + pm3_cap.device_id = lst[i].device; + err = 0; + memcpy(&pci_info, &lst[i], sizeof(pciinfo_t)); + break; + } + } + } + if(err && verbose) printf("[pm3] Can't find chip\n"); + return err; +} + +#define PRINT_REG(reg) \ +{ \ + long _foo = READ_REG(reg); \ + printf("[pm3] " #reg " (%x) = %#lx (%li)\n", reg, _foo, _foo); \ +} + +int vixInit(void) +{ + pm3_reg_base = map_phys_mem(pci_info.base0, 0x20000); + pm3_mem = map_phys_mem(pci_info.base2, 0x2000000); + return 0; +} + +void vixDestroy(void) +{ + unmap_phys_mem(pm3_reg_base, 0x20000); + unmap_phys_mem(pm3_mem, 0x2000000); +} + +int vixGetCapability(vidix_capability_t *to) +{ + memcpy(to, &pm3_cap, sizeof(vidix_capability_t)); + return 0; +} + +static int is_supported_fourcc(uint32_t fourcc) +{ + switch(fourcc){ + case IMGFMT_YUY2: + case IMGFMT_UYVY: + return 1; + default: + return 0; + } +} + +int vixQueryFourcc(vidix_fourcc_t *to) +{ + if(is_supported_fourcc(to->fourcc)) + { + to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP | + VID_DEPTH_4BPP | VID_DEPTH_8BPP | + VID_DEPTH_12BPP| VID_DEPTH_15BPP| + VID_DEPTH_16BPP| VID_DEPTH_24BPP| + VID_DEPTH_32BPP; + to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY; + return 0; + } + else to->depth = to->flags = 0; + return ENOSYS; +} + +#define FORMAT_RGB8888 PM3VideoOverlayMode_COLORFORMAT_RGB8888 +#define FORMAT_RGB4444 PM3VideoOverlayMode_COLORFORMAT_RGB4444 +#define FORMAT_RGB5551 PM3VideoOverlayMode_COLORFORMAT_RGB5551 +#define FORMAT_RGB565 PM3VideoOverlayMode_COLORFORMAT_RGB565 +#define FORMAT_RGB332 PM3VideoOverlayMode_COLORFORMAT_RGB332 +#define FORMAT_BGR8888 PM3VideoOverlayMode_COLORFORMAT_BGR8888 +#define FORMAT_BGR4444 PM3VideoOverlayMode_COLORFORMAT_BGR4444 +#define FORMAT_BGR5551 PM3VideoOverlayMode_COLORFORMAT_BGR5551 +#define FORMAT_BGR565 PM3VideoOverlayMode_COLORFORMAT_BGR565 +#define FORMAT_BGR332 PM3VideoOverlayMode_COLORFORMAT_BGR332 +#define FORMAT_CI8 PM3VideoOverlayMode_COLORFORMAT_CI8 +#define FORMAT_VUY444 PM3VideoOverlayMode_COLORFORMAT_VUY444 +#define FORMAT_YUV444 PM3VideoOverlayMode_COLORFORMAT_YUV444 +#define FORMAT_VUY422 PM3VideoOverlayMode_COLORFORMAT_VUY422 +#define FORMAT_YUV422 PM3VideoOverlayMode_COLORFORMAT_YUV422 + +/* Notice, have to check that we dont overflow the deltas here ... */ +static void +compute_scale_factor( + short* src_w, short* dst_w, + unsigned int* shrink_delta, unsigned int* zoom_delta) +{ + /* NOTE: If we don't return reasonable values here then the video + * unit can potential shut off and won't display an image until re-enabled. + * Seems as though the zoom_delta is o.k, and I've not had the problem. + * The 'shrink_delta' is prone to this the most - FIXME ! */ + + if (*src_w >= *dst_w) { + *src_w &= ~0x3; + *dst_w &= ~0x3; + *shrink_delta = (((*src_w << 16) / *dst_w) + 0x0f) & 0x0ffffff0; + *zoom_delta = 1<<16; + if ( ((*shrink_delta * *dst_w) >> 16) & 0x03 ) + *shrink_delta += 0x10; + } else { + *src_w &= ~0x3; + *dst_w &= ~0x3; + *zoom_delta = (((*src_w << 16) / *dst_w) + 0x0f) & 0x0001fff0; + *shrink_delta = 1<<16; + if ( ((*zoom_delta * *dst_w) >> 16) & 0x03 ) + *zoom_delta += 0x10; + } +} + +static int frames[VID_PLAY_MAXFRAMES]; + +static long overlay_mode, overlay_control; + +int vixConfigPlayback(vidix_playback_t *info) +{ + int shrink, zoom; + short src_w, drw_w; + short src_h, drw_h; + long base0; + int pitch; + int format; + unsigned int i; + + TRACE_ENTER(); + + if(!is_supported_fourcc(info->fourcc)) + return -1; + + switch(info->fourcc){ + case IMGFMT_YUY2: + format = FORMAT_YUV422; + break; + case IMGFMT_UYVY: + format = FORMAT_VUY422; + break; + default: + return -1; + } + + src_w = info->src.w; + src_h = info->src.h; + + drw_w = info->dest.w; + drw_h = info->dest.h; + + pitch = src_w; + + /* Assume we have 16 MB to play with */ + info->num_frames = 0x1000000 / (pitch * src_h * 2); + if(info->num_frames > VID_PLAY_MAXFRAMES) + info->num_frames = VID_PLAY_MAXFRAMES; + + /* Start at 16 MB. Let's hope it's not in use. */ + base0 = 0x1000000; + info->dga_addr = pm3_mem + base0; + + info->dest.pitch.y = 2; + info->dest.pitch.u = 0; + info->dest.pitch.v = 0; + info->offset.y = 0; + info->offset.v = 0; + info->offset.u = 0; + info->frame_size = pitch * src_h * 2; + for(i = 0; i < info->num_frames; i++){ + info->offsets[i] = info->frame_size * i; + frames[i] = (base0 + info->offsets[i]) >> 1; + } + + compute_scale_factor(&src_w, &drw_w, &shrink, &zoom); + + WRITE_REG(PM3VideoOverlayBase0, base0 >> 1); + WRITE_REG(PM3VideoOverlayStride, PM3VideoOverlayStride_STRIDE(pitch)); + WRITE_REG(PM3VideoOverlayWidth, PM3VideoOverlayWidth_WIDTH(src_w)); + WRITE_REG(PM3VideoOverlayHeight, PM3VideoOverlayHeight_HEIGHT(src_h)); + WRITE_REG(PM3VideoOverlayOrigin, 0); + + /* Scale the source to the destinationsize */ + if (src_h == drw_h) { + WRITE_REG(PM3VideoOverlayYDelta, PM3VideoOverlayYDelta_NONE); + } else { + WRITE_REG(PM3VideoOverlayYDelta, + PM3VideoOverlayYDelta_DELTA(src_h, drw_h)); + } + if (src_w == drw_w) { + WRITE_REG(PM3VideoOverlayShrinkXDelta, 1<<16); + WRITE_REG(PM3VideoOverlayZoomXDelta, 1<<16); + } else { + WRITE_REG(PM3VideoOverlayShrinkXDelta, shrink); + WRITE_REG(PM3VideoOverlayZoomXDelta, zoom); + } + WRITE_REG(PM3VideoOverlayIndex, 0); + + /* Now set the ramdac video overlay region and mode */ + RAMDAC_SET_REG(PM3RD_VideoOverlayXStartLow, (info->dest.x & 0xff)); + RAMDAC_SET_REG(PM3RD_VideoOverlayXStartHigh, (info->dest.x & 0xf00)>>8); + RAMDAC_SET_REG(PM3RD_VideoOverlayXEndLow, (info->dest.x+drw_w) & 0xff); + RAMDAC_SET_REG(PM3RD_VideoOverlayXEndHigh, + ((info->dest.x+drw_w) & 0xf00)>>8); + RAMDAC_SET_REG(PM3RD_VideoOverlayYStartLow, (info->dest.y & 0xff)); + RAMDAC_SET_REG(PM3RD_VideoOverlayYStartHigh, (info->dest.y & 0xf00)>>8); + RAMDAC_SET_REG(PM3RD_VideoOverlayYEndLow, (info->dest.y+drw_h) & 0xff); + RAMDAC_SET_REG(PM3RD_VideoOverlayYEndHigh, + ((info->dest.y+drw_h) & 0xf00)>>8); + + RAMDAC_SET_REG(PM3RD_VideoOverlayKeyR, 0xff); + RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, 0x00); + RAMDAC_SET_REG(PM3RD_VideoOverlayKeyB, 0xff); + + overlay_mode = + 1 << 5 | + format | + PM3VideoOverlayMode_FILTER_FULL | + PM3VideoOverlayMode_BUFFERSYNC_MANUAL | + PM3VideoOverlayMode_FLIP_VIDEO; + + overlay_control = + PM3RD_VideoOverlayControl_KEY_COLOR | + PM3RD_VideoOverlayControl_MODE_MAINKEY | + PM3RD_VideoOverlayControl_DIRECTCOLOR_ENABLED; + + TRACE_EXIT(); + return 0; +} + +int vixPlaybackOn(void) +{ + TRACE_ENTER(); + + WRITE_REG(PM3VideoOverlayMode, + overlay_mode | PM3VideoOverlayMode_ENABLE); + RAMDAC_SET_REG(PM3RD_VideoOverlayControl, + overlay_control | PM3RD_VideoOverlayControl_ENABLE); + WRITE_REG(PM3VideoOverlayUpdate, + PM3VideoOverlayUpdate_ENABLE); + + TRACE_EXIT(); + return 0; +} + +int vixPlaybackOff(void) +{ + RAMDAC_SET_REG(PM3RD_VideoOverlayControl, + PM3RD_VideoOverlayControl_DISABLE); + WRITE_REG(PM3VideoOverlayMode, + PM3VideoOverlayMode_DISABLE); + + RAMDAC_SET_REG(PM3RD_VideoOverlayKeyR, 0x01); + RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, 0x01); + RAMDAC_SET_REG(PM3RD_VideoOverlayKeyB, 0xfe); + + return 0; +} + +int vixPlaybackFrameSelect(unsigned int frame) +{ + WRITE_REG(PM3VideoOverlayBase0, frames[frame]); + return 0; +}
--- a/vidix/drivers/radeon.h Fri May 31 22:41:02 2002 +0000 +++ b/vidix/drivers/radeon.h Fri May 31 23:17:43 2002 +0000 @@ -63,6 +63,15 @@ #define CONFIG_CNTL 0x00E0 /* CONFIG_CNTL bit constants */ # define CFG_VGA_RAM_EN 0x00000100 +#ifdef RAGE128 +#define GEN_RESET_CNTL 0x00f0 +# define SOFT_RESET_GUI 0x00000001 +# define SOFT_RESET_VCLK 0x00000100 +# define SOFT_RESET_PCLK 0x00000200 +# define SOFT_RESET_ECP 0x00000400 +# define SOFT_RESET_DISPENG_XCLK 0x00000800 +# define SOFT_RESET_MEMCTLR_XCLK 0x00001000 +#endif #define CONFIG_MEMSIZE 0x00F8 #define CONFIG_APER_0_BASE 0x0100 #define CONFIG_APER_1_BASE 0x0104 @@ -85,7 +94,7 @@ #define AMCGPIO_EN_REG 0x01a8 #define AMCGPIO_MASK 0x0194 #define AMCGPIO_Y_REG 0x01a4 -#define BM_STATUS 0x0160 +/*#define BM_STATUS 0x0160*/ #define MPP_TB_CONFIG 0x01c0 /* ? */ #define MPP_GP_CONFIG 0x01c8 /* ? */ #define VENDOR_ID 0x0F00 @@ -200,10 +209,21 @@ #define MEM_INIT_LATENCY_TIMER 0x0154 #define MEM_SDRAM_MODE_REG 0x0158 #define AGP_BASE 0x0170 +#ifdef RAGE128 +#define PCI_GART_PAGE 0x017c +#define PC_NGUI_MODE 0x0180 +#define PC_NGUI_CTLSTAT 0x0184 +# define PC_FLUSH_GUI (3 << 0) +# define PC_RI_GUI (1 << 2) +# define PC_FLUSH_ALL 0x00ff +# define PC_BUSY (1 << 31) +#define PC_MISC_CNTL 0x0188 +#else #define MEM_IO_CNTL_A1 0x017C #define MEM_IO_CNTL_B0 0x0180 #define MEM_IO_CNTL_B1 0x0184 #define MC_DEBUG 0x0188 +#endif #define MC_STATUS 0x0150 #define MEM_IO_OE_CNTL 0x018C #define MC_FB_LOCATION 0x0148 @@ -554,7 +574,9 @@ # define SCALER_UNKNOWN_FLAG3 0x02000000L /* ??? */ # define SCALER_UNKNOWN_FLAG4 0x04000000L /* ??? */ # define SCALER_DIS_LIMIT 0x08000000L +#ifdef RAGE128 # define SCALER_PRG_LOAD_START 0x10000000L +#endif # define SCALER_INT_EMU 0x20000000L # define SCALER_ENABLE 0x40000000L # define SCALER_SOFT_RESET 0x80000000L @@ -686,6 +708,18 @@ #define OV0_GRAPHICS_KEY_CLR 0x04EC #define OV0_GRAPHICS_KEY_MSK 0x04F0 #define OV0_KEY_CNTL 0x04F4 +#ifdef RAGE128 +# define VIDEO_KEY_FN_MASK 0x00000007L +# define VIDEO_KEY_FN_FALSE 0x00000000L +# define VIDEO_KEY_FN_TRUE 0x00000001L +# define VIDEO_KEY_FN_EQ 0x00000004L +# define VIDEO_KEY_FN_NE 0x00000005L +# define GRAPHIC_KEY_FN_MASK 0x00000070L +# define GRAPHIC_KEY_FN_FALSE 0x00000000L +# define GRAPHIC_KEY_FN_TRUE 0x00000010L +# define GRAPHIC_KEY_FN_EQ 0x00000040L +# define GRAPHIC_KEY_FN_NE 0x00000050L +#else # define VIDEO_KEY_FN_MASK 0x00000003L # define VIDEO_KEY_FN_FALSE 0x00000000L # define VIDEO_KEY_FN_TRUE 0x00000001L @@ -696,6 +730,7 @@ # define GRAPHIC_KEY_FN_TRUE 0x00000010L # define GRAPHIC_KEY_FN_EQ 0x00000020L # define GRAPHIC_KEY_FN_NE 0x00000030L +#endif # define CMP_MIX_MASK 0x00000100L # define CMP_MIX_OR 0x00000000L # define CMP_MIX_AND 0x00000100L @@ -783,6 +818,9 @@ #define SCRATCH_UMSK 0x0770 #define SCRATCH_ADDR 0x0774 #define DMA_GUI_TABLE_ADDR 0x0780 +# define DMA_GUI_COMMAND__BYTE_COUNT_MASK 0x001fffff +# define DMA_GUI_COMMAND__INTDIS 0x40000000 +# define DMA_GUI_COMMAND__EOL 0x80000000 #define DMA_GUI_SRC_ADDR 0x0784 #define DMA_GUI_DST_ADDR 0x0788 #define DMA_GUI_COMMAND 0x078C @@ -990,6 +1028,11 @@ #define DST_Y_X 0x1438 #define DST_WIDTH_HEIGHT 0x1598 #define DST_HEIGHT_WIDTH 0x143c +#ifdef RAGE128 +#define GUI_STAT 0x1740 +# define GUI_FIFOCNT_MASK 0x0fff +# define GUI_ACTIVE (1 << 31) +#endif #define SRC_CLUT_ADDRESS 0x1780 #define SRC_CLUT_DATA 0x1784 #define SRC_CLUT_DATA_RD 0x1788 @@ -1195,13 +1238,29 @@ #define PPLL_DIV_2 0x0006 #define PPLL_DIV_3 0x0007 #define VCLK_ECP_CNTL 0x0008 +# define VCLK_SRC_SEL_MASK 0x03 +# define VCLK_SRC_SEL_CPUCLK 0x00 +# define VCLK_SRC_SEL_PSCANCLK 0x01 +# define VCLK_SRC_SEL_BYTECLK 0x02 +# define VCLK_SRC_SEL_PPLLCLK 0x03 #define HTOTAL_CNTL 0x0009 #define HTOTAL2_CNTL 0x002e /* PLL */ #define M_SPLL_REF_FB_DIV 0x000a #define AGP_PLL_CNTL 0x000b #define SPLL_CNTL 0x000c #define SCLK_CNTL 0x000d +# define DYN_STOP_LAT_MASK 0x00007ff8 +# define CP_MAX_DYN_STOP_LAT 0x0008 +# define SCLK_FORCEON_MASK 0xffff8000 +#define SCLK_MORE_CNTL 0x0035 /* PLL */ +# define SCLK_MORE_FORCEON 0x0700 #define MPLL_CNTL 0x000e +#ifdef RAGE128 +#define MCLK_CNTL 0x000f /* PLL */ +# define FORCE_GCP (1 << 16) +# define FORCE_PIPE3D_CP (1 << 17) +# define FORCE_RCP (1 << 18) +#else #define MCLK_CNTL 0x0012 /* MCLK_CNTL bit constants */ # define FORCEON_MCLKA (1 << 16) @@ -1210,6 +1269,7 @@ # define FORCEON_YCLKB (1 << 19) # define FORCEON_MC (1 << 20) # define FORCEON_AIC (1 << 21) +#endif #define PLL_TEST_CNTL 0x0013 #define P2PLL_CNTL 0x002a /* P2PLL */ # define P2PLL_RESET (1 << 0) @@ -1224,6 +1284,12 @@ # define P2PLL_REF_DIV_MASK 0x03ff # define P2PLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */ # define P2PLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */ +#define PIXCLKS_CNTL 0x002d +# define PIX2CLK_SRC_SEL_MASK 0x03 +# define PIX2CLK_SRC_SEL_CPUCLK 0x00 +# define PIX2CLK_SRC_SEL_PSCANCLK 0x01 +# define PIX2CLK_SRC_SEL_BYTECLK 0x02 +# define PIX2CLK_SRC_SEL_P2PLLCLK 0x03 /* masks */ @@ -1236,15 +1302,43 @@ #define PPLL_FB3_DIV_MASK 0x000007ff #define PPLL_POST3_DIV_MASK 0x00070000 -#define GUI_ACTIVE 0x80000000 +/* BUS MASTERING */ +#define BM_FRAME_BUF_OFFSET 0xA00 +#define BM_SYSTEM_MEM_ADDR 0xA04 +#define BM_COMMAND 0xA08 +# define BM_INTERRUPT_DIS 0x08000000 +# define BM_TRANSFER_DEST_REG 0x10000000 +# define BM_FORCE_TO_PCI 0x20000000 +# define BM_FRAME_OFFSET_HOLD 0x40000000 +# define BM_END_OF_LIST 0x80000000 +#define BM_STATUS 0xA0c +#define BM_QUEUE_STATUS 0xA10 +#define BM_QUEUE_FREE_STATUS 0xA14 +#define BM_CHUNK_0_VAL 0xA18 +# define BM_PTR_FORCE_TO_PCI 0x00200000 +# define BM_PM4_RD_FORCE_TO_PCI 0x00400000 +# define BM_GLOBAL_FORCE_TO_PCI 0x00800000 +# define BM_VIP3_NOCHUNK 0x10000000 +# define BM_VIP2_NOCHUNK 0x20000000 +# define BM_VIP1_NOCHUNK 0x40000000 +# define BM_VIP0_NOCHUNK 0x80000000 +#define BM_CHUNK_1_VAL 0xA1C +#define BM_VIP0_BUF 0xA20 +# define SYSTEM_TRIGGER_SYSTEM_TO_VIDEO 0x0 +# define SYSTEM_TRIGGER_VIDEO_TO_SYSTEM 0x1 +#define BM_VIP0_ACTIVE 0xA24 +#define BM_VIP1_BUF 0xA30 +#define BM_VIP1_ACTIVE 0xA34 +#define BM_VIP2_BUF 0xA40 +#define BM_VIP2_ACTIVE 0xA44 +#define BM_VIP3_BUF 0xA50 +#define BM_VIP3_ACTIVE 0xA54 +#define BM_VIDCAP_BUF0 0xA60 +#define BM_VIDCAP_BUF1 0xA64 +#define BM_VIDCAP_BUF2 0xA68 +#define BM_VIDCAP_ACTIVE 0xA6c +#define BM_GUI 0xA80 -/* GEN_RESET_CNTL bit constants */ -#define SOFT_RESET_GUI 0x00000001 -#define SOFT_RESET_VCLK 0x00000100 -#define SOFT_RESET_PCLK 0x00000200 -#define SOFT_RESET_ECP 0x00000400 -#define SOFT_RESET_DISPENG_XCLK 0x00000800 - /* RAGE THEATER REGISTERS */ #define DMA_VIPH0_COMMAND 0x0A00
--- a/vidix/drivers/radeon_vid.c Fri May 31 22:41:02 2002 +0000 +++ b/vidix/drivers/radeon_vid.c Fri May 31 23:17:43 2002 +0000 @@ -280,6 +280,49 @@ } } +#ifdef RAGE128 +static void _radeon_engine_idle(void); +static void _radeon_fifo_wait(unsigned); +#define radeon_engine_idle() _radeon_engine_idle() +#define radeon_fifo_wait(entries) _radeon_fifo_wait(entries) +/* Flush all dirty data in the Pixel Cache to memory. */ +static __inline__ void radeon_engine_flush ( void ) +{ + unsigned i; + + OUTREGP(PC_NGUI_CTLSTAT, PC_FLUSH_ALL, ~PC_FLUSH_ALL); + for (i = 0; i < 2000000; i++) { + if (!(INREG(PC_NGUI_CTLSTAT) & PC_BUSY)) break; + } +} + +/* Reset graphics card to known state. */ +static void radeon_engine_reset( void ) +{ + uint32_t clock_cntl_index; + uint32_t mclk_cntl; + uint32_t gen_reset_cntl; + + radeon_engine_flush(); + + clock_cntl_index = INREG(CLOCK_CNTL_INDEX); + mclk_cntl = INPLL(MCLK_CNTL); + + OUTPLL(MCLK_CNTL, mclk_cntl | FORCE_GCP | FORCE_PIPE3D_CP); + + gen_reset_cntl = INREG(GEN_RESET_CNTL); + + OUTREG(GEN_RESET_CNTL, gen_reset_cntl | SOFT_RESET_GUI); + INREG(GEN_RESET_CNTL); + OUTREG(GEN_RESET_CNTL, + gen_reset_cntl & (uint32_t)(~SOFT_RESET_GUI)); + INREG(GEN_RESET_CNTL); + + OUTPLL(MCLK_CNTL, mclk_cntl); + OUTREG(CLOCK_CNTL_INDEX, clock_cntl_index); + OUTREG(GEN_RESET_CNTL, gen_reset_cntl); +} +#else static __inline__ void radeon_engine_flush ( void ) { @@ -345,9 +388,10 @@ return; } - +#endif static void radeon_engine_restore( void ) { +#ifndef RAGE128 int pitch64; uint32_t xres,yres,bpp; radeon_fifo_wait(1); @@ -389,11 +433,45 @@ OUTREG(DP_WRITE_MASK, 0xffffffff); radeon_engine_idle(); +#endif +} +#ifdef RAGE128 +static void _radeon_fifo_wait (unsigned entries) +{ + unsigned i; + + for(;;) + { + for (i=0; i<2000000; i++) + if ((INREG(GUI_STAT) & GUI_FIFOCNT_MASK) >= entries) + return; + radeon_engine_reset(); + radeon_engine_restore(); + } } +static void _radeon_engine_idle ( void ) +{ + unsigned i; + + /* ensure FIFO is empty before waiting for idle */ + radeon_fifo_wait (64); + for(;;) + { + for (i=0; i<2000000; i++) { + if ((INREG(GUI_STAT) & GUI_ACTIVE) == 0) { + radeon_engine_flush (); + return; + } + } + radeon_engine_reset(); + radeon_engine_restore(); + } +} +#else static void _radeon_fifo_wait (unsigned entries) { - int i; + unsigned i; for(;;) { @@ -404,7 +482,6 @@ radeon_engine_restore(); } } - static void _radeon_engine_idle ( void ) { int i; @@ -414,7 +491,7 @@ for(;;) { for (i=0; i<2000000; i++) { - if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) { + if (((INREG(RBBM_STATUS) & RBBM_ACTIVE)) == 0) { radeon_engine_flush (); return; } @@ -423,8 +500,7 @@ radeon_engine_restore(); } } - - +#endif #ifndef RAGE128 /* Reference color space transform data */ @@ -1064,6 +1140,10 @@ if(spy > 16 && spu == spy/2 && spv == spy/2) pitch = spy; else pitch = 32; break; + case IMGFMT_YVU9: + if(spy > 32 && spu == spy/4 && spv == spy/4) pitch = spy; + else pitch = 64; + break; default: if(spy >= 16) pitch = spy; else pitch = 16; @@ -1099,6 +1179,7 @@ mpitch = best_pitch-1; switch(config->fourcc) { + case IMGFMT_YVU9: /* 4:2:0 */ case IMGFMT_IYUV: case IMGFMT_YV12: @@ -1125,11 +1206,10 @@ dest_w = config->dest.w; dest_h = config->dest.h; if(radeon_is_dbl_scan()) dest_h *= 2; - else - if(radeon_is_interlace()) dest_h /= 2; besr.dest_bpp = radeon_vid_get_dbpp(); besr.fourcc = config->fourcc; besr.v_inc = (src_h << 20) / dest_h; + if(radeon_is_interlace()) besr.v_inc *= 2; h_inc = (src_w << 12) / dest_w; step_by = 1; while(h_inc >= (2 << 12)) { @@ -1236,46 +1316,50 @@ case IMGFMT_YV12: case IMGFMT_IYUV: awidth = (info->src.w + (pitch-1)) & ~(pitch-1); - info->frame_size = (awidth*(info->src.h+info->src.h/2)+dbpp-1)/dbpp; + info->frame_size = awidth*(info->src.h+info->src.h/2); break; case IMGFMT_RGB32: case IMGFMT_BGR32: awidth = (info->src.w*4 + (pitch-1)) & ~(pitch-1); - info->frame_size = ((awidth*info->src.h)+dbpp-1)/dbpp; + info->frame_size = awidth*info->src.h; break; /* YUY2 YVYU, RGB15, RGB16 */ default: awidth = (info->src.w*2 + (pitch-1)) & ~(pitch-1); - info->frame_size = ((awidth*info->src.h)+dbpp-1)/dbpp; + info->frame_size = awidth*info->src.h; break; } - info->frame_size *= dbpp; } int vixConfigPlayback(vidix_playback_t *info) { - unsigned rgb_size; + unsigned rgb_size,nfr; if(!is_supported_fourcc(info->fourcc)) return ENOSYS; - if(info->num_frames>=VID_PLAY_MAXFRAMES) info->num_frames=VID_PLAY_MAXFRAMES-1; + if(info->num_frames>VID_PLAY_MAXFRAMES) info->num_frames=VID_PLAY_MAXFRAMES; if(info->num_frames==1) besr.double_buff=0; else besr.double_buff=1; radeon_compute_framesize(info); - rgb_size = radeon_get_xres()*radeon_get_yres()*radeon_vid_get_dbpp(); - for(;info->num_frames>0; info->num_frames--) + rgb_size = radeon_get_xres()*radeon_get_yres()*((radeon_vid_get_dbpp()+7)/8); + nfr = info->num_frames; + for(;nfr>0; nfr--) { - radeon_overlay_off = radeon_ram_size - info->frame_size*info->num_frames; + radeon_overlay_off = radeon_ram_size - info->frame_size*nfr; radeon_overlay_off &= 0xffff0000; if(radeon_overlay_off >= (int)rgb_size ) break; } - if(info->num_frames <= 3) - for(;info->num_frames>0; info->num_frames--) + if(nfr <= 3) + { + nfr = info->num_frames; + for(;nfr>0; nfr--) { - radeon_overlay_off = radeon_ram_size - info->frame_size*info->num_frames; + radeon_overlay_off = radeon_ram_size - info->frame_size*nfr; radeon_overlay_off &= 0xffff0000; if(radeon_overlay_off > 0) break; } - if(info->num_frames <= 0) return EINVAL; + } + if(nfr <= 0) return EINVAL; + info->num_frames = nfr; besr.vid_nbufs = info->num_frames; info->dga_addr = (char *)radeon_mem_base + radeon_overlay_off; radeon_vid_init_video(info); @@ -1453,9 +1537,10 @@ { if(radeon_grkey.ckey.op == CKEY_TRUE) { + int dbpp=radeon_vid_get_dbpp(); besr.ckey_on=1; - switch(radeon_vid_get_dbpp()) + switch(dbpp) { case 15: besr.graphics_key_clr= @@ -1486,8 +1571,13 @@ besr.graphics_key_msk=0; besr.graphics_key_clr=0; } - besr.graphics_key_msk = besr.graphics_key_clr; +#ifdef RAGE128 + besr.graphics_key_msk=(1<<dbpp)-1; + besr.ckey_cntl = VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_NE|CMP_MIX_AND; +#else + besr.graphics_key_msk=besr.graphics_key_clr; besr.ckey_cntl = VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_EQ|CMP_MIX_AND; +#endif } else {