changeset 32578:34cc66ab8df4

100l, fix vidix compilation on big-endian
author reimar
date Sun, 28 Nov 2010 15:33:45 +0000
parents f58842aa113d
children b25a7879b23c
files vidix/radeon.h vidix/radeon_vid.c
diffstat 2 files changed, 10 insertions(+), 8 deletions(-) [+]
line wrap: on
line diff
--- a/vidix/radeon.h	Sun Nov 28 15:25:15 2010 +0000
+++ b/vidix/radeon.h	Sun Nov 28 15:33:45 2010 +0000
@@ -77,6 +77,8 @@
 #define	I2C_DATA				0x0098
 #define	CONFIG_CNTL				0x00E0
 /* CONFIG_CNTL bit constants */
+#       define APER_0_BIG_ENDIAN_16BPP_SWAP     0x00000001
+#       define APER_0_BIG_ENDIAN_32BPP_SWAP     0x00000002
 #	define CFG_VGA_RAM_EN			0x00000100
 #ifdef RAGE128
 #define GEN_RESET_CNTL				0x00f0
--- a/vidix/radeon_vid.c	Sun Nov 28 15:25:15 2010 +0000
+++ b/vidix/radeon_vid.c	Sun Nov 28 15:33:45 2010 +0000
@@ -1283,9 +1283,9 @@
     savreg.disp_merge_cntl	= INREG(DISP_MERGE_CNTL);
 #if HAVE_BIGENDIAN
 #ifdef RAGE128
-    savereg.config_cntl         = INREG(CONFIG_CNTL);
+    savreg.config_cntl          = INREG(CONFIG_CNTL);
 #else
-    savereg.config_cntl         = INREG(RADEON_SURFACE_CNTL);
+    savreg.config_cntl          = INREG(SURFACE_CNTL);
 #endif
 #endif
 }
@@ -1301,9 +1301,9 @@
     OUTREG(DISP_MERGE_CNTL,savreg.disp_merge_cntl);
 #if HAVE_BIGENDIAN
 #ifdef RAGE128
-    OUTREG(CONFIG_CNTL, savereg.config_cntl);
+    OUTREG(CONFIG_CNTL, savreg.config_cntl);
 #else
-    OUTREG(RADEON_SURFACE_CNTL, savereg.config_cntl);
+    OUTREG(SURFACE_CNTL, savreg.config_cntl);
 #endif
 #endif
 }
@@ -1371,12 +1371,12 @@
 #if HAVE_BIGENDIAN
 #ifdef RAGE128
    OUTREG(CONFIG_CNTL,
-          savereg.config_cntl &
+          savreg.config_cntl &
           ~(APER_0_BIG_ENDIAN_16BPP_SWAP | APER_0_BIG_ENDIAN_32BPP_SWAP));
 #else
-   OUTREG(RADEON_SURFACE_CNTL,
-          savereg.config_cntl &
-          ~(RADEON_NONSURF_AP0_SWP_32BPP | RADEON_NONSURF_AP0_SWP_16BPP));
+   OUTREG(SURFACE_CNTL,
+          savreg.config_cntl &
+          ~(NONSURF_AP0_SWP_32BPP | NONSURF_AP0_SWP_16BPP));
 #endif
 #endif
   return 0;