Mercurial > mplayer.hg
changeset 10970:de7036f31e5a
Sometimes (especially with big images) reading pitch 0 from card's register
returns 0 (probably due to full card's FIFO), which leads to SIGFPE later.
Fixed (or workarounded) by rereading pitch0, until it's not zero.
| author | lumag |
|---|---|
| date | Wed, 01 Oct 2003 21:03:00 +0000 |
| parents | 667d39c4dc8c |
| children | 12315a6590a1 |
| files | vidix/drivers/nvidia_vid.c |
| diffstat | 1 files changed, 9 insertions(+), 1 deletions(-) [+] |
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--- a/vidix/drivers/nvidia_vid.c Wed Oct 01 20:54:00 2003 +0000 +++ b/vidix/drivers/nvidia_vid.c Wed Oct 01 21:03:00 2003 +0000 @@ -419,6 +419,7 @@ /*update depth & dimensions here because it may change with vo vesa or vo fbdev*/ info->chip.lock (&info->chip, 0); + do { switch (info->chip.arch) { case NV_ARCH_03: pitch0 = info->chip.PGRAPH[0x00000650/4]; @@ -430,6 +431,9 @@ pitch0 = info->chip.PGRAPH[0x00000670/4]; break; } + if (pitch0 == 0) + printf("[nvidia_vid]: pitch0 = 0!!! Rereading\n"); + } while (pitch0 == 0); VID_WR08(info->chip.PCIO, 0x03D4, 0x28); bpp = VID_RD08(info->chip.PCIO,0x03D5); if(bpp==3)bpp = 4; //fixme do nvidia cards support 24bpp? @@ -438,7 +442,7 @@ if(!bpp)printf("[nvidia_vid] error invalid bpp\n"); else { -// printf("[nvidia_vid] video mode: %ux%u@%u\n",screen_x = pitch0/bpp,(pitch0/bpp*3)/4,info->depth); +// printf("[nvidia_vid] video mode: %ux%u@%u\n",info->screen_x = pitch0/bpp,(pitch0/bpp*3)/4,info->depth); info->screen_x = pitch0/bpp; } @@ -673,6 +677,7 @@ { uint32_t bpp=0,pitch0=0; info->chip.lock (&info->chip, 0); + do { switch (info->chip.arch) { case NV_ARCH_03: pitch0 = info->chip.PGRAPH[0x00000650/4]; @@ -684,6 +689,9 @@ pitch0 = info->chip.PGRAPH[0x00000670/4]; break; } + if (pitch0 == 0) + printf("[nvidia_vid]: pitch0 = 0!!! Rereading\n"); + } while (pitch0 == 0); VID_WR08(info->chip.PCIO, 0x03D4, 0x28); bpp = VID_RD08(info->chip.PCIO,0x03D5); if(bpp==3)bpp = 4; //fixme do nvidia cards support 24bpp?