Mercurial > pt1.oyama
annotate driver/pt1_tuner.c @ 86:015481a6a900
clean up a bit.
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Tue, 19 Jan 2010 06:33:08 +0900 (2010-01-18) |
parents | 3c2123189edf |
children | c940283dd890 |
rev | line source |
---|---|
0 | 1 /* pt1-tuner.c: A PT1 on Tuner driver for Linux. */ |
2 | |
3 #include <linux/module.h> | |
4 #include <linux/kernel.h> | |
5 #include <linux/errno.h> | |
6 #include <linux/pci.h> | |
7 #include <linux/init.h> | |
8 #include <linux/interrupt.h> | |
9 #include <linux/mutex.h> | |
10 | |
11 #include <asm/system.h> | |
12 #include <asm/io.h> | |
13 #include <asm/irq.h> | |
14 #include <asm/uaccess.h> | |
15 | |
16 #include "pt1_com.h" | |
17 #include "pt1_pci.h" | |
18 #include "pt1_i2c.h" | |
19 #include "pt1_tuner.h" | |
20 #include "pt1_tuner_data.h" | |
21 | |
22 typedef struct _TUNER_INFO{ | |
23 int isdb_s ; | |
24 int isdb_t ; | |
25 }TUNER_INFO; | |
26 | |
27 TUNER_INFO tuner_info[2] = { | |
28 {T0_ISDB_S, T0_ISDB_T}, | |
29 {T1_ISDB_S, T1_ISDB_T} | |
30 }; | |
31 | |
32 typedef struct _isdb_t_freq_add_table{ | |
33 __u16 pos ; // 追加するチャンネルポジション | |
34 __u16 add_freq ; // 追加する値 | |
35 }isdb_t_freq_add_table; | |
36 | |
37 isdb_t_freq_add_table isdb_t_freq_add[10] = { | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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38 { 7, 0x8081}, // 0~7迄 |
0 | 39 { 12, 0x80A1}, // 8~12迄 |
40 { 21, 0x8062}, // 13~21迄 | |
41 { 39, 0x80A2}, // 22~39迄 | |
42 { 51, 0x80E2}, // 40~51迄 | |
43 { 59, 0x8064}, // 52~59迄 | |
44 { 75, 0x8084}, // 60~75迄 | |
45 { 84, 0x80a4}, // 76~84迄 | |
46 {100, 0x80C4}, // 85~100迄 | |
47 {112, 0x80E4} // 101~112迄 | |
48 }; | |
49 | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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50 void settuner_reset(void __iomem *regs, int cardtype, __u32 lnb, __u32 tuner) |
0 | 51 { |
77 | 52 __u32 val = TUNER_POWER_OFF; |
0 | 53 switch(lnb){ |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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54 case LNB_11V: |
65 | 55 val = (1 << BIT_LNB_DOWN); |
56 break ; | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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57 case LNB_15V: |
65 | 58 val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN); |
59 break ; | |
0 | 60 } |
61 | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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62 if(cardtype == PT1) { |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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63 switch(tuner){ |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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64 case TUNER_POWER_ON_RESET_ENABLE: |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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65 val |= (1 << BIT_TUNER); |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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66 break; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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changeset
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67 case TUNER_POWER_ON_RESET_DISABLE: |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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68 val |= (1 << BIT_TUNER) | (1 << BIT_RESET); |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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69 break ; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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changeset
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70 } |
0 | 71 } |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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72 else if(cardtype == PT2) { |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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73 switch(tuner){ |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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changeset
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74 case TUNER_POWER_ON_RESET_ENABLE: |
69
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
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75 val |= (1 << BIT_TUNER) |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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76 | (1 << BIT_33A1) |
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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77 | (1 << BIT_33A2) |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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78 | (1 << BIT_5A_) |
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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79 | (1 << BIT_5A1) |
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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80 | (1 << BIT_5A2); |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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changeset
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81 break; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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changeset
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82 case TUNER_POWER_ON_RESET_DISABLE: |
69
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
diff
changeset
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83 val |= (1 << BIT_TUNER) |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
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84 | (1 << BIT_RESET) |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
diff
changeset
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85 | (1 << BIT_33A1) |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
diff
changeset
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86 | (1 << BIT_33A2) |
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
diff
changeset
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87 | (1 << BIT_5A_) |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
diff
changeset
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88 | (1 << BIT_5A1) |
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
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changeset
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89 | (1 << BIT_5A2); |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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90 break ; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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changeset
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91 } |
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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changeset
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92 } |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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93 writel(val, (regs + CFG_REGS_ADDR)); |
0 | 94 } |
69
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parents:
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95 static int init_isdb_s(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr) |
0 | 96 { |
97 | |
98 WBLOCK wk; | |
99 int lp ; | |
100 __u32 val ; | |
101 | |
102 // ISDB-S/T初期化 | |
103 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
104 | |
105 // 初期化1(なぜかREADなので) | |
106 memcpy(&wk, &isdb_s_init1, sizeof(WBLOCK)); | |
107 wk.addr = addr; | |
108 val = i2c_read(regs, lock, &wk, 1); | |
71
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109 |
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110 if(cardtype == PT1) { |
79 | 111 if((val & 0xff) != 0x4c) { |
112 printk(KERN_INFO "PT1:ISDB-S Read(%x)\n", val); | |
113 return -EIO ; | |
114 } | |
115 for(lp = 0 ; lp < PT1_MAX_ISDB_S_INIT ; lp++) { | |
69
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116 memcpy(&wk, isdb_s_initial_pt1[lp], sizeof(WBLOCK)); |
71
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117 wk.addr = addr; |
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118 i2c_write(regs, lock, &wk); |
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119 } |
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120 } |
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121 else if(cardtype == PT2) { |
79 | 122 if((val & 0xff) != 0x52) { |
123 printk(KERN_INFO "PT2:ISDB-S Read(%x)\n", val); | |
124 return -EIO ; | |
125 } | |
126 for(lp = 0 ; lp < PT2_MAX_ISDB_S_INIT ; lp++) { | |
69
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127 memcpy(&wk, isdb_s_initial_pt2[lp], sizeof(WBLOCK)); |
71
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128 wk.addr = addr; |
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129 i2c_write(regs, lock, &wk); |
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130 } |
0 | 131 } |
132 | |
133 return 0 ; | |
134 } | |
69
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135 static void init_isdb_t(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr) |
0 | 136 { |
137 int lp ; | |
138 WBLOCK wk; | |
139 | |
140 // ISDB-S/T初期化 | |
71
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141 if(cardtype == PT1) { |
77 | 142 for(lp = 0 ; lp < PT1_MAX_ISDB_T_INIT ; lp++){ |
69
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parents:
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143 memcpy(&wk, isdb_t_initial_pt1[lp], sizeof(WBLOCK)); |
71
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144 wk.addr = addr; |
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145 i2c_write(regs, lock, &wk); |
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146 } |
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147 } |
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148 else if(cardtype == PT2) { |
77 | 149 for(lp = 0 ; lp < PT2_MAX_ISDB_T_INIT ; lp++){ |
69
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parents:
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150 memcpy(&wk, isdb_t_initial_pt2[lp], sizeof(WBLOCK)); |
71
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151 wk.addr = addr; |
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152 i2c_write(regs, lock, &wk); |
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153 } |
0 | 154 } |
71
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155 } |
0 | 156 |
69
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
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157 int tuner_init(void __iomem *regs, int cardtype, struct mutex *lock, int tuner_no) |
0 | 158 { |
159 | |
160 int rc ; | |
161 WBLOCK wk; | |
162 | |
163 // ISDB-S/T初期化 | |
164 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
165 | |
166 // 初期化(共通) | |
167 wk.addr = tuner_info[tuner_no].isdb_t ; | |
168 i2c_write(regs, lock, &wk); | |
169 wk.addr = tuner_info[tuner_no].isdb_s ; | |
170 i2c_write(regs, lock, &wk); | |
171 | |
69
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parents:
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172 rc = init_isdb_s(regs, cardtype, lock, tuner_info[tuner_no].isdb_s); |
0 | 173 if(rc < 0){ |
174 return rc ; | |
175 } | |
69
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parents:
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176 init_isdb_t(regs, cardtype, lock, tuner_info[tuner_no].isdb_t); |
0 | 177 |
178 memcpy(&wk, &isdb_s_init21, sizeof(WBLOCK)); | |
179 wk.addr = tuner_info[tuner_no].isdb_s ; | |
180 i2c_write(regs, lock, &wk); | |
181 | |
182 memcpy(&wk, &isdb_t_init17, sizeof(WBLOCK)); | |
183 wk.addr = tuner_info[tuner_no].isdb_t ; | |
184 i2c_write(regs, lock, &wk); | |
185 | |
186 return 0 ; | |
187 } | |
188 void set_sleepmode(void __iomem *regs, struct mutex *lock, int address, int tuner_type, int type) | |
189 { | |
190 WBLOCK wk; | |
191 | |
192 if(type == TYPE_WAKEUP){ | |
193 switch(tuner_type){ | |
77 | 194 case CHANNEL_TYPE_ISDB_S: |
195 printk(KERN_INFO "PT1:ISDB-S Wakeup\n"); | |
196 memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK)); | |
197 wk.addr = address ; | |
198 i2c_write(regs, lock, &wk); | |
199 | |
200 memcpy(&wk, &isdb_s_sleep, sizeof(WBLOCK)); | |
201 wk.value[1] = 0x01 ; | |
202 wk.addr = address ; | |
203 i2c_write(regs, lock, &wk); | |
204 break ; | |
205 case CHANNEL_TYPE_ISDB_T: | |
206 printk(KERN_INFO "PT1:ISDB-T Wakeup\n"); | |
207 memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK)); | |
208 wk.addr = address ; | |
209 i2c_write(regs, lock, &wk); | |
210 | |
211 memcpy(&wk, &isdb_s_sleep, sizeof(WBLOCK)); | |
212 wk.value[1] = 0x90 ; | |
213 wk.addr = address ; | |
214 i2c_write(regs, lock, &wk); | |
215 break ; | |
0 | 216 } |
217 } | |
77 | 218 if(type == TYPE_SLEEP){ |
219 switch(tuner_type){ | |
0 | 220 case CHANNEL_TYPE_ISDB_S: |
221 printk(KERN_INFO "PT1:ISDB-S Sleep\n"); | |
222 memcpy(&wk, &isdb_s_sleep, sizeof(WBLOCK)); | |
77 | 223 wk.addr = address; |
224 i2c_write(regs, lock, &wk); | |
0 | 225 break ; |
226 case CHANNEL_TYPE_ISDB_T: | |
227 printk(KERN_INFO "PT1:ISDB-T Sleep\n"); | |
228 memcpy(&wk, &isdb_t_sleep, sizeof(WBLOCK)); | |
77 | 229 wk.addr = address; |
230 i2c_write(regs, lock, &wk); | |
0 | 231 break ; |
77 | 232 } |
0 | 233 } |
234 } | |
235 | |
236 int bs_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel) | |
237 { | |
238 int lp ; | |
239 int tmcclock = FALSE ; | |
240 WBLOCK wk; | |
241 __u32 val ; | |
242 | |
243 if(channel >= MAX_BS_CHANNEL){ | |
244 return -EIO ; | |
245 } | |
246 // ISDB-S PLLロック | |
247 for(lp = 0 ; lp < MAX_BS_CHANNEL_PLL_COMMAND ; lp++){ | |
248 memcpy(&wk, bs_pll[channel].wblock[lp], sizeof(WBLOCK)); | |
249 wk.addr = addr ; | |
250 i2c_write(regs, lock, &wk); | |
251 } | |
252 | |
253 // PLLロック確認 | |
254 // チェック用 | |
255 for(lp = 0 ; lp < 200 ; lp++){ | |
256 memcpy(&wk, &bs_pll_lock, sizeof(WBLOCK)); | |
257 wk.addr = addr; | |
258 val = i2c_read(regs, lock, &wk, 1); | |
259 if(((val & 0xFF) != 0) && ((val & 0XFF) != 0XFF)){ | |
260 tmcclock = TRUE ; | |
261 break ; | |
262 } | |
263 } | |
264 | |
265 if(tmcclock == FALSE){ | |
266 printk(KERN_INFO "PLL LOCK ERROR\n"); | |
267 return -EIO; | |
268 } | |
269 | |
270 memcpy(&wk, &bs_tmcc_get_1, sizeof(WBLOCK)); | |
271 wk.addr = addr; | |
272 i2c_write(regs, lock, &wk); | |
273 | |
274 tmcclock = FALSE ; | |
275 | |
276 for(lp = 0 ; lp < 200 ; lp++){ | |
277 memcpy(&wk, &bs_tmcc_get_2, sizeof(WBLOCK)); | |
278 wk.addr = addr; | |
279 | |
280 val = i2c_read(regs, lock, &wk, 1); | |
281 if(((val & 0XFF) != 0XFF) && (!(val & 0x10))){ | |
282 tmcclock = TRUE ; | |
283 break ; | |
284 } | |
285 } | |
286 | |
287 if(tmcclock == FALSE){ | |
288 printk(KERN_INFO "TMCC LOCK ERROR\n"); | |
289 return -EIO; | |
290 } | |
291 | |
292 return 0 ; | |
293 } | |
294 int ts_lock(void __iomem *regs, struct mutex *lock, int addr, __u16 ts_id) | |
295 { | |
296 | |
297 int lp ; | |
298 WBLOCK wk; | |
299 __u32 val ; | |
300 union{ | |
301 __u8 ts[2]; | |
302 __u16 tsid; | |
303 }uts_id ; | |
304 | |
305 uts_id.tsid = ts_id ; | |
306 memcpy(&wk, &bs_set_ts_lock, sizeof(WBLOCK)); | |
307 wk.addr = addr; | |
308 // TS-ID設定 | |
309 wk.value[1] = uts_id.ts[1]; | |
310 wk.value[2] = uts_id.ts[0]; | |
311 i2c_write(regs, lock, &wk); | |
312 | |
313 for(lp = 0 ; lp < 100 ; lp++){ | |
314 memcpy(&wk, &bs_get_ts_lock, sizeof(WBLOCK)); | |
315 wk.addr = addr; | |
316 val = i2c_read(regs, lock, &wk, 2); | |
317 if((val & 0xFFFF) == ts_id){ | |
318 return 0 ; | |
319 } | |
320 } | |
321 printk(KERN_INFO "PT1:ERROR TS-LOCK(%x)\n", ts_id); | |
322 return -EIO ; | |
323 } | |
324 int bs_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_S_TMCC *tmcc) | |
325 { | |
326 | |
327 int lp ; | |
328 int lp2; | |
329 WBLOCK wk; | |
330 __u32 val ; | |
331 ISDB_S_TS_ID *tsid ; | |
332 union{ | |
333 __u8 slot[4]; | |
334 __u32 u32slot; | |
335 }ts_slot ; | |
336 union{ | |
337 __u16 ts[2]; | |
338 __u32 tsid; | |
339 }ts_id ; | |
340 | |
341 if(channel >= MAX_BS_CHANNEL){ | |
342 printk(KERN_INFO "Invalid Channel(%d)\n", channel); | |
343 return -EIO ; | |
344 } | |
345 val = bs_frequency(regs, lock, addr, channel); | |
346 if(val == -EIO){ | |
347 return val ; | |
348 } | |
349 | |
350 tsid = &tmcc->ts_id[0] ; | |
351 // 該当周波数のTS-IDを取得 | |
352 for(lp = 0 ; lp < (MAX_BS_TS_ID / 2) ; lp++){ | |
353 for(lp2 = 0 ; lp2 < 100 ; lp2++){ | |
354 memcpy(&wk, bs_get_ts_id[lp], sizeof(WBLOCK)); | |
355 wk.addr = addr; | |
356 ts_id.tsid = i2c_read(regs, lock, &wk, 4); | |
357 // TS-IDが0の場合は再取得する | |
358 if((ts_id.ts[0] != 0) && (ts_id.ts[1] != 0)){ | |
359 break ; | |
360 } | |
361 } | |
362 tsid->ts_id = ts_id.ts[1] ; | |
363 tsid += 1; | |
364 tsid->ts_id = ts_id.ts[0] ; | |
365 tsid += 1; | |
366 } | |
367 | |
368 memcpy(&wk, &bs_get_agc, sizeof(WBLOCK)); | |
369 wk.addr = addr; | |
370 tmcc->agc = i2c_read(regs, lock, &wk, 1); | |
371 | |
372 // TS-ID別の情報を取得 | |
373 tsid = &tmcc->ts_id[0] ; | |
374 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++, tsid += 1){ | |
375 // TS-IDなし=0XFFFF | |
376 if(tsid->ts_id == 0xFFFF){ | |
377 continue ; | |
378 } | |
379 ts_lock(regs, lock, addr, tsid->ts_id); | |
380 | |
381 //スロット取得 | |
382 memcpy(&wk, &bs_get_slot, sizeof(WBLOCK)); | |
383 wk.addr = addr; | |
384 ts_slot.u32slot = i2c_read(regs, lock, &wk, 3); | |
385 tsid->high_mode = 0; | |
386 tsid->low_slot = ts_slot.slot[0] ; | |
387 tsid->high_slot = ts_slot.slot[1] ; | |
388 tsid->low_mode = ts_slot.slot[2] ; | |
389 } | |
390 | |
391 memcpy(&wk, &bs_get_clock, sizeof(WBLOCK)); | |
392 wk.addr = addr; | |
393 tmcc->clockmargin = i2c_read(regs, lock, &wk, 1); | |
394 | |
395 memcpy(&wk, &bs_get_carrir, sizeof(WBLOCK)); | |
396 wk.addr = addr; | |
397 tmcc->carriermargin = i2c_read(regs, lock, &wk, 1); | |
398 return 0 ; | |
399 } | |
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400 int isdb_s_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
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401 { |
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402 WBLOCK wk; |
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403 __u32 val ; |
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404 __u32 val2; |
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405 int val3 ; |
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406 |
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407 memcpy(&wk, &bs_get_signal1, sizeof(WBLOCK)); |
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408 wk.addr = addr; |
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409 val = i2c_read(regs, lock, &wk, 1); |
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410 |
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411 memcpy(&wk, &bs_get_signal2, sizeof(WBLOCK)); |
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412 wk.addr = addr; |
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413 val2 = i2c_read(regs, lock, &wk, 1); |
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414 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
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415 |
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416 return val3 ; |
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417 } |
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418 |
0 | 419 __u32 getfrequency_add(__u32 channel) |
420 { | |
421 int lp ; | |
422 | |
423 for(lp = 0 ; lp < 10 ; lp++){ | |
424 if(channel <= isdb_t_freq_add[lp].pos){ | |
425 return isdb_t_freq_add[lp].add_freq ; | |
426 } | |
427 } | |
428 return 0 ; | |
429 } | |
430 __u32 getfrequency(__u32 channel, int addfreq) | |
431 { | |
432 __u32 frequencyoffset = 0; | |
433 __u32 frequencyOffset = 0; | |
434 | |
435 if (12 <= channel){ | |
436 frequencyoffset += 2; | |
437 }else if (17 <= channel){ | |
438 frequencyoffset = 0; | |
439 }else if (63 <= channel){ | |
440 frequencyoffset += 2; | |
441 } | |
442 #if 0 | |
443 return (((93 + channel * 6 + frequencyOffset) + addfreq) * 7) + 400; | |
444 #endif | |
445 frequencyOffset = 93 + channel * 6 + frequencyoffset; | |
446 frequencyOffset = 7 * (frequencyOffset + addfreq); | |
447 return frequencyOffset + 400; | |
448 | |
449 } | |
450 int isdb_t_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel, int addfreq) | |
451 { | |
452 | |
453 int lp ; | |
454 WBLOCK wk; | |
455 __u32 val ; | |
456 int tmcclock = FALSE ; | |
457 union{ | |
458 __u8 charfreq[2]; | |
459 __u16 freq; | |
460 }freq[2] ; | |
461 | |
462 if(channel >= MAX_ISDB_T_CHANNEL){ | |
463 return -EIO ; | |
464 } | |
465 | |
466 freq[0].freq = getfrequency(channel, addfreq); | |
467 freq[1].freq = getfrequency_add(channel); | |
468 //指定周波数 | |
469 memcpy(&wk, &isdb_t_pll_base, sizeof(WBLOCK)); | |
470 wk.addr = addr ; | |
471 // 計算した周波数を設定 | |
472 wk.value[wk.count] = freq[0].charfreq[1]; | |
473 wk.count += 1 ; | |
474 wk.value[wk.count] = freq[0].charfreq[0]; | |
475 wk.count += 1 ; | |
476 | |
477 // 計算した周波数付加情報を設定 | |
478 wk.value[wk.count] = freq[1].charfreq[1]; | |
479 wk.count += 1 ; | |
480 wk.value[wk.count] = freq[1].charfreq[0]; | |
481 wk.count += 1 ; | |
482 | |
483 i2c_write(regs, lock, &wk); | |
484 | |
485 for(lp = 0 ; lp < 100 ; lp++){ | |
486 memcpy(&wk, &isdb_t_pll_lock, sizeof(WBLOCK)); | |
487 wk.addr = addr; | |
488 val = i2c_read(regs, lock, &wk, 1); | |
489 if(((val & 0xFF) != 0XFF) && ((val & 0X50) == 0x50)){ | |
490 tmcclock = TRUE ; | |
491 break ; | |
492 } | |
493 } | |
494 if(tmcclock != TRUE){ | |
495 printk(KERN_INFO "PT1:ISDB-T LOCK NG(%08x)\n", val); | |
496 return -EIO ; | |
497 } | |
498 | |
499 memcpy(&wk, &isdb_t_check_tune, sizeof(WBLOCK)); | |
500 wk.addr = addr ; | |
501 i2c_write(regs, lock, &wk); | |
502 | |
503 tmcclock = FALSE ; | |
504 for(lp = 0 ; lp < 1000 ; lp++){ | |
505 memcpy(&wk, &isdb_t_tune_read, sizeof(WBLOCK)); | |
506 wk.addr = addr; | |
507 val = i2c_read(regs, lock, &wk, 1); | |
508 if(((val & 0xFF) != 0XFF) && ((val & 0X8) != 8)){ | |
509 tmcclock = TRUE ; | |
510 break ; | |
511 } | |
512 } | |
513 if(tmcclock != TRUE){ | |
514 return -EIO ; | |
515 } | |
516 return 0 ; | |
517 } | |
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518 int isdb_t_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
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519 { |
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520 __u32 val ; |
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521 __u32 val2; |
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522 __u32 val3; |
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523 WBLOCK wk; |
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524 |
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525 memcpy(&wk, &isdb_t_signal1, sizeof(WBLOCK)); |
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526 wk.addr = addr; |
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527 val = i2c_read(regs, lock, &wk, 1); |
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528 printk(KERN_INFO "CN(1)Val(%x)\n", val); |
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529 |
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530 memcpy(&wk, &isdb_t_signal2, sizeof(WBLOCK)); |
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531 wk.addr = addr; |
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532 val2 = i2c_read(regs, lock, &wk, 1); |
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533 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
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534 return val3 ; |
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535 } |
0 | 536 #if 0 |
537 int isdb_t_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_T_TMCC *tmcc) | |
538 { | |
539 | |
540 int lp ; | |
541 int rc ; | |
542 int lp2 ; | |
543 WBLOCK wk; | |
544 __u32 val ; | |
545 | |
546 printk(KERN_INFO "Channel(%d) Start\n", channel); | |
547 if(channel >= MAX_ISDB_T_CHANNEL){ | |
548 return -EIO ; | |
549 } | |
550 rc = isdb_t_frequency(regs, lock, addr, channel); | |
551 if(rc < 0){ | |
552 return -EIO ; | |
553 } | |
554 for(lp = 0 ; lp < 100 ; lp++){ | |
555 memcpy(&wk, &isdb_t_tmcc_read_1, sizeof(WBLOCK)); | |
556 wk.addr = addr; | |
557 val = i2c_read(regs, lock, &wk, 4); | |
558 if((val & 0xFF) != 0){ | |
559 break ; | |
560 } | |
561 } | |
562 printk(KERN_INFO "TMCC(1)Val(%x)\n", val); | |
563 | |
564 for(lp = 0 ; lp < 100 ; lp++){ | |
565 memcpy(&wk, &isdb_t_tmcc_read_2, sizeof(WBLOCK)); | |
566 wk.addr = addr; | |
567 val = i2c_read(regs, lock, &wk, 4); | |
568 if((val & 0xFF) != 0){ | |
569 break ; | |
570 } | |
571 } | |
572 printk(KERN_INFO "TMCC(2)Val(%x)\n", val); | |
573 | |
574 memcpy(&wk, &isdb_t_cn_1, sizeof(WBLOCK)); | |
575 wk.addr = addr; | |
576 val = i2c_read(regs, lock, &wk, 1); | |
577 printk(KERN_INFO "CN(1)Val(%x)\n", val); | |
578 | |
579 memcpy(&wk, &isdb_t_cn_2, sizeof(WBLOCK)); | |
580 wk.addr = addr; | |
581 val = i2c_read(regs, lock, &wk, 1); | |
582 printk(KERN_INFO "CN(2)Val(%x)\n", val); | |
583 | |
584 memcpy(&wk, &isdb_t_agc_1, sizeof(WBLOCK)); | |
585 wk.addr = addr; | |
586 val = i2c_read(regs, lock, &wk, 1); | |
587 printk(KERN_INFO "AGC(1)Val(%x)\n", val); | |
588 | |
589 memcpy(&wk, &isdb_t_agc_2, sizeof(WBLOCK)); | |
590 wk.addr = addr; | |
591 val = i2c_read(regs, lock, &wk, 1); | |
592 printk(KERN_INFO "AGC(2)Val(%x)\n", val); | |
593 return 0; | |
594 } | |
595 #endif |