Mercurial > pt1.oyama
annotate driver/pt1_tuner.c @ 106:12b9192becaa
avoid infinite loop. length in the first descriptor loop can be zero.
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Sat, 27 Feb 2010 04:10:16 +0900 |
parents | 6e661e828b43 |
children | 4303bbfd5d37 |
rev | line source |
---|---|
0 | 1 /* pt1-tuner.c: A PT1 on Tuner driver for Linux. */ |
2 | |
3 #include <linux/module.h> | |
4 #include <linux/kernel.h> | |
5 #include <linux/errno.h> | |
6 #include <linux/pci.h> | |
7 #include <linux/init.h> | |
8 #include <linux/interrupt.h> | |
9 #include <linux/mutex.h> | |
10 | |
11 #include <asm/system.h> | |
12 #include <asm/io.h> | |
13 #include <asm/irq.h> | |
14 #include <asm/uaccess.h> | |
15 | |
16 #include "pt1_com.h" | |
17 #include "pt1_pci.h" | |
18 #include "pt1_i2c.h" | |
19 #include "pt1_tuner.h" | |
20 #include "pt1_tuner_data.h" | |
21 | |
22 typedef struct _TUNER_INFO{ | |
23 int isdb_s ; | |
24 int isdb_t ; | |
25 }TUNER_INFO; | |
26 | |
27 TUNER_INFO tuner_info[2] = { | |
28 {T0_ISDB_S, T0_ISDB_T}, | |
29 {T1_ISDB_S, T1_ISDB_T} | |
30 }; | |
31 | |
32 typedef struct _isdb_t_freq_add_table{ | |
33 __u16 pos ; // Äɲ乤ë¥Á¥ã¥ó¥Í¥ë¥Ý¥¸¥·¥ç¥ó | |
34 __u16 add_freq ; // Äɲ乤ëÃÍ | |
35 }isdb_t_freq_add_table; | |
36 | |
37 isdb_t_freq_add_table isdb_t_freq_add[10] = { | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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38 { 7, 0x8081}, // 0¡Á7Ëø |
0 | 39 { 12, 0x80A1}, // 8¡Á12Ëø |
40 { 21, 0x8062}, // 13¡Á21Ëø | |
41 { 39, 0x80A2}, // 22¡Á39Ëø | |
42 { 51, 0x80E2}, // 40¡Á51Ëø | |
43 { 59, 0x8064}, // 52¡Á59Ëø | |
44 { 75, 0x8084}, // 60¡Á75Ëø | |
45 { 84, 0x80a4}, // 76¡Á84Ëø | |
46 {100, 0x80C4}, // 85¡Á100Ëø | |
47 {112, 0x80E4} // 101¡Á112Ëø | |
48 }; | |
49 | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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50 void settuner_reset(void __iomem *regs, int cardtype, __u32 lnb, __u32 tuner) |
0 | 51 { |
77 | 52 __u32 val = TUNER_POWER_OFF; |
0 | 53 switch(lnb){ |
64
98a92ce5382e
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parents:
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54 case LNB_11V: |
65 | 55 val = (1 << BIT_LNB_DOWN); |
56 break ; | |
64
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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57 case LNB_15V: |
65 | 58 val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN); |
59 break ; | |
0 | 60 } |
61 | |
64
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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62 if(cardtype == PT1) { |
98a92ce5382e
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parents:
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63 switch(tuner){ |
98a92ce5382e
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parents:
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64 case TUNER_POWER_ON_RESET_ENABLE: |
98a92ce5382e
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parents:
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65 val |= (1 << BIT_TUNER); |
98a92ce5382e
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parents:
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66 break; |
98a92ce5382e
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parents:
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67 case TUNER_POWER_ON_RESET_DISABLE: |
98a92ce5382e
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parents:
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68 val |= (1 << BIT_TUNER) | (1 << BIT_RESET); |
98a92ce5382e
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parents:
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69 break ; |
98a92ce5382e
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parents:
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70 } |
0 | 71 } |
64
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72 else if(cardtype == PT2) { |
98a92ce5382e
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parents:
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73 switch(tuner){ |
98a92ce5382e
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74 case TUNER_POWER_ON_RESET_ENABLE: |
69
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75 val |= (1 << BIT_TUNER) |
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76 | (1 << BIT_33A1) |
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77 | (1 << BIT_33A2) |
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78 | (1 << BIT_5A_) |
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79 | (1 << BIT_5A1) |
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80 | (1 << BIT_5A2); |
64
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81 break; |
98a92ce5382e
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parents:
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82 case TUNER_POWER_ON_RESET_DISABLE: |
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83 val |= (1 << BIT_TUNER) |
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84 | (1 << BIT_RESET) |
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85 | (1 << BIT_33A1) |
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86 | (1 << BIT_33A2) |
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87 | (1 << BIT_5A_) |
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88 | (1 << BIT_5A1) |
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89 | (1 << BIT_5A2); |
64
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90 break ; |
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91 } |
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92 } |
98a92ce5382e
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93 writel(val, (regs + CFG_REGS_ADDR)); |
0 | 94 } |
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95 static int init_isdb_s(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr) |
0 | 96 { |
97 | |
98 WBLOCK wk; | |
99 int lp ; | |
100 __u32 val ; | |
101 | |
102 // ISDB-S/T½é´ü²½ | |
103 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
104 | |
105 // ½é´ü²½£±(¤Ê¤¼¤«READ¤Ê¤Î¤Ç) | |
106 memcpy(&wk, &isdb_s_init1, sizeof(WBLOCK)); | |
107 wk.addr = addr; | |
108 val = i2c_read(regs, lock, &wk, 1); | |
71
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109 |
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110 if(cardtype == PT1) { |
79 | 111 if((val & 0xff) != 0x4c) { |
112 printk(KERN_INFO "PT1:ISDB-S Read(%x)\n", val); | |
113 return -EIO ; | |
114 } | |
115 for(lp = 0 ; lp < PT1_MAX_ISDB_S_INIT ; lp++) { | |
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116 memcpy(&wk, isdb_s_initial_pt1[lp], sizeof(WBLOCK)); |
71
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117 wk.addr = addr; |
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118 i2c_write(regs, lock, &wk); |
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119 } |
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120 } |
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121 else if(cardtype == PT2) { |
79 | 122 if((val & 0xff) != 0x52) { |
123 printk(KERN_INFO "PT2:ISDB-S Read(%x)\n", val); | |
124 return -EIO ; | |
125 } | |
126 for(lp = 0 ; lp < PT2_MAX_ISDB_S_INIT ; lp++) { | |
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127 memcpy(&wk, isdb_s_initial_pt2[lp], sizeof(WBLOCK)); |
71
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128 wk.addr = addr; |
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129 i2c_write(regs, lock, &wk); |
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130 } |
0 | 131 } |
132 | |
133 return 0 ; | |
134 } | |
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135 static void init_isdb_t(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr) |
0 | 136 { |
137 int lp ; | |
138 WBLOCK wk; | |
139 | |
140 // ISDB-S/T½é´ü²½ | |
71
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141 if(cardtype == PT1) { |
77 | 142 for(lp = 0 ; lp < PT1_MAX_ISDB_T_INIT ; lp++){ |
69
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143 memcpy(&wk, isdb_t_initial_pt1[lp], sizeof(WBLOCK)); |
71
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144 wk.addr = addr; |
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145 i2c_write(regs, lock, &wk); |
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146 } |
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147 } |
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148 else if(cardtype == PT2) { |
77 | 149 for(lp = 0 ; lp < PT2_MAX_ISDB_T_INIT ; lp++){ |
69
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150 memcpy(&wk, isdb_t_initial_pt2[lp], sizeof(WBLOCK)); |
71
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151 wk.addr = addr; |
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152 i2c_write(regs, lock, &wk); |
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153 } |
0 | 154 } |
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155 } |
0 | 156 |
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157 int tuner_init(void __iomem *regs, int cardtype, struct mutex *lock, int tuner_no) |
0 | 158 { |
159 | |
160 int rc ; | |
161 WBLOCK wk; | |
162 | |
163 // ISDB-S/T½é´ü²½ | |
164 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
165 | |
166 // ½é´ü²½(¶¦ÄÌ) | |
167 wk.addr = tuner_info[tuner_no].isdb_t ; | |
168 i2c_write(regs, lock, &wk); | |
169 wk.addr = tuner_info[tuner_no].isdb_s ; | |
170 i2c_write(regs, lock, &wk); | |
171 | |
69
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172 rc = init_isdb_s(regs, cardtype, lock, tuner_info[tuner_no].isdb_s); |
0 | 173 if(rc < 0){ |
174 return rc ; | |
175 } | |
69
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176 init_isdb_t(regs, cardtype, lock, tuner_info[tuner_no].isdb_t); |
0 | 177 |
178 memcpy(&wk, &isdb_s_init21, sizeof(WBLOCK)); | |
179 wk.addr = tuner_info[tuner_no].isdb_s ; | |
180 i2c_write(regs, lock, &wk); | |
181 | |
182 memcpy(&wk, &isdb_t_init17, sizeof(WBLOCK)); | |
183 wk.addr = tuner_info[tuner_no].isdb_t ; | |
184 i2c_write(regs, lock, &wk); | |
185 | |
186 return 0 ; | |
187 } | |
188 void set_sleepmode(void __iomem *regs, struct mutex *lock, int address, int tuner_type, int type) | |
189 { | |
190 WBLOCK wk; | |
191 | |
192 if(type == TYPE_WAKEUP){ | |
193 switch(tuner_type){ | |
77 | 194 case CHANNEL_TYPE_ISDB_S: |
195 printk(KERN_INFO "PT1:ISDB-S Wakeup\n"); | |
196 memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK)); | |
102
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197 wk.addr = address; |
77 | 198 i2c_write(regs, lock, &wk); |
199 | |
102
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200 memcpy(&wk, &isdb_s_wake2, sizeof(WBLOCK)); |
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201 wk.addr = address; |
77 | 202 i2c_write(regs, lock, &wk); |
203 break ; | |
204 case CHANNEL_TYPE_ISDB_T: | |
205 printk(KERN_INFO "PT1:ISDB-T Wakeup\n"); | |
206 memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK)); | |
102
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207 wk.addr = address; |
77 | 208 i2c_write(regs, lock, &wk); |
209 | |
102
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210 memcpy(&wk, &isdb_t_wake2, sizeof(WBLOCK)); |
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211 wk.addr = address; |
77 | 212 i2c_write(regs, lock, &wk); |
213 break ; | |
0 | 214 } |
215 } | |
77 | 216 if(type == TYPE_SLEEP){ |
217 switch(tuner_type){ | |
0 | 218 case CHANNEL_TYPE_ISDB_S: |
219 printk(KERN_INFO "PT1:ISDB-S Sleep\n"); | |
220 memcpy(&wk, &isdb_s_sleep, sizeof(WBLOCK)); | |
77 | 221 wk.addr = address; |
222 i2c_write(regs, lock, &wk); | |
0 | 223 break ; |
224 case CHANNEL_TYPE_ISDB_T: | |
225 printk(KERN_INFO "PT1:ISDB-T Sleep\n"); | |
226 memcpy(&wk, &isdb_t_sleep, sizeof(WBLOCK)); | |
77 | 227 wk.addr = address; |
228 i2c_write(regs, lock, &wk); | |
0 | 229 break ; |
77 | 230 } |
0 | 231 } |
232 } | |
233 | |
234 int bs_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel) | |
235 { | |
236 int lp ; | |
237 int tmcclock = FALSE ; | |
238 WBLOCK wk; | |
239 __u32 val ; | |
240 | |
241 if(channel >= MAX_BS_CHANNEL){ | |
242 return -EIO ; | |
243 } | |
244 // ISDB-S PLL¥í¥Ã¥¯ | |
245 for(lp = 0 ; lp < MAX_BS_CHANNEL_PLL_COMMAND ; lp++){ | |
246 memcpy(&wk, bs_pll[channel].wblock[lp], sizeof(WBLOCK)); | |
247 wk.addr = addr ; | |
248 i2c_write(regs, lock, &wk); | |
249 } | |
250 | |
251 // PLL¥í¥Ã¥¯³Îǧ | |
252 // ¥Á¥§¥Ã¥¯ÍÑ | |
253 for(lp = 0 ; lp < 200 ; lp++){ | |
254 memcpy(&wk, &bs_pll_lock, sizeof(WBLOCK)); | |
255 wk.addr = addr; | |
256 val = i2c_read(regs, lock, &wk, 1); | |
257 if(((val & 0xFF) != 0) && ((val & 0XFF) != 0XFF)){ | |
258 tmcclock = TRUE ; | |
259 break ; | |
260 } | |
261 } | |
262 | |
263 if(tmcclock == FALSE){ | |
264 printk(KERN_INFO "PLL LOCK ERROR\n"); | |
265 return -EIO; | |
266 } | |
267 | |
268 memcpy(&wk, &bs_tmcc_get_1, sizeof(WBLOCK)); | |
269 wk.addr = addr; | |
270 i2c_write(regs, lock, &wk); | |
271 | |
272 tmcclock = FALSE ; | |
273 | |
274 for(lp = 0 ; lp < 200 ; lp++){ | |
275 memcpy(&wk, &bs_tmcc_get_2, sizeof(WBLOCK)); | |
276 wk.addr = addr; | |
277 | |
278 val = i2c_read(regs, lock, &wk, 1); | |
279 if(((val & 0XFF) != 0XFF) && (!(val & 0x10))){ | |
280 tmcclock = TRUE ; | |
281 break ; | |
282 } | |
283 } | |
284 | |
285 if(tmcclock == FALSE){ | |
286 printk(KERN_INFO "TMCC LOCK ERROR\n"); | |
287 return -EIO; | |
288 } | |
289 | |
290 return 0 ; | |
291 } | |
292 int ts_lock(void __iomem *regs, struct mutex *lock, int addr, __u16 ts_id) | |
293 { | |
294 | |
295 int lp ; | |
296 WBLOCK wk; | |
297 __u32 val ; | |
298 union{ | |
299 __u8 ts[2]; | |
300 __u16 tsid; | |
301 }uts_id ; | |
302 | |
303 uts_id.tsid = ts_id ; | |
304 memcpy(&wk, &bs_set_ts_lock, sizeof(WBLOCK)); | |
305 wk.addr = addr; | |
306 // TS-IDÀßÄê | |
307 wk.value[1] = uts_id.ts[1]; | |
308 wk.value[2] = uts_id.ts[0]; | |
309 i2c_write(regs, lock, &wk); | |
310 | |
311 for(lp = 0 ; lp < 100 ; lp++){ | |
312 memcpy(&wk, &bs_get_ts_lock, sizeof(WBLOCK)); | |
313 wk.addr = addr; | |
314 val = i2c_read(regs, lock, &wk, 2); | |
315 if((val & 0xFFFF) == ts_id){ | |
316 return 0 ; | |
317 } | |
318 } | |
319 printk(KERN_INFO "PT1:ERROR TS-LOCK(%x)\n", ts_id); | |
320 return -EIO ; | |
321 } | |
322 int bs_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_S_TMCC *tmcc) | |
323 { | |
324 | |
325 int lp ; | |
326 int lp2; | |
327 WBLOCK wk; | |
328 __u32 val ; | |
329 ISDB_S_TS_ID *tsid ; | |
330 union{ | |
331 __u8 slot[4]; | |
332 __u32 u32slot; | |
333 }ts_slot ; | |
334 union{ | |
335 __u16 ts[2]; | |
336 __u32 tsid; | |
337 }ts_id ; | |
338 | |
339 if(channel >= MAX_BS_CHANNEL){ | |
340 printk(KERN_INFO "Invalid Channel(%d)\n", channel); | |
341 return -EIO ; | |
342 } | |
343 val = bs_frequency(regs, lock, addr, channel); | |
344 if(val == -EIO){ | |
345 return val ; | |
346 } | |
347 | |
348 tsid = &tmcc->ts_id[0] ; | |
349 // ³ºÅö¼þÇÈ¿ô¤ÎTS-ID¤ò¼èÆÀ | |
350 for(lp = 0 ; lp < (MAX_BS_TS_ID / 2) ; lp++){ | |
351 for(lp2 = 0 ; lp2 < 100 ; lp2++){ | |
352 memcpy(&wk, bs_get_ts_id[lp], sizeof(WBLOCK)); | |
353 wk.addr = addr; | |
354 ts_id.tsid = i2c_read(regs, lock, &wk, 4); | |
355 // TS-ID¤¬0¤Î¾ì¹ç¤ÏºÆ¼èÆÀ¤¹¤ë | |
356 if((ts_id.ts[0] != 0) && (ts_id.ts[1] != 0)){ | |
357 break ; | |
358 } | |
359 } | |
360 tsid->ts_id = ts_id.ts[1] ; | |
361 tsid += 1; | |
362 tsid->ts_id = ts_id.ts[0] ; | |
363 tsid += 1; | |
364 } | |
365 | |
366 memcpy(&wk, &bs_get_agc, sizeof(WBLOCK)); | |
367 wk.addr = addr; | |
368 tmcc->agc = i2c_read(regs, lock, &wk, 1); | |
369 | |
370 // TS-IDÊ̤ξðÊó¤ò¼èÆÀ | |
371 tsid = &tmcc->ts_id[0] ; | |
372 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++, tsid += 1){ | |
373 // TS-ID¤Ê¤·=0XFFFF | |
374 if(tsid->ts_id == 0xFFFF){ | |
375 continue ; | |
376 } | |
377 ts_lock(regs, lock, addr, tsid->ts_id); | |
378 | |
379 //¥¹¥í¥Ã¥È¼èÆÀ | |
380 memcpy(&wk, &bs_get_slot, sizeof(WBLOCK)); | |
381 wk.addr = addr; | |
382 ts_slot.u32slot = i2c_read(regs, lock, &wk, 3); | |
383 tsid->high_mode = 0; | |
384 tsid->low_slot = ts_slot.slot[0] ; | |
385 tsid->high_slot = ts_slot.slot[1] ; | |
386 tsid->low_mode = ts_slot.slot[2] ; | |
387 } | |
388 | |
389 memcpy(&wk, &bs_get_clock, sizeof(WBLOCK)); | |
390 wk.addr = addr; | |
391 tmcc->clockmargin = i2c_read(regs, lock, &wk, 1); | |
392 | |
393 memcpy(&wk, &bs_get_carrir, sizeof(WBLOCK)); | |
394 wk.addr = addr; | |
395 tmcc->carriermargin = i2c_read(regs, lock, &wk, 1); | |
396 return 0 ; | |
397 } | |
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398 int isdb_s_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
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399 { |
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400 WBLOCK wk; |
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401 __u32 val ; |
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402 __u32 val2; |
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403 int val3 ; |
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404 |
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405 memcpy(&wk, &bs_get_signal1, sizeof(WBLOCK)); |
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406 wk.addr = addr; |
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407 val = i2c_read(regs, lock, &wk, 1); |
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408 |
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409 memcpy(&wk, &bs_get_signal2, sizeof(WBLOCK)); |
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410 wk.addr = addr; |
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411 val2 = i2c_read(regs, lock, &wk, 1); |
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412 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
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413 |
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414 return val3 ; |
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415 } |
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416 |
0 | 417 __u32 getfrequency_add(__u32 channel) |
418 { | |
419 int lp ; | |
420 | |
421 for(lp = 0 ; lp < 10 ; lp++){ | |
422 if(channel <= isdb_t_freq_add[lp].pos){ | |
423 return isdb_t_freq_add[lp].add_freq ; | |
424 } | |
425 } | |
426 return 0 ; | |
427 } | |
428 __u32 getfrequency(__u32 channel, int addfreq) | |
429 { | |
430 __u32 frequencyoffset = 0; | |
431 __u32 frequencyOffset = 0; | |
432 | |
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433 if (12 <= channel) |
0 | 434 frequencyoffset += 2; |
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435 if (17 <= channel) |
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436 frequencyoffset -= 2; |
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437 if (63 <= channel){ |
0 | 438 frequencyoffset += 2; |
439 } | |
440 #if 0 | |
441 return (((93 + channel * 6 + frequencyOffset) + addfreq) * 7) + 400; | |
442 #endif | |
443 frequencyOffset = 93 + channel * 6 + frequencyoffset; | |
444 frequencyOffset = 7 * (frequencyOffset + addfreq); | |
445 return frequencyOffset + 400; | |
446 | |
447 } | |
448 int isdb_t_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel, int addfreq) | |
449 { | |
450 | |
451 int lp ; | |
452 WBLOCK wk; | |
453 __u32 val ; | |
454 int tmcclock = FALSE ; | |
455 union{ | |
456 __u8 charfreq[2]; | |
457 __u16 freq; | |
458 }freq[2] ; | |
459 | |
460 if(channel >= MAX_ISDB_T_CHANNEL){ | |
461 return -EIO ; | |
462 } | |
463 | |
464 freq[0].freq = getfrequency(channel, addfreq); | |
465 freq[1].freq = getfrequency_add(channel); | |
466 //»ØÄê¼þÇÈ¿ô | |
467 memcpy(&wk, &isdb_t_pll_base, sizeof(WBLOCK)); | |
468 wk.addr = addr ; | |
469 // ·×»»¤·¤¿¼þÇÈ¿ô¤òÀßÄê | |
470 wk.value[wk.count] = freq[0].charfreq[1]; | |
471 wk.count += 1 ; | |
472 wk.value[wk.count] = freq[0].charfreq[0]; | |
473 wk.count += 1 ; | |
474 | |
475 // ·×»»¤·¤¿¼þÇÈ¿ôÉղþðÊó¤òÀßÄê | |
476 wk.value[wk.count] = freq[1].charfreq[1]; | |
477 wk.count += 1 ; | |
478 wk.value[wk.count] = freq[1].charfreq[0]; | |
479 wk.count += 1 ; | |
480 | |
481 i2c_write(regs, lock, &wk); | |
482 | |
483 for(lp = 0 ; lp < 100 ; lp++){ | |
484 memcpy(&wk, &isdb_t_pll_lock, sizeof(WBLOCK)); | |
485 wk.addr = addr; | |
486 val = i2c_read(regs, lock, &wk, 1); | |
487 if(((val & 0xFF) != 0XFF) && ((val & 0X50) == 0x50)){ | |
488 tmcclock = TRUE ; | |
489 break ; | |
490 } | |
491 } | |
492 if(tmcclock != TRUE){ | |
493 printk(KERN_INFO "PT1:ISDB-T LOCK NG(%08x)\n", val); | |
494 return -EIO ; | |
495 } | |
496 | |
497 memcpy(&wk, &isdb_t_check_tune, sizeof(WBLOCK)); | |
498 wk.addr = addr ; | |
499 i2c_write(regs, lock, &wk); | |
500 | |
501 tmcclock = FALSE ; | |
502 for(lp = 0 ; lp < 1000 ; lp++){ | |
503 memcpy(&wk, &isdb_t_tune_read, sizeof(WBLOCK)); | |
504 wk.addr = addr; | |
505 val = i2c_read(regs, lock, &wk, 1); | |
506 if(((val & 0xFF) != 0XFF) && ((val & 0X8) != 8)){ | |
507 tmcclock = TRUE ; | |
508 break ; | |
509 } | |
510 } | |
511 if(tmcclock != TRUE){ | |
512 return -EIO ; | |
513 } | |
514 return 0 ; | |
515 } | |
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516 int isdb_t_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
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517 { |
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518 __u32 val ; |
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519 __u32 val2; |
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520 __u32 val3; |
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521 WBLOCK wk; |
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522 |
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523 memcpy(&wk, &isdb_t_signal1, sizeof(WBLOCK)); |
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524 wk.addr = addr; |
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525 val = i2c_read(regs, lock, &wk, 1); |
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526 printk(KERN_INFO "CN(1)Val(%x)\n", val); |
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527 |
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528 memcpy(&wk, &isdb_t_signal2, sizeof(WBLOCK)); |
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529 wk.addr = addr; |
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530 val2 = i2c_read(regs, lock, &wk, 1); |
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531 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
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532 return val3 ; |
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533 } |
0 | 534 #if 0 |
535 int isdb_t_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_T_TMCC *tmcc) | |
536 { | |
537 | |
538 int lp ; | |
539 int rc ; | |
540 int lp2 ; | |
541 WBLOCK wk; | |
542 __u32 val ; | |
543 | |
544 printk(KERN_INFO "Channel(%d) Start\n", channel); | |
545 if(channel >= MAX_ISDB_T_CHANNEL){ | |
546 return -EIO ; | |
547 } | |
548 rc = isdb_t_frequency(regs, lock, addr, channel); | |
549 if(rc < 0){ | |
550 return -EIO ; | |
551 } | |
552 for(lp = 0 ; lp < 100 ; lp++){ | |
553 memcpy(&wk, &isdb_t_tmcc_read_1, sizeof(WBLOCK)); | |
554 wk.addr = addr; | |
555 val = i2c_read(regs, lock, &wk, 4); | |
556 if((val & 0xFF) != 0){ | |
557 break ; | |
558 } | |
559 } | |
560 printk(KERN_INFO "TMCC(1)Val(%x)\n", val); | |
561 | |
562 for(lp = 0 ; lp < 100 ; lp++){ | |
563 memcpy(&wk, &isdb_t_tmcc_read_2, sizeof(WBLOCK)); | |
564 wk.addr = addr; | |
565 val = i2c_read(regs, lock, &wk, 4); | |
566 if((val & 0xFF) != 0){ | |
567 break ; | |
568 } | |
569 } | |
570 printk(KERN_INFO "TMCC(2)Val(%x)\n", val); | |
571 | |
572 memcpy(&wk, &isdb_t_cn_1, sizeof(WBLOCK)); | |
573 wk.addr = addr; | |
574 val = i2c_read(regs, lock, &wk, 1); | |
575 printk(KERN_INFO "CN(1)Val(%x)\n", val); | |
576 | |
577 memcpy(&wk, &isdb_t_cn_2, sizeof(WBLOCK)); | |
578 wk.addr = addr; | |
579 val = i2c_read(regs, lock, &wk, 1); | |
580 printk(KERN_INFO "CN(2)Val(%x)\n", val); | |
581 | |
582 memcpy(&wk, &isdb_t_agc_1, sizeof(WBLOCK)); | |
583 wk.addr = addr; | |
584 val = i2c_read(regs, lock, &wk, 1); | |
585 printk(KERN_INFO "AGC(1)Val(%x)\n", val); | |
586 | |
587 memcpy(&wk, &isdb_t_agc_2, sizeof(WBLOCK)); | |
588 wk.addr = addr; | |
589 val = i2c_read(regs, lock, &wk, 1); | |
590 printk(KERN_INFO "AGC(2)Val(%x)\n", val); | |
591 return 0; | |
592 } | |
593 #endif |