Mercurial > pt1.oyama
annotate driver/pt1_tuner.c @ 67:18108d097707
replaced full-width colon with half-width colon in channel list.
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Sat, 24 Oct 2009 17:05:01 +0900 |
parents | c701bbc532b4 |
children | 272a8fba970b |
rev | line source |
---|---|
0 | 1 /* pt1-tuner.c: A PT1 on Tuner driver for Linux. */ |
2 | |
3 #include <linux/module.h> | |
4 #include <linux/kernel.h> | |
5 #include <linux/errno.h> | |
6 #include <linux/pci.h> | |
7 #include <linux/init.h> | |
8 #include <linux/interrupt.h> | |
9 #include <linux/mutex.h> | |
10 | |
11 #include <asm/system.h> | |
12 #include <asm/io.h> | |
13 #include <asm/irq.h> | |
14 #include <asm/uaccess.h> | |
15 | |
16 #include "pt1_com.h" | |
17 #include "pt1_pci.h" | |
18 #include "pt1_i2c.h" | |
19 #include "pt1_tuner.h" | |
20 #include "pt1_tuner_data.h" | |
21 | |
22 typedef struct _TUNER_INFO{ | |
23 int isdb_s ; | |
24 int isdb_t ; | |
25 }TUNER_INFO; | |
26 | |
27 TUNER_INFO tuner_info[2] = { | |
28 {T0_ISDB_S, T0_ISDB_T}, | |
29 {T1_ISDB_S, T1_ISDB_T} | |
30 }; | |
31 | |
32 typedef struct _isdb_t_freq_add_table{ | |
33 __u16 pos ; // Äɲ乤ë¥Á¥ã¥ó¥Í¥ë¥Ý¥¸¥·¥ç¥ó | |
34 __u16 add_freq ; // Äɲ乤ëÃÍ | |
35 }isdb_t_freq_add_table; | |
36 | |
37 isdb_t_freq_add_table isdb_t_freq_add[10] = { | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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38 { 7, 0x8081}, // 0¡Á7Ëø |
0 | 39 { 12, 0x80A1}, // 8¡Á12Ëø |
40 { 21, 0x8062}, // 13¡Á21Ëø | |
41 { 39, 0x80A2}, // 22¡Á39Ëø | |
42 { 51, 0x80E2}, // 40¡Á51Ëø | |
43 { 59, 0x8064}, // 52¡Á59Ëø | |
44 { 75, 0x8084}, // 60¡Á75Ëø | |
45 { 84, 0x80a4}, // 76¡Á84Ëø | |
46 {100, 0x80C4}, // 85¡Á100Ëø | |
47 {112, 0x80E4} // 101¡Á112Ëø | |
48 }; | |
49 | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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50 void settuner_reset(void __iomem *regs, int cardtype, __u32 lnb, __u32 tuner) |
0 | 51 { |
52 __u32 val = 0; | |
53 switch(lnb){ | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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54 case LNB_11V: |
65 | 55 val = (1 << BIT_LNB_DOWN); |
56 break ; | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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57 case LNB_15V: |
65 | 58 val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN); |
59 break ; | |
0 | 60 } |
61 | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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62 if(cardtype == PT1) { |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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63 switch(tuner){ |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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64 case TUNER_POWER_ON_RESET_ENABLE: |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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65 val |= (1 << BIT_TUNER); |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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66 break; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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67 case TUNER_POWER_ON_RESET_DISABLE: |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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68 val |= (1 << BIT_TUNER) | (1 << BIT_RESET); |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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69 break ; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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70 } |
0 | 71 } |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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72 else if(cardtype == PT2) { |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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73 switch(tuner){ |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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74 case TUNER_POWER_ON_RESET_ENABLE: |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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75 val |= (1 << BIT_TUNER) | (1 << BIT_FRONTEND); |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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76 break; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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77 case TUNER_POWER_ON_RESET_DISABLE: |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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78 val |= (1 << BIT_TUNER) | (1 << BIT_FRONTEND) | (1 << BIT_RESET); |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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79 break ; |
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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80 } |
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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81 } |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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82 writel(val, (regs + CFG_REGS_ADDR)); |
0 | 83 } |
84 static int init_isdb_s(void __iomem *regs, struct mutex *lock, __u32 addr) | |
85 { | |
86 | |
87 WBLOCK wk; | |
88 int lp ; | |
89 __u32 val ; | |
90 | |
91 // ISDB-S/T½é´ü²½ | |
92 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
93 | |
94 // ½é´ü²½£±(¤Ê¤¼¤«READ¤Ê¤Î¤Ç) | |
95 memcpy(&wk, &isdb_s_init1, sizeof(WBLOCK)); | |
96 wk.addr = addr; | |
97 val = i2c_read(regs, lock, &wk, 1); | |
98 if((val & 0xff) != 0x41){ | |
99 printk(KERN_INFO "PT1:ISDB-S Read(%x)\n", val); | |
100 return -EIO ; | |
101 } | |
102 for(lp = 0 ; lp < MAX_ISDB_S_INIT ; lp++){ | |
103 memcpy(&wk, isdb_s_initial[lp], sizeof(WBLOCK)); | |
104 wk.addr = addr; | |
105 i2c_write(regs, lock, &wk); | |
106 } | |
107 | |
108 return 0 ; | |
109 } | |
110 static void init_isdb_t(void __iomem *regs, struct mutex *lock, __u32 addr) | |
111 { | |
112 int lp ; | |
113 WBLOCK wk; | |
114 | |
115 // ISDB-S/T½é´ü²½ | |
116 for(lp = 0 ; lp < MAX_ISDB_T_INIT ; lp++){ | |
117 memcpy(&wk, isdb_t_initial[lp], sizeof(WBLOCK)); | |
118 wk.addr = addr; | |
119 i2c_write(regs, lock, &wk); | |
120 } | |
121 | |
122 | |
123 } | |
124 int tuner_init(void __iomem *regs, struct mutex *lock, int tuner_no) | |
125 { | |
126 | |
127 int rc ; | |
128 WBLOCK wk; | |
129 | |
130 // ISDB-S/T½é´ü²½ | |
131 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
132 | |
133 // ½é´ü²½(¶¦ÄÌ) | |
134 wk.addr = tuner_info[tuner_no].isdb_t ; | |
135 i2c_write(regs, lock, &wk); | |
136 wk.addr = tuner_info[tuner_no].isdb_s ; | |
137 i2c_write(regs, lock, &wk); | |
138 | |
139 rc = init_isdb_s(regs, lock, tuner_info[tuner_no].isdb_s); | |
140 if(rc < 0){ | |
141 return rc ; | |
142 } | |
143 init_isdb_t(regs, lock, tuner_info[tuner_no].isdb_t); | |
144 | |
145 memcpy(&wk, &isdb_s_init21, sizeof(WBLOCK)); | |
146 wk.addr = tuner_info[tuner_no].isdb_s ; | |
147 i2c_write(regs, lock, &wk); | |
148 | |
149 memcpy(&wk, &isdb_t_init17, sizeof(WBLOCK)); | |
150 wk.addr = tuner_info[tuner_no].isdb_t ; | |
151 i2c_write(regs, lock, &wk); | |
152 | |
153 return 0 ; | |
154 } | |
155 void set_sleepmode(void __iomem *regs, struct mutex *lock, int address, int tuner_type, int type) | |
156 { | |
157 WBLOCK wk; | |
158 | |
159 if(type == TYPE_WAKEUP){ | |
160 switch(tuner_type){ | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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changeset
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161 case CHANNEL_TYPE_ISDB_S: |
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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162 memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK)); |
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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163 break ; |
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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164 case CHANNEL_TYPE_ISDB_T: |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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165 memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK)); |
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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166 break ; |
0 | 167 } |
168 wk.addr = address ; | |
169 i2c_write(regs, lock, &wk); | |
170 } | |
171 switch(tuner_type){ | |
172 case CHANNEL_TYPE_ISDB_S: | |
173 printk(KERN_INFO "PT1:ISDB-S Sleep\n"); | |
174 memcpy(&wk, &isdb_s_sleep, sizeof(WBLOCK)); | |
175 if(type == TYPE_WAKEUP){ | |
176 wk.value[1] = 0x01 ; | |
177 } | |
178 break ; | |
179 case CHANNEL_TYPE_ISDB_T: | |
180 printk(KERN_INFO "PT1:ISDB-T Sleep\n"); | |
181 memcpy(&wk, &isdb_t_sleep, sizeof(WBLOCK)); | |
182 if(type == TYPE_WAKEUP){ | |
183 wk.value[1] = 0x90 ; | |
184 } | |
185 break ; | |
186 } | |
187 wk.addr = address; | |
188 i2c_write(regs, lock, &wk); | |
189 } | |
190 | |
191 int bs_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel) | |
192 { | |
193 int lp ; | |
194 int tmcclock = FALSE ; | |
195 WBLOCK wk; | |
196 __u32 val ; | |
197 | |
198 if(channel >= MAX_BS_CHANNEL){ | |
199 return -EIO ; | |
200 } | |
201 // ISDB-S PLL¥í¥Ã¥¯ | |
202 for(lp = 0 ; lp < MAX_BS_CHANNEL_PLL_COMMAND ; lp++){ | |
203 memcpy(&wk, bs_pll[channel].wblock[lp], sizeof(WBLOCK)); | |
204 wk.addr = addr ; | |
205 i2c_write(regs, lock, &wk); | |
206 } | |
207 | |
208 // PLL¥í¥Ã¥¯³Îǧ | |
209 // ¥Á¥§¥Ã¥¯ÍÑ | |
210 for(lp = 0 ; lp < 200 ; lp++){ | |
211 memcpy(&wk, &bs_pll_lock, sizeof(WBLOCK)); | |
212 wk.addr = addr; | |
213 val = i2c_read(regs, lock, &wk, 1); | |
214 if(((val & 0xFF) != 0) && ((val & 0XFF) != 0XFF)){ | |
215 tmcclock = TRUE ; | |
216 break ; | |
217 } | |
218 } | |
219 | |
220 if(tmcclock == FALSE){ | |
221 printk(KERN_INFO "PLL LOCK ERROR\n"); | |
222 return -EIO; | |
223 } | |
224 | |
225 memcpy(&wk, &bs_tmcc_get_1, sizeof(WBLOCK)); | |
226 wk.addr = addr; | |
227 i2c_write(regs, lock, &wk); | |
228 | |
229 tmcclock = FALSE ; | |
230 | |
231 for(lp = 0 ; lp < 200 ; lp++){ | |
232 memcpy(&wk, &bs_tmcc_get_2, sizeof(WBLOCK)); | |
233 wk.addr = addr; | |
234 | |
235 val = i2c_read(regs, lock, &wk, 1); | |
236 if(((val & 0XFF) != 0XFF) && (!(val & 0x10))){ | |
237 tmcclock = TRUE ; | |
238 break ; | |
239 } | |
240 } | |
241 | |
242 if(tmcclock == FALSE){ | |
243 printk(KERN_INFO "TMCC LOCK ERROR\n"); | |
244 return -EIO; | |
245 } | |
246 | |
247 return 0 ; | |
248 } | |
249 int ts_lock(void __iomem *regs, struct mutex *lock, int addr, __u16 ts_id) | |
250 { | |
251 | |
252 int lp ; | |
253 WBLOCK wk; | |
254 __u32 val ; | |
255 union{ | |
256 __u8 ts[2]; | |
257 __u16 tsid; | |
258 }uts_id ; | |
259 | |
260 uts_id.tsid = ts_id ; | |
261 memcpy(&wk, &bs_set_ts_lock, sizeof(WBLOCK)); | |
262 wk.addr = addr; | |
263 // TS-IDÀßÄê | |
264 wk.value[1] = uts_id.ts[1]; | |
265 wk.value[2] = uts_id.ts[0]; | |
266 i2c_write(regs, lock, &wk); | |
267 | |
268 for(lp = 0 ; lp < 100 ; lp++){ | |
269 memcpy(&wk, &bs_get_ts_lock, sizeof(WBLOCK)); | |
270 wk.addr = addr; | |
271 val = i2c_read(regs, lock, &wk, 2); | |
272 if((val & 0xFFFF) == ts_id){ | |
273 return 0 ; | |
274 } | |
275 } | |
276 printk(KERN_INFO "PT1:ERROR TS-LOCK(%x)\n", ts_id); | |
277 return -EIO ; | |
278 } | |
279 int bs_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_S_TMCC *tmcc) | |
280 { | |
281 | |
282 int lp ; | |
283 int lp2; | |
284 WBLOCK wk; | |
285 __u32 val ; | |
286 ISDB_S_TS_ID *tsid ; | |
287 union{ | |
288 __u8 slot[4]; | |
289 __u32 u32slot; | |
290 }ts_slot ; | |
291 union{ | |
292 __u16 ts[2]; | |
293 __u32 tsid; | |
294 }ts_id ; | |
295 | |
296 if(channel >= MAX_BS_CHANNEL){ | |
297 printk(KERN_INFO "Invalid Channel(%d)\n", channel); | |
298 return -EIO ; | |
299 } | |
300 val = bs_frequency(regs, lock, addr, channel); | |
301 if(val == -EIO){ | |
302 return val ; | |
303 } | |
304 | |
305 tsid = &tmcc->ts_id[0] ; | |
306 // ³ºÅö¼þÇÈ¿ô¤ÎTS-ID¤ò¼èÆÀ | |
307 for(lp = 0 ; lp < (MAX_BS_TS_ID / 2) ; lp++){ | |
308 for(lp2 = 0 ; lp2 < 100 ; lp2++){ | |
309 memcpy(&wk, bs_get_ts_id[lp], sizeof(WBLOCK)); | |
310 wk.addr = addr; | |
311 ts_id.tsid = i2c_read(regs, lock, &wk, 4); | |
312 // TS-ID¤¬0¤Î¾ì¹ç¤ÏºÆ¼èÆÀ¤¹¤ë | |
313 if((ts_id.ts[0] != 0) && (ts_id.ts[1] != 0)){ | |
314 break ; | |
315 } | |
316 } | |
317 tsid->ts_id = ts_id.ts[1] ; | |
318 tsid += 1; | |
319 tsid->ts_id = ts_id.ts[0] ; | |
320 tsid += 1; | |
321 } | |
322 | |
323 memcpy(&wk, &bs_get_agc, sizeof(WBLOCK)); | |
324 wk.addr = addr; | |
325 tmcc->agc = i2c_read(regs, lock, &wk, 1); | |
326 | |
327 // TS-IDÊ̤ξðÊó¤ò¼èÆÀ | |
328 tsid = &tmcc->ts_id[0] ; | |
329 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++, tsid += 1){ | |
330 // TS-ID¤Ê¤·=0XFFFF | |
331 if(tsid->ts_id == 0xFFFF){ | |
332 continue ; | |
333 } | |
334 ts_lock(regs, lock, addr, tsid->ts_id); | |
335 | |
336 //¥¹¥í¥Ã¥È¼èÆÀ | |
337 memcpy(&wk, &bs_get_slot, sizeof(WBLOCK)); | |
338 wk.addr = addr; | |
339 ts_slot.u32slot = i2c_read(regs, lock, &wk, 3); | |
340 tsid->high_mode = 0; | |
341 tsid->low_slot = ts_slot.slot[0] ; | |
342 tsid->high_slot = ts_slot.slot[1] ; | |
343 tsid->low_mode = ts_slot.slot[2] ; | |
344 } | |
345 | |
346 memcpy(&wk, &bs_get_clock, sizeof(WBLOCK)); | |
347 wk.addr = addr; | |
348 tmcc->clockmargin = i2c_read(regs, lock, &wk, 1); | |
349 | |
350 memcpy(&wk, &bs_get_carrir, sizeof(WBLOCK)); | |
351 wk.addr = addr; | |
352 tmcc->carriermargin = i2c_read(regs, lock, &wk, 1); | |
353 return 0 ; | |
354 } | |
9
07b2fc07ff48
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parents:
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355 int isdb_s_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
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356 { |
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357 WBLOCK wk; |
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358 __u32 val ; |
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359 __u32 val2; |
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360 int val3 ; |
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361 |
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362 memcpy(&wk, &bs_get_signal1, sizeof(WBLOCK)); |
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363 wk.addr = addr; |
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364 val = i2c_read(regs, lock, &wk, 1); |
07b2fc07ff48
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parents:
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365 |
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366 memcpy(&wk, &bs_get_signal2, sizeof(WBLOCK)); |
07b2fc07ff48
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parents:
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367 wk.addr = addr; |
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368 val2 = i2c_read(regs, lock, &wk, 1); |
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369 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
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370 |
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371 return val3 ; |
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372 } |
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373 |
0 | 374 __u32 getfrequency_add(__u32 channel) |
375 { | |
376 int lp ; | |
377 | |
378 for(lp = 0 ; lp < 10 ; lp++){ | |
379 if(channel <= isdb_t_freq_add[lp].pos){ | |
380 return isdb_t_freq_add[lp].add_freq ; | |
381 } | |
382 } | |
383 return 0 ; | |
384 } | |
385 __u32 getfrequency(__u32 channel, int addfreq) | |
386 { | |
387 __u32 frequencyoffset = 0; | |
388 __u32 frequencyOffset = 0; | |
389 | |
390 if (12 <= channel){ | |
391 frequencyoffset += 2; | |
392 }else if (17 <= channel){ | |
393 frequencyoffset = 0; | |
394 }else if (63 <= channel){ | |
395 frequencyoffset += 2; | |
396 } | |
397 #if 0 | |
398 return (((93 + channel * 6 + frequencyOffset) + addfreq) * 7) + 400; | |
399 #endif | |
400 frequencyOffset = 93 + channel * 6 + frequencyoffset; | |
401 frequencyOffset = 7 * (frequencyOffset + addfreq); | |
402 return frequencyOffset + 400; | |
403 | |
404 } | |
405 int isdb_t_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel, int addfreq) | |
406 { | |
407 | |
408 int lp ; | |
409 WBLOCK wk; | |
410 __u32 val ; | |
411 int tmcclock = FALSE ; | |
412 union{ | |
413 __u8 charfreq[2]; | |
414 __u16 freq; | |
415 }freq[2] ; | |
416 | |
417 if(channel >= MAX_ISDB_T_CHANNEL){ | |
418 return -EIO ; | |
419 } | |
420 | |
421 freq[0].freq = getfrequency(channel, addfreq); | |
422 freq[1].freq = getfrequency_add(channel); | |
423 //»ØÄê¼þÇÈ¿ô | |
424 memcpy(&wk, &isdb_t_pll_base, sizeof(WBLOCK)); | |
425 wk.addr = addr ; | |
426 // ·×»»¤·¤¿¼þÇÈ¿ô¤òÀßÄê | |
427 wk.value[wk.count] = freq[0].charfreq[1]; | |
428 wk.count += 1 ; | |
429 wk.value[wk.count] = freq[0].charfreq[0]; | |
430 wk.count += 1 ; | |
431 | |
432 // ·×»»¤·¤¿¼þÇÈ¿ôÉղþðÊó¤òÀßÄê | |
433 wk.value[wk.count] = freq[1].charfreq[1]; | |
434 wk.count += 1 ; | |
435 wk.value[wk.count] = freq[1].charfreq[0]; | |
436 wk.count += 1 ; | |
437 | |
438 i2c_write(regs, lock, &wk); | |
439 | |
440 for(lp = 0 ; lp < 100 ; lp++){ | |
441 memcpy(&wk, &isdb_t_pll_lock, sizeof(WBLOCK)); | |
442 wk.addr = addr; | |
443 val = i2c_read(regs, lock, &wk, 1); | |
444 if(((val & 0xFF) != 0XFF) && ((val & 0X50) == 0x50)){ | |
445 tmcclock = TRUE ; | |
446 break ; | |
447 } | |
448 } | |
449 if(tmcclock != TRUE){ | |
450 printk(KERN_INFO "PT1:ISDB-T LOCK NG(%08x)\n", val); | |
451 return -EIO ; | |
452 } | |
453 | |
454 memcpy(&wk, &isdb_t_check_tune, sizeof(WBLOCK)); | |
455 wk.addr = addr ; | |
456 i2c_write(regs, lock, &wk); | |
457 | |
458 tmcclock = FALSE ; | |
459 for(lp = 0 ; lp < 1000 ; lp++){ | |
460 memcpy(&wk, &isdb_t_tune_read, sizeof(WBLOCK)); | |
461 wk.addr = addr; | |
462 val = i2c_read(regs, lock, &wk, 1); | |
463 if(((val & 0xFF) != 0XFF) && ((val & 0X8) != 8)){ | |
464 tmcclock = TRUE ; | |
465 break ; | |
466 } | |
467 } | |
468 if(tmcclock != TRUE){ | |
469 return -EIO ; | |
470 } | |
471 return 0 ; | |
472 } | |
9
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473 int isdb_t_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
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474 { |
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475 __u32 val ; |
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476 __u32 val2; |
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477 __u32 val3; |
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478 WBLOCK wk; |
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479 |
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480 memcpy(&wk, &isdb_t_signal1, sizeof(WBLOCK)); |
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481 wk.addr = addr; |
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482 val = i2c_read(regs, lock, &wk, 1); |
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483 printk(KERN_INFO "CN(1)Val(%x)\n", val); |
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484 |
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485 memcpy(&wk, &isdb_t_signal2, sizeof(WBLOCK)); |
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486 wk.addr = addr; |
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487 val2 = i2c_read(regs, lock, &wk, 1); |
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488 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
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489 return val3 ; |
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490 } |
0 | 491 #if 0 |
492 int isdb_t_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_T_TMCC *tmcc) | |
493 { | |
494 | |
495 int lp ; | |
496 int rc ; | |
497 int lp2 ; | |
498 WBLOCK wk; | |
499 __u32 val ; | |
500 | |
501 printk(KERN_INFO "Channel(%d) Start\n", channel); | |
502 if(channel >= MAX_ISDB_T_CHANNEL){ | |
503 return -EIO ; | |
504 } | |
505 rc = isdb_t_frequency(regs, lock, addr, channel); | |
506 if(rc < 0){ | |
507 return -EIO ; | |
508 } | |
509 for(lp = 0 ; lp < 100 ; lp++){ | |
510 memcpy(&wk, &isdb_t_tmcc_read_1, sizeof(WBLOCK)); | |
511 wk.addr = addr; | |
512 val = i2c_read(regs, lock, &wk, 4); | |
513 if((val & 0xFF) != 0){ | |
514 break ; | |
515 } | |
516 } | |
517 printk(KERN_INFO "TMCC(1)Val(%x)\n", val); | |
518 | |
519 for(lp = 0 ; lp < 100 ; lp++){ | |
520 memcpy(&wk, &isdb_t_tmcc_read_2, sizeof(WBLOCK)); | |
521 wk.addr = addr; | |
522 val = i2c_read(regs, lock, &wk, 4); | |
523 if((val & 0xFF) != 0){ | |
524 break ; | |
525 } | |
526 } | |
527 printk(KERN_INFO "TMCC(2)Val(%x)\n", val); | |
528 | |
529 memcpy(&wk, &isdb_t_cn_1, sizeof(WBLOCK)); | |
530 wk.addr = addr; | |
531 val = i2c_read(regs, lock, &wk, 1); | |
532 printk(KERN_INFO "CN(1)Val(%x)\n", val); | |
533 | |
534 memcpy(&wk, &isdb_t_cn_2, sizeof(WBLOCK)); | |
535 wk.addr = addr; | |
536 val = i2c_read(regs, lock, &wk, 1); | |
537 printk(KERN_INFO "CN(2)Val(%x)\n", val); | |
538 | |
539 memcpy(&wk, &isdb_t_agc_1, sizeof(WBLOCK)); | |
540 wk.addr = addr; | |
541 val = i2c_read(regs, lock, &wk, 1); | |
542 printk(KERN_INFO "AGC(1)Val(%x)\n", val); | |
543 | |
544 memcpy(&wk, &isdb_t_agc_2, sizeof(WBLOCK)); | |
545 wk.addr = addr; | |
546 val = i2c_read(regs, lock, &wk, 1); | |
547 printk(KERN_INFO "AGC(2)Val(%x)\n", val); | |
548 return 0; | |
549 } | |
550 #endif |