Mercurial > pt1.oyama
annotate driver/pt1_pci.c @ 50:23b6f99f65b2
propagate upstream change:
- adapted to FastBoot. use spinlock to avoid resource contention between multiple number of cards.
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Thu, 27 Aug 2009 21:39:14 +0900 |
parents | 07d71b1484a8 |
children | c915076353ae |
rev | line source |
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0 | 1 /* pt1-pci.c: A PT1 on PCI bus driver for Linux. */ |
2 #define DRV_NAME "pt1-pci" | |
3 #define DRV_VERSION "1.00" | |
4 #define DRV_RELDATE "11/28/2008" | |
5 | |
6 | |
7 #include <linux/module.h> | |
8 #include <linux/kernel.h> | |
9 #include <linux/errno.h> | |
10 #include <linux/pci.h> | |
11 #include <linux/init.h> | |
12 #include <linux/interrupt.h> | |
13 | |
14 #include <asm/system.h> | |
15 #include <asm/io.h> | |
16 #include <asm/irq.h> | |
17 #include <asm/uaccess.h> | |
18 #include <linux/version.h> | |
19 #include <linux/mutex.h> | |
36 | 20 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23) |
0 | 21 #include <linux/freezer.h> |
22 #else | |
23 #define set_freezable() | |
36 | 24 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) |
0 | 25 typedef struct pm_message { |
26 int event; | |
27 } pm_message_t; | |
28 #endif | |
29 #endif | |
30 #include <linux/kthread.h> | |
31 #include <linux/dma-mapping.h> | |
32 | |
33 #include <linux/fs.h> | |
34 #include <linux/cdev.h> | |
35 | |
36 #include <linux/ioctl.h> | |
37 | |
38 #include "pt1_com.h" | |
39 #include "pt1_pci.h" | |
40 #include "pt1_tuner.h" | |
41 #include "pt1_i2c.h" | |
42 #include "pt1_tuner_data.h" | |
43 #include "pt1_ioctl.h" | |
44 | |
45 /* These identify the driver base version and may not be removed. */ | |
46 static char version[] __devinitdata = | |
47 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " \n"; | |
48 | |
49 MODULE_AUTHOR("Tomoaki Ishikawa tomy@users.sourceforge.jp"); | |
50 #define DRIVER_DESC "PCI earthsoft PT1 driver" | |
51 MODULE_DESCRIPTION(DRIVER_DESC); | |
52 MODULE_LICENSE("GPL"); | |
53 | |
50
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54 static int debug = 7; /* 1 normal messages, 0 quiet .. |
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55 7 verbose. */ |
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56 static int lnb = 0; /* LNB OFF:0 +11V:1 +15V:2 */ |
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57 static spinlock_t lock; /* to synchronize at probing */ |
0 | 58 |
59 module_param(debug, int, 0); | |
60 module_param(lnb, int, 0); | |
61 MODULE_PARM_DESC(debug, "debug level (1-2)"); | |
62 MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)"); | |
63 | |
64 static struct pci_device_id pt1_pci_tbl[] = { | |
65 { 0x10ee, 0x211a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | |
66 { 0, } | |
67 }; | |
68 MODULE_DEVICE_TABLE(pci, pt1_pci_tbl); | |
69 #define DEV_NAME "pt1video" | |
70 | |
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71 #define PACKET_SIZE 188 // 1パケット長 |
0 | 72 #define MAX_READ_BLOCK 4 // 1度に読み出す最大DMAバッファ数 |
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73 #define MAX_PCI_DEVICE 128 // 最大64枚 |
0 | 74 #define DMA_SIZE 4096 // DMAバッファサイズ |
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75 #define DMA_RING_SIZE 128 // RINGサイズ |
0 | 76 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで) |
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77 #define CHANEL_DMA_SIZE (2*1024*1024) // 地デジ用(16Mbps) |
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78 #define BS_CHANEL_DMA_SIZE (4*1024*1024) // BS用(32Mbps) |
0 | 79 |
80 typedef struct _DMA_CONTROL{ | |
81 dma_addr_t ring_dma[DMA_RING_MAX] ; // DMA情報 | |
82 __u32 *data[DMA_RING_MAX]; | |
83 }DMA_CONTROL; | |
84 | |
85 typedef struct _PT1_CHANNEL PT1_CHANNEL; | |
86 | |
87 typedef struct _pt1_device{ | |
88 unsigned long mmio_start ; | |
89 __u32 mmio_len ; | |
90 void __iomem *regs; | |
91 struct mutex lock ; | |
92 dma_addr_t ring_dma[DMA_RING_SIZE] ; // DMA情報 | |
93 void *dmaptr[DMA_RING_SIZE] ; | |
94 struct task_struct *kthread; | |
95 dev_t dev ; | |
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96 int card_number; |
0 | 97 __u32 base_minor ; |
98 struct cdev cdev[MAX_CHANNEL]; | |
99 wait_queue_head_t dma_wait_q ;// for poll on reading | |
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100 DMA_CONTROL *dmactl[DMA_RING_SIZE]; |
0 | 101 PT1_CHANNEL *channel[MAX_CHANNEL]; |
102 }PT1_DEVICE; | |
103 | |
104 typedef struct _MICRO_PACKET{ | |
105 char data[3]; | |
106 char head ; | |
107 }MICRO_PACKET; | |
108 | |
109 struct _PT1_CHANNEL{ | |
110 __u32 valid ; // 使用中フラグ | |
111 __u32 address ; // I2Cアドレス | |
112 __u32 channel ; // チャネル番号 | |
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113 int type ; // チャネルタイプ |
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114 __u32 packet_size ; // パケットサイズ |
0 | 115 __u32 drop ; // パケットドロップ数 |
116 struct mutex lock ; // CH別mutex_lock用 | |
117 __u32 size ; // DMAされたサイズ | |
118 __u32 maxsize ; // DMA用バッファサイズ | |
119 __u32 bufsize ; // チャネルに割り振られたサイズ | |
120 __u32 overflow ; // オーバーフローエラー発生 | |
121 __u32 counetererr ; // 転送カウンタ1エラー | |
122 __u32 transerr ; // 転送エラー | |
123 __u32 minor ; // マイナー番号 | |
124 __u8 *buf; // CH別受信メモリ | |
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125 __u32 pointer; |
0 | 126 __u8 req_dma ; // 溢れたチャネル |
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127 __u8 packet_buf[PACKET_SIZE] ; // 溢れたチャネル |
0 | 128 PT1_DEVICE *ptr ; // カード別情報 |
129 wait_queue_head_t wait_q ; // for poll on reading | |
130 }; | |
131 | |
132 // I2Cアドレス(video0, 1 = ISDB-S) (video2, 3 = ISDB-T) | |
133 int i2c_address[MAX_CHANNEL] = {T0_ISDB_S, T1_ISDB_S, T0_ISDB_T, T1_ISDB_T}; | |
134 int real_chanel[MAX_CHANNEL] = {0, 2, 1, 3}; | |
135 int channeltype[MAX_CHANNEL] = {CHANNEL_TYPE_ISDB_S, CHANNEL_TYPE_ISDB_S, | |
136 CHANNEL_TYPE_ISDB_T, CHANNEL_TYPE_ISDB_T}; | |
137 | |
138 static PT1_DEVICE *device[MAX_PCI_DEVICE]; | |
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139 static struct class *pt1video_class; |
0 | 140 |
141 #define PT1MAJOR 251 | |
142 #define DRIVERNAME "pt1video" | |
143 | |
144 static void reset_dma(PT1_DEVICE *dev_conf) | |
145 { | |
146 | |
147 int lp ; | |
148 __u32 addr ; | |
149 int ring_pos = 0; | |
150 int data_pos = 0 ; | |
151 __u32 *dataptr ; | |
152 | |
153 // データ初期化 | |
154 for(ring_pos = 0 ; ring_pos < DMA_RING_SIZE ; ring_pos++){ | |
155 for(data_pos = 0 ; data_pos < DMA_RING_MAX ; data_pos++){ | |
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156 dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos]; |
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157 dataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; |
0 | 158 } |
159 } | |
160 // 転送カウンタをリセット | |
161 writel(0x00000010, dev_conf->regs); | |
162 // 転送カウンタをインクリメント | |
163 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
164 writel(0x00000020, dev_conf->regs); | |
165 } | |
166 | |
167 addr = (int)dev_conf->ring_dma[0] ; | |
168 addr >>= 12 ; | |
169 // DMAバッファ設定 | |
170 writel(addr, dev_conf->regs + DMA_ADDR); | |
171 // DMA開始 | |
172 writel(0x0c000040, dev_conf->regs); | |
173 | |
174 } | |
175 static int pt1_thread(void *data) | |
176 { | |
177 PT1_DEVICE *dev_conf = data ; | |
178 PT1_CHANNEL *channel ; | |
179 int ring_pos = 0; | |
180 int data_pos = 0 ; | |
181 int lp ; | |
182 int chno ; | |
183 int lp2 ; | |
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184 int dma_channel ; |
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185 int packet_pos ; |
0 | 186 __u32 *dataptr ; |
187 __u32 *curdataptr ; | |
188 __u32 val ; | |
189 union mpacket{ | |
190 __u32 val ; | |
191 MICRO_PACKET packet ; | |
192 }micro; | |
193 | |
194 set_freezable(); | |
195 reset_dma(dev_conf); | |
196 printk(KERN_INFO "pt1_thread run\n"); | |
197 | |
198 for(;;){ | |
199 if(kthread_should_stop()){ | |
200 break ; | |
201 } | |
202 | |
203 for(;;){ | |
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204 dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos]; |
0 | 205 // データあり? |
206 if(dataptr[(DMA_SIZE / sizeof(__u32)) - 2] == 0){ | |
207 break ; | |
208 } | |
209 micro.val = *dataptr ; | |
210 curdataptr = dataptr ; | |
211 data_pos += 1 ; | |
212 for(lp = 0 ; lp < (DMA_SIZE / sizeof(__u32)) ; lp++, dataptr++){ | |
213 micro.val = *dataptr ; | |
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214 dma_channel = ((micro.packet.head >> 5) & 0x07); |
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215 //チャネル情報不正 |
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216 if(dma_channel > MAX_CHANNEL){ |
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217 printk(KERN_ERR "DMA Channel Number Error(%d)\n", dma_channel); |
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218 continue ; |
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219 } |
0 | 220 chno = real_chanel[(((micro.packet.head >> 5) & 0x07) - 1)]; |
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221 packet_pos = ((micro.packet.head >> 2) & 0x07); |
0 | 222 channel = dev_conf->channel[chno] ; |
223 // エラーチェック | |
224 if((micro.packet.head & MICROPACKET_ERROR)){ | |
225 val = readl(dev_conf->regs); | |
226 if((val & BIT_RAM_OVERFLOW)){ | |
227 channel->overflow += 1 ; | |
228 } | |
229 if((val & BIT_INITIATOR_ERROR)){ | |
230 channel->counetererr += 1 ; | |
231 } | |
232 if((val & BIT_INITIATOR_WARNING)){ | |
233 channel->transerr += 1 ; | |
234 } | |
235 // 初期化して先頭から | |
236 reset_dma(dev_conf); | |
237 ring_pos = data_pos = 0 ; | |
238 break ; | |
239 } | |
240 // 未使用チャネルは捨てる | |
241 if(channel->valid == FALSE){ | |
242 continue ; | |
243 } | |
244 mutex_lock(&channel->lock); | |
245 // あふれたら読み出すまで待つ | |
246 while(1){ | |
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247 if(channel->size >= (channel->maxsize - PACKET_SIZE - 4)){ |
0 | 248 // 該当チャンネルのDMA読みだし待ちにする |
249 wake_up(&channel->wait_q); | |
250 channel->req_dma = TRUE ; | |
251 mutex_unlock(&channel->lock); | |
252 // タスクに時間を渡す為中断 | |
253 wait_event_timeout(dev_conf->dma_wait_q, (channel->req_dma == FALSE), | |
254 msecs_to_jiffies(500)); | |
255 mutex_lock(&channel->lock); | |
256 channel->drop += 1 ; | |
257 }else{ | |
258 break ; | |
259 } | |
260 } | |
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261 // 先頭で、一時バッファに残っている場合 |
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262 if((micro.packet.head & 0x02) && (channel->packet_size != 0)){ |
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263 channel->packet_size = 0 ; |
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264 } |
0 | 265 // データコピー |
266 for(lp2 = 2 ; lp2 >= 0 ; lp2--){ | |
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267 channel->packet_buf[channel->packet_size] = micro.packet.data[lp2] ; |
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268 channel->packet_size += 1 ; |
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269 } |
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270 |
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271 // パケットが出来たらコピーする |
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272 if(channel->packet_size >= PACKET_SIZE){ |
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273 if (channel->pointer + channel->size >= channel->maxsize) { |
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274 // リングバッファの境界を越えていてリングバッファの先頭に戻っている場合 |
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275 // channel->pointer + channel->size - channel->maxsize でリングバッファ先頭からのアドレスになる |
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276 memcpy(&channel->buf[channel->pointer + channel->size - channel->maxsize], channel->packet_buf, PACKET_SIZE); |
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277 } else if (channel->pointer + channel->size + PACKET_SIZE > channel->maxsize) { |
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278 // リングバッファの境界をまたぐように書き込まれる場合 |
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279 // リングバッファの境界まで書き込み |
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280 __u32 tmp_size = channel->maxsize - (channel->pointer + channel->size); |
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281 memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, tmp_size); |
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282 // 先頭に戻って書き込み |
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283 memcpy(channel->buf, &channel->packet_buf[tmp_size], PACKET_SIZE - tmp_size); |
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284 } else { |
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285 // リングバッファ内で収まる場合 |
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286 // 通常の書き込み |
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287 memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, PACKET_SIZE); |
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288 } |
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289 channel->size += PACKET_SIZE ; |
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290 channel->packet_size = 0 ; |
0 | 291 } |
292 mutex_unlock(&channel->lock); | |
293 } | |
294 curdataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; | |
295 | |
296 if(data_pos >= DMA_RING_MAX){ | |
297 data_pos = 0; | |
298 ring_pos += 1 ; | |
299 // DMAリングが変わった場合はインクリメント | |
300 writel(0x00000020, dev_conf->regs); | |
301 if(ring_pos >= DMA_RING_SIZE){ | |
302 ring_pos = 0 ; | |
303 } | |
304 } | |
305 | |
306 // 頻度を落す(4Kで起動させる) | |
307 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
308 channel = dev_conf->channel[real_chanel[lp]] ; | |
309 if((channel->size >= DMA_SIZE) && (channel->valid == TRUE)){ | |
310 wake_up(&channel->wait_q); | |
311 } | |
312 } | |
313 } | |
314 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
315 } | |
316 return 0 ; | |
317 } | |
318 static int pt1_open(struct inode *inode, struct file *file) | |
319 { | |
320 | |
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321 int major = imajor(inode); |
0 | 322 int minor = iminor(inode); |
323 int lp ; | |
324 int lp2 ; | |
325 PT1_CHANNEL *channel ; | |
326 | |
327 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
328 if(device[lp] == NULL){ | |
329 return -EIO ; | |
330 } | |
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331 |
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332 if(MAJOR(device[lp]->dev) == major && |
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333 device[lp]->base_minor <= minor && |
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334 device[lp]->base_minor + MAX_CHANNEL > minor) { |
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335 |
0 | 336 mutex_lock(&device[lp]->lock); |
337 for(lp2 = 0 ; lp2 < MAX_CHANNEL ; lp2++){ | |
338 channel = device[lp]->channel[lp2] ; | |
339 if(channel->minor == minor){ | |
340 if(channel->valid == TRUE){ | |
341 mutex_unlock(&device[lp]->lock); | |
342 return -EIO ; | |
343 } | |
344 channel->drop = 0 ; | |
345 channel->valid = TRUE ; | |
346 channel->overflow = 0 ; | |
347 channel->counetererr = 0 ; | |
348 channel->transerr = 0 ; | |
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349 channel->packet_size = 0 ; |
0 | 350 file->private_data = channel; |
351 mutex_lock(&channel->lock); | |
352 // データ初期化 | |
353 channel->size = 0 ; | |
354 mutex_unlock(&channel->lock); | |
355 mutex_unlock(&device[lp]->lock); | |
356 return 0 ; | |
357 } | |
358 } | |
359 } | |
360 } | |
361 return -EIO; | |
362 } | |
363 static int pt1_release(struct inode *inode, struct file *file) | |
364 { | |
365 PT1_CHANNEL *channel = file->private_data; | |
366 | |
367 mutex_lock(&channel->ptr->lock); | |
368 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
369 channel->valid = FALSE ; | |
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370 printk(KERN_INFO "(%d:%d)Drop=%08d:%08d:%08d:%08d\n", imajor(inode), iminor(inode), channel->drop, |
0 | 371 channel->overflow, channel->counetererr, channel->transerr); |
372 channel->overflow = 0 ; | |
373 channel->counetererr = 0 ; | |
374 channel->transerr = 0 ; | |
375 channel->drop = 0 ; | |
376 // 停止している場合は起こす | |
377 if(channel->req_dma == TRUE){ | |
378 channel->req_dma = FALSE ; | |
379 wake_up(&channel->ptr->dma_wait_q); | |
380 } | |
381 mutex_unlock(&channel->ptr->lock); | |
382 return 0; | |
383 } | |
384 | |
385 static ssize_t pt1_read(struct file *file, char __user *buf, size_t cnt, loff_t * ppos) | |
386 { | |
387 PT1_CHANNEL *channel = file->private_data; | |
388 __u32 size ; | |
36 | 389 unsigned long dummy; |
0 | 390 |
391 // 4K単位で起こされるのを待つ(CPU負荷対策) | |
392 if(channel->size < DMA_SIZE){ | |
393 wait_event_timeout(channel->wait_q, (channel->size >= DMA_SIZE), | |
394 msecs_to_jiffies(500)); | |
395 } | |
396 mutex_lock(&channel->lock); | |
397 if(!channel->size){ | |
398 size = 0 ; | |
399 }else{ | |
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400 __u32 tmp_size = 0; |
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401 if (cnt < channel->size) { |
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402 // バッファにあるデータより小さい読み込みの場合 |
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403 size = cnt; |
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404 } else { |
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405 // バッファにあるデータ以上の読み込みの場合 |
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406 size = channel->size; |
0 | 407 } |
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408 if (channel->maxsize <= size + channel->pointer) { |
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409 // リングバッファの境界を越える場合 |
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410 tmp_size = channel->maxsize - channel->pointer; |
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411 // 境界までコピー |
44 | 412 dummy = copy_to_user(buf, &channel->buf[channel->pointer], tmp_size); |
41
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413 // 残りをコピー |
44 | 414 dummy = copy_to_user(&buf[tmp_size], channel->buf, size - tmp_size); |
41
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415 channel->pointer = size - tmp_size; |
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416 } else { |
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417 // 普通にコピー |
44 | 418 dummy = copy_to_user(buf, &channel->buf[channel->pointer], size); |
41
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419 channel->pointer += size; |
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420 } |
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421 channel->size -= size; |
0 | 422 } |
423 // 読み終わったかつ使用しているのがが4K以下 | |
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424 if(channel->req_dma == TRUE){ |
0 | 425 channel->req_dma = FALSE ; |
426 wake_up(&channel->ptr->dma_wait_q); | |
427 } | |
428 mutex_unlock(&channel->lock); | |
429 return size ; | |
430 } | |
431 static int SetFreq(PT1_CHANNEL *channel, FREQUENCY *freq) | |
432 { | |
433 | |
434 switch(channel->type){ | |
435 case CHANNEL_TYPE_ISDB_S: | |
436 { | |
437 ISDB_S_TMCC tmcc ; | |
438 if(bs_tune(channel->ptr->regs, | |
439 &channel->ptr->lock, | |
440 channel->address, | |
441 freq->frequencyno, | |
442 &tmcc) < 0){ | |
443 return -EIO ; | |
444 } | |
445 | |
446 #if 0 | |
447 printk(KERN_INFO "clockmargin = (%x)\n", (tmcc.clockmargin & 0xFF)); | |
448 printk(KERN_INFO "carriermargin = (%x)\n", (tmcc.carriermargin & 0xFF)); | |
449 | |
450 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++){ | |
451 if(tmcc.ts_id[lp].ts_id == 0xFFFF){ | |
452 continue ; | |
453 } | |
454 printk(KERN_INFO "Slot(%d:%x)\n", lp, tmcc.ts_id[lp].ts_id); | |
455 printk(KERN_INFO "mode (low/high) = (%x:%x)\n", | |
456 tmcc.ts_id[lp].low_mode, tmcc.ts_id[lp].high_mode); | |
457 printk(KERN_INFO "slot (low/high) = (%x:%x)\n", | |
458 tmcc.ts_id[lp].low_slot, | |
459 tmcc.ts_id[lp].high_slot); | |
460 } | |
461 #endif | |
462 ts_lock(channel->ptr->regs, | |
463 &channel->ptr->lock, | |
464 channel->address, | |
465 tmcc.ts_id[freq->slot].ts_id); | |
466 } | |
467 break ; | |
468 case CHANNEL_TYPE_ISDB_T: | |
469 { | |
470 if(isdb_t_frequency(channel->ptr->regs, | |
471 &channel->ptr->lock, | |
472 channel->address, | |
473 freq->frequencyno, freq->slot) < 0){ | |
474 return -EINVAL ; | |
475 } | |
476 } | |
477 } | |
478 return 0 ; | |
479 } | |
36 | 480 static int pt1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg0) |
0 | 481 { |
482 PT1_CHANNEL *channel = file->private_data; | |
36 | 483 int signal ; |
484 unsigned long dummy; | |
485 void *arg = (void *)arg0; | |
0 | 486 |
487 switch(cmd){ | |
488 case SET_CHANNEL: | |
489 { | |
490 FREQUENCY freq ; | |
36 | 491 dummy = copy_from_user(&freq, arg, sizeof(FREQUENCY)); |
0 | 492 return SetFreq(channel, &freq); |
493 } | |
494 case START_REC: | |
495 SetStream(channel->ptr->regs, channel->channel, TRUE); | |
496 return 0 ; | |
497 case STOP_REC: | |
498 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
499 return 0 ; | |
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500 case GET_SIGNAL_STRENGTH: |
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501 switch(channel->type){ |
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502 case CHANNEL_TYPE_ISDB_S: |
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503 { |
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504 signal = isdb_s_read_signal_strength(channel->ptr->regs, |
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505 &channel->ptr->lock, |
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506 channel->address); |
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507 } |
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508 break ; |
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509 case CHANNEL_TYPE_ISDB_T: |
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510 // calc C/N |
36 | 511 signal = isdb_t_read_signal_strength(channel->ptr->regs, |
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512 &channel->ptr->lock, channel->address); |
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513 break ; |
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514 } |
36 | 515 dummy = copy_to_user(arg, &signal, sizeof(int)); |
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516 return 0 ; |
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517 case LNB_ENABLE: |
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518 if(lnb){ |
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519 settuner_reset(channel->ptr->regs, lnb, TUNER_POWER_ON_RESET_DISABLE); |
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520 } |
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521 return 0 ; |
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522 case LNB_DISABLE: |
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523 if(lnb){ |
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524 settuner_reset(channel->ptr->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
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525 } |
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526 return 0 ; |
0 | 527 } |
528 return -EINVAL; | |
529 } | |
530 | |
531 /* | |
532 */ | |
533 static const struct file_operations pt1_fops = { | |
534 .owner = THIS_MODULE, | |
535 .open = pt1_open, | |
536 .release = pt1_release, | |
537 .read = pt1_read, | |
538 .ioctl = pt1_ioctl, | |
539 .llseek = no_llseek, | |
540 }; | |
541 | |
542 int pt1_makering(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
543 { | |
544 int lp ; | |
545 int lp2 ; | |
546 DMA_CONTROL *dmactl; | |
547 __u32 *dmaptr ; | |
548 __u32 addr ; | |
549 __u32 *ptr ; | |
550 | |
551 //DMAリング作成 | |
552 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
553 ptr = dev_conf->dmaptr[lp]; | |
554 if(lp == (DMA_RING_SIZE - 1)){ | |
555 addr = (__u32)dev_conf->ring_dma[0]; | |
556 }else{ | |
557 addr = (__u32)dev_conf->ring_dma[(lp + 1)]; | |
558 } | |
559 addr >>= 12 ; | |
560 memcpy(ptr, &addr, sizeof(__u32)); | |
561 ptr += 1 ; | |
562 | |
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563 dmactl = dev_conf->dmactl[lp]; |
0 | 564 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ |
565 dmaptr = pci_alloc_consistent(pdev, DMA_SIZE, &dmactl->ring_dma[lp2]); | |
566 if(dmaptr == NULL){ | |
567 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
568 return -1 ; | |
569 } | |
570 dmactl->data[lp2] = dmaptr ; | |
571 // DMAデータエリア初期化 | |
572 dmaptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0 ; | |
573 addr = (__u32)dmactl->ring_dma[lp2]; | |
574 addr >>= 12 ; | |
575 memcpy(ptr, &addr, sizeof(__u32)); | |
576 ptr += 1 ; | |
577 } | |
578 } | |
579 return 0 ; | |
580 } | |
581 int pt1_dma_init(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
582 { | |
583 int lp ; | |
584 void *ptr ; | |
585 | |
586 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
587 ptr = pci_alloc_consistent(pdev, DMA_SIZE, &dev_conf->ring_dma[lp]); | |
588 if(ptr == NULL){ | |
589 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
590 return -1 ; | |
591 } | |
592 dev_conf->dmaptr[lp] = ptr ; | |
593 } | |
594 | |
595 return pt1_makering(pdev, dev_conf); | |
596 } | |
597 int pt1_dma_free(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
598 { | |
599 | |
600 int lp ; | |
601 int lp2 ; | |
602 | |
603 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
604 if(dev_conf->dmaptr[lp] != NULL){ | |
605 pci_free_consistent(pdev, DMA_SIZE, | |
606 dev_conf->dmaptr[lp], dev_conf->ring_dma[lp]); | |
607 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ | |
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608 if((dev_conf->dmactl[lp])->data[lp2] != NULL){ |
0 | 609 pci_free_consistent(pdev, DMA_SIZE, |
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610 (dev_conf->dmactl[lp])->data[lp2], |
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611 (dev_conf->dmactl[lp])->ring_dma[lp2]); |
0 | 612 } |
613 } | |
614 } | |
615 } | |
616 return 0 ; | |
617 } | |
618 static int __devinit pt1_pci_init_one (struct pci_dev *pdev, | |
619 const struct pci_device_id *ent) | |
620 { | |
621 int rc ; | |
622 int lp ; | |
623 int minor ; | |
624 u16 cmd ; | |
625 PT1_DEVICE *dev_conf ; | |
626 PT1_CHANNEL *channel ; | |
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627 int i; |
36 | 628 struct resource *dummy; |
0 | 629 |
630 rc = pci_enable_device(pdev); | |
631 if (rc) | |
632 return rc; | |
633 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
634 if (rc) { | |
635 printk(KERN_ERR "PT1:DMA MASK ERROR"); | |
636 return rc; | |
637 } | |
638 | |
639 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
640 if (!(cmd & PCI_COMMAND_MASTER)) { | |
641 printk(KERN_INFO "Attempting to enable Bus Mastering\n"); | |
642 pci_set_master(pdev); | |
643 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
644 if (!(cmd & PCI_COMMAND_MASTER)) { | |
645 printk(KERN_ERR "Bus Mastering is not enabled\n"); | |
646 return -EIO; | |
647 } | |
648 } | |
649 printk(KERN_INFO "Bus Mastering Enabled.\n"); | |
650 | |
651 dev_conf = kzalloc(sizeof(PT1_DEVICE), GFP_KERNEL); | |
652 if(!dev_conf){ | |
653 printk(KERN_ERR "PT1:out of memory !"); | |
654 return -ENOMEM ; | |
655 } | |
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656 for (i = 0; i < DMA_RING_SIZE; i++) { |
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657 dev_conf->dmactl[i] = kzalloc(sizeof(DMA_CONTROL), GFP_KERNEL); |
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658 if(!dev_conf->dmactl[i]){ |
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659 int j; |
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660 for (j = 0; j < i; j++) { |
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661 kfree(dev_conf->dmactl[j]); |
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662 } |
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663 kfree(dev_conf); |
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664 printk(KERN_ERR "PT1:out of memory !"); |
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665 return -ENOMEM ; |
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|
666 } |
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667 } |
0 | 668 // PCIアドレスをマップする |
669 dev_conf->mmio_start = pci_resource_start(pdev, 0); | |
670 dev_conf->mmio_len = pci_resource_len(pdev, 0); | |
36 | 671 dummy = request_mem_region(dev_conf->mmio_start, dev_conf->mmio_len, DEV_NAME); |
672 if (!dummy) { | |
0 | 673 printk(KERN_ERR "PT1: cannot request iomem (0x%llx).\n", (unsigned long long) dev_conf->mmio_start); |
674 goto out_err_regbase; | |
675 } | |
676 | |
677 dev_conf->regs = ioremap(dev_conf->mmio_start, dev_conf->mmio_len); | |
678 if (!dev_conf->regs){ | |
679 printk(KERN_ERR "pt1: Can't remap register area.\n"); | |
680 goto out_err_regbase; | |
681 } | |
682 // 初期化処理 | |
683 if(xc3s_init(dev_conf->regs)){ | |
684 printk(KERN_ERR "Error xc3s_init\n"); | |
685 goto out_err_fpga; | |
686 } | |
687 // チューナリセット | |
688 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE); | |
689 schedule_timeout_interruptible(msecs_to_jiffies(50)); | |
690 | |
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691 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
0 | 692 schedule_timeout_interruptible(msecs_to_jiffies(10)); |
693 mutex_init(&dev_conf->lock); | |
694 | |
695 // Tuner 初期化処理 | |
696 for(lp = 0 ; lp < MAX_TUNER ; lp++){ | |
697 rc = tuner_init(dev_conf->regs, &dev_conf->lock, lp); | |
698 if(rc < 0){ | |
699 printk(KERN_ERR "Error tuner_init\n"); | |
700 goto out_err_fpga; | |
701 } | |
702 } | |
50
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703 |
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|
704 spin_lock(&lock); |
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705 |
0 | 706 // 初期化完了 |
707 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
36 | 708 set_sleepmode(dev_conf->regs, &dev_conf->lock, |
0 | 709 i2c_address[lp], channeltype[lp], TYPE_SLEEP); |
36 | 710 |
0 | 711 schedule_timeout_interruptible(msecs_to_jiffies(50)); |
712 } | |
713 rc = alloc_chrdev_region(&dev_conf->dev, 0, MAX_CHANNEL, DEV_NAME); | |
714 if(rc < 0){ | |
50
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715 spin_unlock(&lock); |
0 | 716 goto out_err_fpga; |
717 } | |
718 | |
719 // 初期化 | |
720 init_waitqueue_head(&dev_conf->dma_wait_q); | |
721 | |
722 minor = MINOR(dev_conf->dev) ; | |
723 dev_conf->base_minor = minor ; | |
724 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
31
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725 printk(KERN_INFO "PT1: device[%d]=%p\n", lp, device[lp]); |
0 | 726 if(device[lp] == NULL){ |
727 device[lp] = dev_conf ; | |
31
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728 dev_conf->card_number = lp; |
0 | 729 break ; |
730 } | |
731 } | |
50
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732 |
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733 spin_unlock(&lock); |
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734 |
0 | 735 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ |
736 cdev_init(&dev_conf->cdev[lp], &pt1_fops); | |
30
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737 dev_conf->cdev[lp].owner = THIS_MODULE; |
31
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738 cdev_add(&dev_conf->cdev[lp], |
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739 MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp)), 1); |
0 | 740 channel = kzalloc(sizeof(PT1_CHANNEL), GFP_KERNEL); |
741 if(!channel){ | |
742 printk(KERN_ERR "PT1:out of memory !"); | |
743 return -ENOMEM ; | |
744 } | |
745 | |
746 // 共通情報 | |
747 mutex_init(&channel->lock); | |
748 // 待ち状態を解除 | |
749 channel->req_dma = FALSE ; | |
750 // マイナー番号設定 | |
751 channel->minor = MINOR(dev_conf->dev) + lp ; | |
752 // 対象のI2Cデバイス | |
753 channel->address = i2c_address[lp] ; | |
754 channel->type = channeltype[lp] ; | |
755 // 実際のチューナ番号 | |
756 channel->channel = real_chanel[lp] ; | |
757 channel->ptr = dev_conf ; | |
758 channel->size = 0 ; | |
759 dev_conf->channel[lp] = channel ; | |
760 | |
761 init_waitqueue_head(&channel->wait_q); | |
762 | |
763 switch(channel->type){ | |
764 case CHANNEL_TYPE_ISDB_T: | |
765 channel->maxsize = CHANEL_DMA_SIZE ; | |
41
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766 channel->buf = vmalloc(CHANEL_DMA_SIZE); |
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767 channel->pointer = 0; |
0 | 768 break ; |
769 case CHANNEL_TYPE_ISDB_S: | |
770 channel->maxsize = BS_CHANEL_DMA_SIZE ; | |
41
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771 channel->buf = vmalloc(BS_CHANEL_DMA_SIZE); |
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772 channel->pointer = 0; |
0 | 773 break ; |
774 } | |
775 if(channel->buf == NULL){ | |
776 goto out_err_v4l; | |
777 } | |
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778 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) |
31
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779 printk(KERN_INFO "PT1: card_number = %d\n", |
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780 dev_conf->card_number); |
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781 device_create(pt1video_class, |
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782 NULL, |
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783 MKDEV(MAJOR(dev_conf->dev), |
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784 (MINOR(dev_conf->dev) + lp)), |
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785 NULL, |
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|
786 "pt1video%u", |
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|
787 MINOR(dev_conf->dev) + lp + |
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|
788 dev_conf->card_number * MAX_CHANNEL); |
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789 #else |
31
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790 device_create(pt1video_class, |
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diff
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|
791 NULL, |
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792 MKDEV(MAJOR(dev_conf->dev), |
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793 (MINOR(dev_conf->dev) + lp)), |
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diff
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|
794 "pt1video%u", |
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|
795 MINOR(dev_conf->dev) + lp + |
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|
796 dev_conf->card_number * MAX_CHANNEL); |
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|
797 #endif |
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798 |
0 | 799 #if 0 |
800 dev_conf->vdev[lp] = video_device_alloc(); | |
801 memcpy(dev_conf->vdev[lp], &pt1_template, sizeof(pt1_template)); | |
802 video_set_drvdata(dev_conf->vdev[lp], channel); | |
803 video_register_device(dev_conf->vdev[lp], VFL_TYPE_GRABBER, -1); | |
804 #endif | |
805 } | |
31
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806 |
0 | 807 if(pt1_dma_init(pdev, dev_conf) < 0){ |
808 goto out_err_dma; | |
809 } | |
810 dev_conf->kthread = kthread_run(pt1_thread, dev_conf, "pt1"); | |
811 pci_set_drvdata(pdev, dev_conf); | |
812 return 0; | |
813 | |
814 out_err_dma: | |
815 pt1_dma_free(pdev, dev_conf); | |
816 out_err_v4l: | |
817 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
818 if(dev_conf->channel[lp] != NULL){ | |
819 if(dev_conf->channel[lp]->buf != NULL){ | |
41
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diff
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|
820 vfree(dev_conf->channel[lp]->buf); |
0 | 821 } |
822 kfree(dev_conf->channel[lp]); | |
823 } | |
824 } | |
825 out_err_fpga: | |
826 writel(0xb0b0000, dev_conf->regs); | |
827 writel(0, dev_conf->regs + 4); | |
828 iounmap(dev_conf->regs); | |
829 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
40
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diff
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830 for (i = 0; i < DMA_RING_SIZE; i++) { |
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831 kfree(dev_conf->dmactl[i]); |
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832 } |
0 | 833 kfree(dev_conf); |
834 out_err_regbase: | |
835 return -EIO; | |
836 | |
837 } | |
838 | |
839 static void __devexit pt1_pci_remove_one(struct pci_dev *pdev) | |
840 { | |
841 | |
842 int lp ; | |
843 __u32 val ; | |
844 PT1_DEVICE *dev_conf = (PT1_DEVICE *)pci_get_drvdata(pdev); | |
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845 int i; |
0 | 846 |
847 if(dev_conf){ | |
848 if(dev_conf->kthread) { | |
849 kthread_stop(dev_conf->kthread); | |
850 dev_conf->kthread = NULL; | |
851 } | |
852 | |
853 // DMA終了 | |
854 writel(0x08080000, dev_conf->regs); | |
855 for(lp = 0 ; lp < 10 ; lp++){ | |
856 val = readl(dev_conf->regs); | |
857 if(!(val & (1 << 6))){ | |
858 break ; | |
859 } | |
860 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
861 } | |
862 pt1_dma_free(pdev, dev_conf); | |
863 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
864 if(dev_conf->channel[lp] != NULL){ | |
865 cdev_del(&dev_conf->cdev[lp]); | |
41
51a006a8d843
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diff
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866 vfree(dev_conf->channel[lp]->buf); |
0 | 867 kfree(dev_conf->channel[lp]); |
868 } | |
31
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diff
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|
869 device_destroy(pt1video_class, |
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diff
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|
870 MKDEV(MAJOR(dev_conf->dev), |
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diff
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871 (MINOR(dev_conf->dev) + lp))); |
0 | 872 } |
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diff
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|
873 |
0 | 874 unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL); |
875 writel(0xb0b0000, dev_conf->regs); | |
876 writel(0, dev_conf->regs + 4); | |
877 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_OFF); | |
878 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
879 iounmap(dev_conf->regs); | |
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diff
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880 for (i = 0; i < DMA_RING_SIZE; i++) { |
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|
881 kfree(dev_conf->dmactl[i]); |
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diff
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882 } |
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|
883 device[dev_conf->card_number] = NULL; |
0 | 884 kfree(dev_conf); |
885 } | |
886 pci_set_drvdata(pdev, NULL); | |
887 } | |
888 #ifdef CONFIG_PM | |
889 | |
890 static int pt1_pci_suspend (struct pci_dev *pdev, pm_message_t state) | |
891 { | |
892 return 0; | |
893 } | |
894 | |
895 static int pt1_pci_resume (struct pci_dev *pdev) | |
896 { | |
897 return 0; | |
898 } | |
899 | |
900 #endif /* CONFIG_PM */ | |
901 | |
902 | |
903 static struct pci_driver pt1_driver = { | |
904 .name = DRV_NAME, | |
905 .probe = pt1_pci_init_one, | |
906 .remove = __devexit_p(pt1_pci_remove_one), | |
907 .id_table = pt1_pci_tbl, | |
908 #ifdef CONFIG_PM | |
909 .suspend = pt1_pci_suspend, | |
910 .resume = pt1_pci_resume, | |
911 #endif /* CONFIG_PM */ | |
912 | |
913 }; | |
914 | |
915 | |
916 static int __init pt1_pci_init(void) | |
917 { | |
36 | 918 printk(version); |
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diff
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919 pt1video_class = class_create(THIS_MODULE, DRIVERNAME); |
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diff
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920 if (IS_ERR(pt1video_class)) |
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diff
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921 return PTR_ERR(pt1video_class); |
50
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922 spin_lock_init(&lock); |
0 | 923 return pci_register_driver(&pt1_driver); |
924 } | |
925 | |
926 | |
927 static void __exit pt1_pci_cleanup(void) | |
928 { | |
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07b2fc07ff48
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diff
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|
929 class_destroy(pt1video_class); |
31
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diff
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930 pci_unregister_driver(&pt1_driver); |
0 | 931 } |
932 | |
933 module_init(pt1_pci_init); | |
934 module_exit(pt1_pci_cleanup); |