annotate driver/pt1_pci.c @ 31:289794dc265f

adapted to use of multiple number of pt1: - now pt1_open() checks major number. - passes unique device name to device_create(). - handles device[] bit carefully.
author Yoshiki Yazawa <yaz@honeyplanet.jp>
date Tue, 03 Mar 2009 05:15:40 +0900 (2009-03-02)
parents eb694d8e4c7e
children 65c8ac567074
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1 /* pt1-pci.c: A PT1 on PCI bus driver for Linux. */
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2 #define DRV_NAME "pt1-pci"
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3 #define DRV_VERSION "1.00"
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4 #define DRV_RELDATE "11/28/2008"
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5
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6
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7 #include <linux/module.h>
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8 #include <linux/kernel.h>
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9 #include <linux/errno.h>
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10 #include <linux/pci.h>
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11 #include <linux/init.h>
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12 #include <linux/interrupt.h>
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13
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14 #include <asm/system.h>
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15 #include <asm/io.h>
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16 #include <asm/irq.h>
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17 #include <asm/uaccess.h>
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18 #include <linux/version.h>
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19 #include <linux/mutex.h>
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20 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)
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21 #include <linux/freezer.h>
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22 #else
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23 #define set_freezable()
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24 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
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25 typedef struct pm_message {
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26 int event;
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27 } pm_message_t;
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28 #endif
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29 #endif
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30 #include <linux/kthread.h>
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31 #include <linux/dma-mapping.h>
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32
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33 #include <linux/fs.h>
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34 #include <linux/cdev.h>
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35
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36 #include <linux/ioctl.h>
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37
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38 #include "pt1_com.h"
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39 #include "pt1_pci.h"
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40 #include "pt1_tuner.h"
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41 #include "pt1_i2c.h"
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42 #include "pt1_tuner_data.h"
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43 #include "pt1_ioctl.h"
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44
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45 /* These identify the driver base version and may not be removed. */
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46 static char version[] __devinitdata =
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47 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " \n";
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48
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49 MODULE_AUTHOR("Tomoaki Ishikawa tomy@users.sourceforge.jp");
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50 #define DRIVER_DESC "PCI earthsoft PT1 driver"
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51 MODULE_DESCRIPTION(DRIVER_DESC);
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52 MODULE_LICENSE("GPL");
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53
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54 static int debug = 7; /* 1 normal messages, 0 quiet .. 7 verbose. */
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55 static int lnb = 0; /* LNB OFF:0 +11V:1 +15V:2 */
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56
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57 module_param(debug, int, 0);
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58 module_param(lnb, int, 0);
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59 MODULE_PARM_DESC(debug, "debug level (1-2)");
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60 MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)");
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61
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62 static struct pci_device_id pt1_pci_tbl[] = {
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63 { 0x10ee, 0x211a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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64 { 0, }
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65 };
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66 MODULE_DEVICE_TABLE(pci, pt1_pci_tbl);
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67 #define DEV_NAME "pt1video"
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68
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69 #define MAX_READ_BLOCK 4 // 1度に読み出す最大DMAバッファ数
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70 #define MAX_PCI_DEVICE 128 // 最大64枚
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71 #define DMA_SIZE 4096 // DMAバッファサイズ
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72 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
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73 #define DMA_RING_SIZE 128 // RINGサイズ
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74 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで)
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75 #define CHANEL_DMA_SIZE (2*1024*1024) // 地デジ用(16Mbps)
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76 #define BS_CHANEL_DMA_SIZE (4*1024*1024) // BS用(32Mbps)
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77 #else
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78 #define DMA_RING_SIZE 28 // RINGサイズ
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79 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで)
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80 #define CHANEL_DMA_SIZE (1*128*1024) // 地デジ用(16Mbps)
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81 #define BS_CHANEL_DMA_SIZE (1*128*1024) // BS用(32Mbps)
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82 #endif
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83
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84 typedef struct _DMA_CONTROL{
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85 dma_addr_t ring_dma[DMA_RING_MAX] ; // DMA情報
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86 __u32 *data[DMA_RING_MAX];
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87 }DMA_CONTROL;
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88
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89 typedef struct _PT1_CHANNEL PT1_CHANNEL;
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90
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91 typedef struct _pt1_device{
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92 unsigned long mmio_start ;
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93 __u32 mmio_len ;
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94 void __iomem *regs;
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95 struct mutex lock ;
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96 dma_addr_t ring_dma[DMA_RING_SIZE] ; // DMA情報
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97 void *dmaptr[DMA_RING_SIZE] ;
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98 struct task_struct *kthread;
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99 dev_t dev ;
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100 int card_number;
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101 __u32 base_minor ;
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102 struct cdev cdev[MAX_CHANNEL];
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103 wait_queue_head_t dma_wait_q ;// for poll on reading
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104 DMA_CONTROL dmactl[DMA_RING_SIZE];
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105 PT1_CHANNEL *channel[MAX_CHANNEL];
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106 }PT1_DEVICE;
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107
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108 typedef struct _MICRO_PACKET{
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109 char data[3];
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110 char head ;
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111 }MICRO_PACKET;
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112
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113 struct _PT1_CHANNEL{
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114 __u32 valid ; // 使用中フラグ
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115 __u32 address ; // I2Cアドレス
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116 __u32 channel ; // チャネル番号
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117 int type ; // チャネルタイプ
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118 __u32 drop ; // パケットドロップ数
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119 struct mutex lock ; // CH別mutex_lock用
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120 __u32 size ; // DMAされたサイズ
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121 __u32 maxsize ; // DMA用バッファサイズ
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122 __u32 bufsize ; // チャネルに割り振られたサイズ
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123 __u32 overflow ; // オーバーフローエラー発生
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124 __u32 counetererr ; // 転送カウンタ1エラー
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125 __u32 transerr ; // 転送エラー
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126 __u32 minor ; // マイナー番号
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127 __u8 *buf; // CH別受信メモリ
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128 __u8 req_dma ; // 溢れたチャネル
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129 PT1_DEVICE *ptr ; // カード別情報
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130 wait_queue_head_t wait_q ; // for poll on reading
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131 };
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132
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133 // I2Cアドレス(video0, 1 = ISDB-S) (video2, 3 = ISDB-T)
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134 int i2c_address[MAX_CHANNEL] = {T0_ISDB_S, T1_ISDB_S, T0_ISDB_T, T1_ISDB_T};
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135 int real_chanel[MAX_CHANNEL] = {0, 2, 1, 3};
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136 int channeltype[MAX_CHANNEL] = {CHANNEL_TYPE_ISDB_S, CHANNEL_TYPE_ISDB_S,
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137 CHANNEL_TYPE_ISDB_T, CHANNEL_TYPE_ISDB_T};
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138
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139 static PT1_DEVICE *device[MAX_PCI_DEVICE];
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140 static struct class *pt1video_class;
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141
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142 #define PT1MAJOR 251
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143 #define DRIVERNAME "pt1video"
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144
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145 static void reset_dma(PT1_DEVICE *dev_conf)
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146 {
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147
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148 int lp ;
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149 __u32 addr ;
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diff changeset
150 int ring_pos = 0;
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diff changeset
151 int data_pos = 0 ;
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152 __u32 *dataptr ;
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diff changeset
153
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parents:
diff changeset
154 // データ初期化
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diff changeset
155 for(ring_pos = 0 ; ring_pos < DMA_RING_SIZE ; ring_pos++){
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diff changeset
156 for(data_pos = 0 ; data_pos < DMA_RING_MAX ; data_pos++){
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diff changeset
157 dataptr = dev_conf->dmactl[ring_pos].data[data_pos];
9
07b2fc07ff48 updated to current driver to support signal strength.
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parents: 0
diff changeset
158 dataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0;
0
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diff changeset
159 }
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parents:
diff changeset
160 }
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parents:
diff changeset
161 // 転送カウンタをリセット
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diff changeset
162 writel(0x00000010, dev_conf->regs);
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parents:
diff changeset
163 // 転送カウンタをインクリメント
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parents:
diff changeset
164 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
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parents:
diff changeset
165 writel(0x00000020, dev_conf->regs);
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parents:
diff changeset
166 }
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diff changeset
167
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diff changeset
168 addr = (int)dev_conf->ring_dma[0] ;
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169 addr >>= 12 ;
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parents:
diff changeset
170 // DMAバッファ設定
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diff changeset
171 writel(addr, dev_conf->regs + DMA_ADDR);
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parents:
diff changeset
172 // DMA開始
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173 writel(0x0c000040, dev_conf->regs);
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diff changeset
174
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diff changeset
175 }
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176 static int pt1_thread(void *data)
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177 {
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178 PT1_DEVICE *dev_conf = data ;
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179 PT1_CHANNEL *channel ;
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180 int ring_pos = 0;
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181 int data_pos = 0 ;
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182 int lp ;
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183 int chno ;
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184 int lp2 ;
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185 __u32 addr ;
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186 __u32 *dataptr ;
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187 __u32 *curdataptr ;
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188 __u32 val ;
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189 union mpacket{
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190 __u32 val ;
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191 MICRO_PACKET packet ;
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192 }micro;
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193
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194 set_freezable();
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195 reset_dma(dev_conf);
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196 printk(KERN_INFO "pt1_thread run\n");
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diff changeset
197
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diff changeset
198 for(;;){
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199 if(kthread_should_stop()){
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200 break ;
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diff changeset
201 }
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parents:
diff changeset
202
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diff changeset
203 for(;;){
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204 dataptr = dev_conf->dmactl[ring_pos].data[data_pos];
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parents:
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205 // データあり?
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206 if(dataptr[(DMA_SIZE / sizeof(__u32)) - 2] == 0){
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207 break ;
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diff changeset
208 }
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diff changeset
209 micro.val = *dataptr ;
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diff changeset
210 curdataptr = dataptr ;
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diff changeset
211 data_pos += 1 ;
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diff changeset
212 for(lp = 0 ; lp < (DMA_SIZE / sizeof(__u32)) ; lp++, dataptr++){
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diff changeset
213 micro.val = *dataptr ;
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diff changeset
214 chno = real_chanel[(((micro.packet.head >> 5) & 0x07) - 1)];
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diff changeset
215 channel = dev_conf->channel[chno] ;
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parents:
diff changeset
216 // エラーチェック
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diff changeset
217 if((micro.packet.head & MICROPACKET_ERROR)){
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diff changeset
218 val = readl(dev_conf->regs);
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diff changeset
219 if((val & BIT_RAM_OVERFLOW)){
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diff changeset
220 channel->overflow += 1 ;
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diff changeset
221 }
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diff changeset
222 if((val & BIT_INITIATOR_ERROR)){
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diff changeset
223 channel->counetererr += 1 ;
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diff changeset
224 }
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diff changeset
225 if((val & BIT_INITIATOR_WARNING)){
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diff changeset
226 channel->transerr += 1 ;
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diff changeset
227 }
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diff changeset
228 // 初期化して先頭から
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229 reset_dma(dev_conf);
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diff changeset
230 ring_pos = data_pos = 0 ;
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231 break ;
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diff changeset
232 }
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diff changeset
233 // 未使用チャネルは捨てる
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diff changeset
234 if(channel->valid == FALSE){
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diff changeset
235 continue ;
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diff changeset
236 }
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diff changeset
237 mutex_lock(&channel->lock);
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parents:
diff changeset
238 // あふれたら読み出すまで待つ
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parents:
diff changeset
239 while(1){
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diff changeset
240 if(channel->size >= (channel->maxsize - 4)){
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diff changeset
241 // 該当チャンネルのDMA読みだし待ちにする
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diff changeset
242 wake_up(&channel->wait_q);
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diff changeset
243 channel->req_dma = TRUE ;
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diff changeset
244 mutex_unlock(&channel->lock);
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diff changeset
245 // タスクに時間を渡す為中断
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diff changeset
246 wait_event_timeout(dev_conf->dma_wait_q, (channel->req_dma == FALSE),
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diff changeset
247 msecs_to_jiffies(500));
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diff changeset
248 mutex_lock(&channel->lock);
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diff changeset
249 channel->drop += 1 ;
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diff changeset
250 }else{
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diff changeset
251 break ;
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parents:
diff changeset
252 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
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diff changeset
253 }
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parents:
diff changeset
254 // データコピー
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parents:
diff changeset
255 for(lp2 = 2 ; lp2 >= 0 ; lp2--){
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diff changeset
256 channel->buf[channel->size] = micro.packet.data[lp2];
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diff changeset
257 channel->size += 1 ;
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parents:
diff changeset
258 }
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Yoshiki Yazawa <yaz@honeyplanet.jp>
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diff changeset
259 mutex_unlock(&channel->lock);
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parents:
diff changeset
260 }
67e8eca28a80 initial import
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diff changeset
261 curdataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0;
67e8eca28a80 initial import
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parents:
diff changeset
262
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parents:
diff changeset
263 if(data_pos >= DMA_RING_MAX){
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parents:
diff changeset
264 data_pos = 0;
67e8eca28a80 initial import
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parents:
diff changeset
265 ring_pos += 1 ;
67e8eca28a80 initial import
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parents:
diff changeset
266 // DMAリングが変わった場合はインクリメント
67e8eca28a80 initial import
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parents:
diff changeset
267 writel(0x00000020, dev_conf->regs);
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parents:
diff changeset
268 if(ring_pos >= DMA_RING_SIZE){
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diff changeset
269 ring_pos = 0 ;
67e8eca28a80 initial import
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parents:
diff changeset
270 }
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diff changeset
271 }
67e8eca28a80 initial import
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parents:
diff changeset
272
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parents:
diff changeset
273 // 頻度を落す(4Kで起動させる)
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
274 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
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diff changeset
275 channel = dev_conf->channel[real_chanel[lp]] ;
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parents:
diff changeset
276 if((channel->size >= DMA_SIZE) && (channel->valid == TRUE)){
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parents:
diff changeset
277 wake_up(&channel->wait_q);
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parents:
diff changeset
278 }
67e8eca28a80 initial import
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parents:
diff changeset
279 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
280 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
281 schedule_timeout_interruptible(msecs_to_jiffies(1));
67e8eca28a80 initial import
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parents:
diff changeset
282 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
283 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
284 }
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
285 static int pt1_open(struct inode *inode, struct file *file)
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parents:
diff changeset
286 {
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diff changeset
287
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
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diff changeset
288 int major = imajor(inode);
0
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
289 int minor = iminor(inode);
67e8eca28a80 initial import
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diff changeset
290 int lp ;
67e8eca28a80 initial import
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parents:
diff changeset
291 int lp2 ;
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parents:
diff changeset
292 PT1_CHANNEL *channel ;
67e8eca28a80 initial import
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parents:
diff changeset
293
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
294 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){
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diff changeset
295 if(device[lp] == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
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diff changeset
296 return -EIO ;
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
297 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
298
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
299 if(MAJOR(device[lp]->dev) == major &&
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
300 device[lp]->base_minor <= minor &&
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
301 device[lp]->base_minor + MAX_CHANNEL > minor) {
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
302
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
303 mutex_lock(&device[lp]->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
304 for(lp2 = 0 ; lp2 < MAX_CHANNEL ; lp2++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
305 channel = device[lp]->channel[lp2] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
306 if(channel->minor == minor){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
307 if(channel->valid == TRUE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
308 mutex_unlock(&device[lp]->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
309 return -EIO ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
310 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
311 channel->drop = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
312 channel->valid = TRUE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
313 channel->overflow = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
314 channel->counetererr = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
315 channel->transerr = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
316 file->private_data = channel;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
317 mutex_lock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
318 // データ初期化
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
319 channel->size = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
320 mutex_unlock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
321 mutex_unlock(&device[lp]->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
322 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
323 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
324 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
325 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
326 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
327 return -EIO;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
328 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
329 static int pt1_release(struct inode *inode, struct file *file)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
330 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
331 int minor = iminor(inode);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
332 PT1_CHANNEL *channel = file->private_data;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
333
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
334 mutex_lock(&channel->ptr->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
335 SetStream(channel->ptr->regs, channel->channel, FALSE);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
336 channel->valid = FALSE ;
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
337 printk(KERN_INFO "(%d:%d)Drop=%08d:%08d:%08d:%08d\n", imajor(inode), iminor(inode), channel->drop,
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
338 channel->overflow, channel->counetererr, channel->transerr);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
339 channel->overflow = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
340 channel->counetererr = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
341 channel->transerr = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
342 channel->drop = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
343 // 停止している場合は起こす
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
344 if(channel->req_dma == TRUE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
345 channel->req_dma = FALSE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
346 wake_up(&channel->ptr->dma_wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
347 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
348 mutex_unlock(&channel->ptr->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
349 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
350 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
351
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
352 static ssize_t pt1_read(struct file *file, char __user *buf, size_t cnt, loff_t * ppos)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
353 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
354 PT1_CHANNEL *channel = file->private_data;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
355 __u32 size ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
356
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
357
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
358 // 4K単位で起こされるのを待つ(CPU負荷対策)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
359 if(channel->size < DMA_SIZE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
360 wait_event_timeout(channel->wait_q, (channel->size >= DMA_SIZE),
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
361 msecs_to_jiffies(500));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
362 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
363 mutex_lock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
364 if(!channel->size){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
365 size = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
366 }else{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
367 if(cnt < channel->size){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
368 // バッファが足りない場合は残りを移動する
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
369 size = cnt ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
370 copy_to_user(buf, channel->buf, cnt);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
371 memmove(channel->buf, &channel->buf[cnt], (channel->size - cnt));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
372 channel->size -= cnt ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
373 }else{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
374 size = channel->size ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
375 copy_to_user(buf, channel->buf, size);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
376 channel->size = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
377 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
378 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
379 // 読み終わったかつ使用しているのがが4K以下
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
380 if(channel->req_dma == TRUE){
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
381 channel->req_dma = FALSE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
382 wake_up(&channel->ptr->dma_wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
383 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
384 mutex_unlock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
385 return size ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
386 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
387 static int SetFreq(PT1_CHANNEL *channel, FREQUENCY *freq)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
388 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
389
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
390 switch(channel->type){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
391 case CHANNEL_TYPE_ISDB_S:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
392 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
393 ISDB_S_TMCC tmcc ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
394 if(bs_tune(channel->ptr->regs,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
395 &channel->ptr->lock,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
396 channel->address,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
397 freq->frequencyno,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
398 &tmcc) < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
399 return -EIO ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
400 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
401
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
402 #if 0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
403 printk(KERN_INFO "clockmargin = (%x)\n", (tmcc.clockmargin & 0xFF));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
404 printk(KERN_INFO "carriermargin = (%x)\n", (tmcc.carriermargin & 0xFF));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
405
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
406 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
407 if(tmcc.ts_id[lp].ts_id == 0xFFFF){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
408 continue ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
409 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
410 printk(KERN_INFO "Slot(%d:%x)\n", lp, tmcc.ts_id[lp].ts_id);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
411 printk(KERN_INFO "mode (low/high) = (%x:%x)\n",
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
412 tmcc.ts_id[lp].low_mode, tmcc.ts_id[lp].high_mode);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
413 printk(KERN_INFO "slot (low/high) = (%x:%x)\n",
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
414 tmcc.ts_id[lp].low_slot,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
415 tmcc.ts_id[lp].high_slot);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
416 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
417 #endif
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
418 ts_lock(channel->ptr->regs,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
419 &channel->ptr->lock,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
420 channel->address,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
421 tmcc.ts_id[freq->slot].ts_id);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
422 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
423 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
424 case CHANNEL_TYPE_ISDB_T:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
425 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
426 if(isdb_t_frequency(channel->ptr->regs,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
427 &channel->ptr->lock,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
428 channel->address,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
429 freq->frequencyno, freq->slot) < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
430 return -EINVAL ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
431 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
432 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
433 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
434 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
435 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
436 static int pt1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, void *arg)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
437 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
438 PT1_CHANNEL *channel = file->private_data;
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
439 int signal ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
440
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
441 switch(cmd){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
442 case SET_CHANNEL:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
443 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
444 FREQUENCY freq ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
445 copy_from_user(&freq, arg, sizeof(FREQUENCY));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
446 return SetFreq(channel, &freq);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
447 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
448 case START_REC:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
449 SetStream(channel->ptr->regs, channel->channel, TRUE);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
450 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
451 case STOP_REC:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
452 SetStream(channel->ptr->regs, channel->channel, FALSE);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
453 return 0 ;
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
454 case GET_SIGNAL_STRENGTH:
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
455 switch(channel->type){
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
456 case CHANNEL_TYPE_ISDB_S:
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
457 {
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
458 signal = isdb_s_read_signal_strength(channel->ptr->regs,
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
459 &channel->ptr->lock,
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
460 channel->address);
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
461 }
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
462 break ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
463 case CHANNEL_TYPE_ISDB_T:
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
464 // calc C/N
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
465 signal = isdb_t_read_signal_strength(channel->ptr->regs,
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
466 &channel->ptr->lock, channel->address);
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
467 break ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
468 }
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
469 copy_to_user(arg, &signal, sizeof(int));
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
470 return 0 ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
471 case LNB_ENABLE:
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
472 if(lnb){
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
473 settuner_reset(channel->ptr->regs, lnb, TUNER_POWER_ON_RESET_DISABLE);
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
474 }
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
475 return 0 ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
476 case LNB_DISABLE:
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
477 if(lnb){
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
478 settuner_reset(channel->ptr->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
479 }
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
480 return 0 ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
481 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
482 return -EINVAL;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
483 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
484
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
485 /*
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
486 */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
487 static const struct file_operations pt1_fops = {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
488 .owner = THIS_MODULE,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
489 .open = pt1_open,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
490 .release = pt1_release,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
491 .read = pt1_read,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
492 .ioctl = pt1_ioctl,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
493 .llseek = no_llseek,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
494 };
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
495
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
496 int pt1_makering(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
497 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
498 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
499 int lp2 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
500 DMA_CONTROL *dmactl;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
501 __u32 *dmaptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
502 __u32 addr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
503 __u32 *ptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
504
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
505 //DMAリング作成
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
506 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
507 ptr = dev_conf->dmaptr[lp];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
508 if(lp == (DMA_RING_SIZE - 1)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
509 addr = (__u32)dev_conf->ring_dma[0];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
510 }else{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
511 addr = (__u32)dev_conf->ring_dma[(lp + 1)];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
512 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
513 addr >>= 12 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
514 memcpy(ptr, &addr, sizeof(__u32));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
515 ptr += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
516
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
517 dmactl = &dev_conf->dmactl[lp];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
518 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
519 dmaptr = pci_alloc_consistent(pdev, DMA_SIZE, &dmactl->ring_dma[lp2]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
520 if(dmaptr == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
521 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
522 return -1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
523 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
524 dmactl->data[lp2] = dmaptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
525 // DMAデータエリア初期化
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
526 dmaptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
527 addr = (__u32)dmactl->ring_dma[lp2];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
528 addr >>= 12 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
529 memcpy(ptr, &addr, sizeof(__u32));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
530 ptr += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
531 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
532 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
533 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
534 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
535 int pt1_dma_init(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
536 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
537 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
538 void *ptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
539
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
540 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
541 ptr = pci_alloc_consistent(pdev, DMA_SIZE, &dev_conf->ring_dma[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
542 if(ptr == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
543 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
544 return -1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
545 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
546 dev_conf->dmaptr[lp] = ptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
547 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
548
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
549 return pt1_makering(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
550 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
551 int pt1_dma_free(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
552 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
553
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
554 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
555 int lp2 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
556
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
557 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
558 if(dev_conf->dmaptr[lp] != NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
559 pci_free_consistent(pdev, DMA_SIZE,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
560 dev_conf->dmaptr[lp], dev_conf->ring_dma[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
561 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
562 if(dev_conf->dmactl[lp].data[lp2] != NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
563 pci_free_consistent(pdev, DMA_SIZE,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
564 dev_conf->dmactl[lp].data[lp2],
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
565 dev_conf->dmactl[lp].ring_dma[lp2]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
566 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
567 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
568 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
569 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
570 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
571 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
572 static int __devinit pt1_pci_init_one (struct pci_dev *pdev,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
573 const struct pci_device_id *ent)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
574 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
575 int rc ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
576 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
577 int minor ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
578 u16 cmd ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
579 PT1_DEVICE *dev_conf ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
580 PT1_CHANNEL *channel ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
581
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
582 rc = pci_enable_device(pdev);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
583 if (rc)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
584 return rc;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
585 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
586 if (rc) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
587 printk(KERN_ERR "PT1:DMA MASK ERROR");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
588 return rc;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
589 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
590
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
591 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
592 if (!(cmd & PCI_COMMAND_MASTER)) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
593 printk(KERN_INFO "Attempting to enable Bus Mastering\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
594 pci_set_master(pdev);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
595 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
596 if (!(cmd & PCI_COMMAND_MASTER)) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
597 printk(KERN_ERR "Bus Mastering is not enabled\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
598 return -EIO;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
599 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
600 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
601 printk(KERN_INFO "Bus Mastering Enabled.\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
602
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
603 dev_conf = kzalloc(sizeof(PT1_DEVICE), GFP_KERNEL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
604 if(!dev_conf){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
605 printk(KERN_ERR "PT1:out of memory !");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
606 return -ENOMEM ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
607 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
608 // PCIアドレスをマップする
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
609 dev_conf->mmio_start = pci_resource_start(pdev, 0);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
610 dev_conf->mmio_len = pci_resource_len(pdev, 0);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
611 rc = request_mem_region(dev_conf->mmio_start, dev_conf->mmio_len, DEV_NAME);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
612 if (!rc) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
613 printk(KERN_ERR "PT1: cannot request iomem (0x%llx).\n", (unsigned long long) dev_conf->mmio_start);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
614 goto out_err_regbase;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
615 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
616
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
617 dev_conf->regs = ioremap(dev_conf->mmio_start, dev_conf->mmio_len);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
618 if (!dev_conf->regs){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
619 printk(KERN_ERR "pt1: Can't remap register area.\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
620 goto out_err_regbase;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
621 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
622 // 初期化処理
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
623 if(xc3s_init(dev_conf->regs)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
624 printk(KERN_ERR "Error xc3s_init\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
625 goto out_err_fpga;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
626 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
627 // チューナリセット
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
628 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
629 schedule_timeout_interruptible(msecs_to_jiffies(50));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
630
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
631 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
632 schedule_timeout_interruptible(msecs_to_jiffies(10));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
633 mutex_init(&dev_conf->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
634
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
635 // Tuner 初期化処理
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
636 for(lp = 0 ; lp < MAX_TUNER ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
637 rc = tuner_init(dev_conf->regs, &dev_conf->lock, lp);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
638 if(rc < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
639 printk(KERN_ERR "Error tuner_init\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
640 goto out_err_fpga;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
641 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
642 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
643 // 初期化完了
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
644 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
645 set_sleepmode(dev_conf->regs, &dev_conf->lock,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
646 i2c_address[lp], channeltype[lp], TYPE_SLEEP);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
647
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
648 schedule_timeout_interruptible(msecs_to_jiffies(50));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
649 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
650 rc = alloc_chrdev_region(&dev_conf->dev, 0, MAX_CHANNEL, DEV_NAME);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
651 if(rc < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
652 goto out_err_fpga;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
653 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
654
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
655 // 初期化
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
656 init_waitqueue_head(&dev_conf->dma_wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
657
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
658 minor = MINOR(dev_conf->dev) ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
659 dev_conf->base_minor = minor ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
660 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
661 printk(KERN_INFO "PT1: device[%d]=%p\n", lp, device[lp]);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
662 if(device[lp] == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
663 device[lp] = dev_conf ;
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
664 dev_conf->card_number = lp;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
665 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
666 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
667 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
668 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
669 cdev_init(&dev_conf->cdev[lp], &pt1_fops);
30
eb694d8e4c7e setup owner in initialization
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 9
diff changeset
670 dev_conf->cdev[lp].owner = THIS_MODULE;
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
671 cdev_add(&dev_conf->cdev[lp],
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
672 MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp)), 1);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
673 channel = kzalloc(sizeof(PT1_CHANNEL), GFP_KERNEL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
674 if(!channel){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
675 printk(KERN_ERR "PT1:out of memory !");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
676 return -ENOMEM ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
677 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
678
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
679 // 共通情報
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
680 mutex_init(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
681 // 待ち状態を解除
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
682 channel->req_dma = FALSE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
683 // マイナー番号設定
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
684 channel->minor = MINOR(dev_conf->dev) + lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
685 // 対象のI2Cデバイス
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
686 channel->address = i2c_address[lp] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
687 channel->type = channeltype[lp] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
688 // 実際のチューナ番号
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
689 channel->channel = real_chanel[lp] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
690 channel->ptr = dev_conf ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
691 channel->size = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
692 dev_conf->channel[lp] = channel ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
693
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
694 init_waitqueue_head(&channel->wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
695
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
696 switch(channel->type){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
697 case CHANNEL_TYPE_ISDB_T:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
698 channel->maxsize = CHANEL_DMA_SIZE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
699 channel->buf = kzalloc(CHANEL_DMA_SIZE, GFP_KERNEL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
700 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
701 case CHANNEL_TYPE_ISDB_S:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
702 channel->maxsize = BS_CHANEL_DMA_SIZE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
703 channel->buf = kzalloc(BS_CHANEL_DMA_SIZE, GFP_KERNEL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
704 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
705 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
706 if(channel->buf == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
707 goto out_err_v4l;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
708 }
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
709 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
710 printk(KERN_INFO "PT1: card_number = %d\n",
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
711 dev_conf->card_number);
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
712 device_create(pt1video_class,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
713 NULL,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
714 MKDEV(MAJOR(dev_conf->dev),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
715 (MINOR(dev_conf->dev) + lp)),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
716 NULL,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
717 "pt1video%u",
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
718 MINOR(dev_conf->dev) + lp +
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
719 dev_conf->card_number * MAX_CHANNEL);
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
720 #else
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
721 device_create(pt1video_class,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
722 NULL,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
723 MKDEV(MAJOR(dev_conf->dev),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
724 (MINOR(dev_conf->dev) + lp)),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
725 "pt1video%u",
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
726 MINOR(dev_conf->dev) + lp +
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
727 dev_conf->card_number * MAX_CHANNEL);
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
728 #endif
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
729
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
730 #if 0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
731 dev_conf->vdev[lp] = video_device_alloc();
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
732 memcpy(dev_conf->vdev[lp], &pt1_template, sizeof(pt1_template));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
733 video_set_drvdata(dev_conf->vdev[lp], channel);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
734 video_register_device(dev_conf->vdev[lp], VFL_TYPE_GRABBER, -1);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
735 #endif
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
736 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
737
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
738 if(pt1_dma_init(pdev, dev_conf) < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
739 goto out_err_dma;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
740 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
741 dev_conf->kthread = kthread_run(pt1_thread, dev_conf, "pt1");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
742 pci_set_drvdata(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
743 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
744
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
745 out_err_dma:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
746 pt1_dma_free(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
747 out_err_v4l:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
748 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
749 if(dev_conf->channel[lp] != NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
750 if(dev_conf->channel[lp]->buf != NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
751 kfree(dev_conf->channel[lp]->buf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
752 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
753 kfree(dev_conf->channel[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
754 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
755 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
756 out_err_fpga:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
757 writel(0xb0b0000, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
758 writel(0, dev_conf->regs + 4);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
759 iounmap(dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
760 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
761 kfree(dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
762 out_err_regbase:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
763 return -EIO;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
764
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
765 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
766
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
767 static void __devexit pt1_pci_remove_one(struct pci_dev *pdev)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
768 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
769
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
770 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
771 __u32 val ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
772 PT1_DEVICE *dev_conf = (PT1_DEVICE *)pci_get_drvdata(pdev);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
773
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
774 if(dev_conf){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
775 if(dev_conf->kthread) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
776 kthread_stop(dev_conf->kthread);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
777 dev_conf->kthread = NULL;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
778 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
779
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
780 // DMA終了
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
781 writel(0x08080000, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
782 for(lp = 0 ; lp < 10 ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
783 val = readl(dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
784 if(!(val & (1 << 6))){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
785 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
786 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
787 schedule_timeout_interruptible(msecs_to_jiffies(1));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
788 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
789 pt1_dma_free(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
790 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
791 if(dev_conf->channel[lp] != NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
792 cdev_del(&dev_conf->cdev[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
793 kfree(dev_conf->channel[lp]->buf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
794 kfree(dev_conf->channel[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
795 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
796 device_destroy(pt1video_class,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
797 MKDEV(MAJOR(dev_conf->dev),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
798 (MINOR(dev_conf->dev) + lp)));
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
799 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
800
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
801 unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
802 writel(0xb0b0000, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
803 writel(0, dev_conf->regs + 4);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
804 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_OFF);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
805 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
806 iounmap(dev_conf->regs);
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
807 device[dev_conf->card_number] = NULL;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
808 kfree(dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
809 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
810 pci_set_drvdata(pdev, NULL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
811 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
812 #ifdef CONFIG_PM
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
813
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
814 static int pt1_pci_suspend (struct pci_dev *pdev, pm_message_t state)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
815 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
816 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
817 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
818
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
819 static int pt1_pci_resume (struct pci_dev *pdev)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
820 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
821 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
822 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
823
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
824 #endif /* CONFIG_PM */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
825
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
826
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
827 static struct pci_driver pt1_driver = {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
828 .name = DRV_NAME,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
829 .probe = pt1_pci_init_one,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
830 .remove = __devexit_p(pt1_pci_remove_one),
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
831 .id_table = pt1_pci_tbl,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
832 #ifdef CONFIG_PM
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
833 .suspend = pt1_pci_suspend,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
834 .resume = pt1_pci_resume,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
835 #endif /* CONFIG_PM */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
836
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
837 };
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
838
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
839
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
840 static int __init pt1_pci_init(void)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
841 {
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
842 pt1video_class = class_create(THIS_MODULE, DRIVERNAME);
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
843 if (IS_ERR(pt1video_class))
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
844 return PTR_ERR(pt1video_class);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
845 return pci_register_driver(&pt1_driver);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
846 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
847
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
848
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
849 static void __exit pt1_pci_cleanup(void)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
850 {
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
851 class_destroy(pt1video_class);
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
852 pci_unregister_driver(&pt1_driver);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
853 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
854
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
855 module_init(pt1_pci_init);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
856 module_exit(pt1_pci_cleanup);