Mercurial > pt1.oyama
annotate driver/pt1_tuner_data.c @ 77:517e61637f7b
a bit cleanup
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Tue, 01 Dec 2009 18:33:01 +0900 |
parents | 28f25ec7f962 |
children | 3c2123189edf |
rev | line source |
---|---|
0 | 1 |
2 #include <linux/module.h> | |
3 #include <linux/kernel.h> | |
4 #include <linux/errno.h> | |
5 #include <linux/pci.h> | |
6 #include <linux/init.h> | |
7 #include <linux/interrupt.h> | |
8 | |
9 #include <asm/system.h> | |
10 #include <asm/io.h> | |
11 #include <asm/irq.h> | |
12 #include <asm/uaccess.h> | |
13 | |
14 #include "pt1_com.h" | |
15 #include "pt1_pci.h" | |
16 #include "pt1_i2c.h" | |
17 #include "pt1_tuner.h" | |
18 #include "pt1_tuner_data.h" | |
19 | |
20 /***************************************************************************/ | |
21 /* 省電力テーブル */ | |
22 /***************************************************************************/ | |
23 /* | |
24 ISDB-Sの省電力設定 | |
25 C0 C1 | |
26 送信:7Bit Address Mode(1b/19):17:00 | |
27 ISDB-Sの省電力無効(2コマンド) | |
28 C0 C1 | |
29 送信:7Bit Address Mode(1B/19):fe:c0:f0:04 | |
30 送信:7Bit Address Mode(1B/19):17:01 | |
31 */ | |
32 WBLOCK isdb_s_wake = { | |
33 0, | |
34 4, | |
35 {0xFE, 0xC0, 0xF0, 0x04} | |
36 }; | |
37 WBLOCK isdb_s_sleep = { | |
38 0, | |
39 2, | |
40 {0x17, 0x00} | |
41 }; | |
42 /* | |
43 ISDB-Tの省電力設定 | |
44 C0 C1 | |
45 送信:7Bit Address Mode(1A/18):03:80 | |
46 | |
47 ISDB-Tの省電力無効(2コマンド) | |
48 C0 C1 | |
49 送信:7Bit Address Mode(1A/18):fe:c2 | |
50 送信:7Bit Address Mode(1A/18):03:90 | |
51 */ | |
52 | |
53 WBLOCK isdb_t_wake = { | |
54 0, | |
55 2, | |
56 {0xFE, 0xC2} | |
57 }; | |
58 WBLOCK isdb_t_sleep = { | |
59 0, | |
60 2, | |
61 {0x03, 0x80} | |
62 }; | |
63 | |
64 /***************************************************************************/ | |
65 /* 初期化データ定義(共通) */ | |
66 /***************************************************************************/ | |
67 WBLOCK com_initdata = { | |
68 0, | |
69 2, | |
70 {0x01, 0x80} | |
71 }; | |
72 | |
73 /***************************************************************************/ | |
74 /* 初期化データ定義(ISDB-S) */ | |
75 /***************************************************************************/ | |
76 // ISDB-S初期化値1 | |
77 WBLOCK isdb_s_init1 ={ | |
78 0, | |
79 1, | |
80 {0x07} | |
81 }; | |
82 // ISDB-S初期化値2 | |
83 WBLOCK isdb_s_init2 ={ | |
84 0, | |
85 2, | |
86 {0x04, 0x02} | |
87 }; | |
88 | |
89 // ISDB-S初期化値3 | |
90 WBLOCK isdb_s_init3 ={ | |
91 0, | |
92 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
93 {0x0D, 0x55} //pt1 only |
0 | 94 }; |
95 // ISDB-S初期化値4 | |
96 WBLOCK isdb_s_init4 ={ | |
97 0, | |
98 2, | |
99 {0x11, 0x40} | |
100 }; | |
101 // ISDB-S初期化値5 | |
102 WBLOCK isdb_s_init5 ={ | |
103 0, | |
104 2, | |
105 {0x13, 0x80} | |
106 }; | |
107 // ISDB-S初期化値6 | |
108 WBLOCK isdb_s_init6 ={ | |
109 0, | |
110 2, | |
111 {0x17, 0x01} | |
112 }; | |
113 // ISDB-S初期化値7 | |
114 WBLOCK isdb_s_init7 ={ | |
115 0, | |
116 2, | |
117 {0x1C, 0x0A} | |
118 }; | |
119 // ISDB-S初期化値8 | |
120 WBLOCK isdb_s_init8 ={ | |
121 0, | |
122 2, | |
123 {0x1D, 0xAA} | |
124 }; | |
125 // ISDB-S初期化値9 | |
126 WBLOCK isdb_s_init9 ={ | |
127 0, | |
128 2, | |
129 {0x1E, 0x20} | |
130 }; | |
131 // ISDB-S初期化値10 | |
132 WBLOCK isdb_s_init10 ={ | |
133 0, | |
134 2, | |
135 {0x1F, 0x88} | |
136 }; | |
137 // ISDB-S初期化値11 | |
138 WBLOCK isdb_s_init11 ={ | |
139 0, | |
140 2, | |
141 {0x51, 0xB0} | |
142 }; | |
143 // ISDB-S初期化値12 | |
144 WBLOCK isdb_s_init12 ={ | |
145 0, | |
146 2, | |
147 {0x52, 0x89} | |
148 }; | |
149 // ISDB-S初期化値13 | |
150 WBLOCK isdb_s_init13 ={ | |
151 0, | |
152 2, | |
153 {0x53, 0xB3} | |
154 }; | |
155 // ISDB-S初期化値14 | |
156 WBLOCK isdb_s_init14 ={ | |
157 0, | |
158 2, | |
159 {0x5A, 0x2D} | |
160 }; | |
161 // ISDB-S初期化値15 | |
162 WBLOCK isdb_s_init15 ={ | |
163 0, | |
164 2, | |
165 {0x5B, 0xD3} | |
166 }; | |
167 // ISDB-S初期化値16 | |
168 WBLOCK isdb_s_init16 ={ | |
169 0, | |
170 2, | |
171 {0x85, 0x69} | |
172 }; | |
173 // ISDB-S初期化値17 | |
174 WBLOCK isdb_s_init17 ={ | |
175 0, | |
176 2, | |
177 {0x87, 0x04} | |
178 }; | |
179 // ISDB-S初期化値18 | |
180 WBLOCK isdb_s_init18 ={ | |
181 0, | |
182 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
183 {0x8E, 0x26} |
0 | 184 }; |
185 // ISDB-S初期化値19 | |
186 WBLOCK isdb_s_init19 ={ | |
187 0, | |
188 2, | |
189 {0xA3, 0xF7} | |
190 }; | |
191 // ISDB-S初期化値20 | |
192 WBLOCK isdb_s_init20 ={ | |
193 0, | |
194 2, | |
195 {0xA5, 0xC0} | |
196 }; | |
197 // ISDB-S初期化値21 | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
198 WBLOCK isdb_s_init21 ={ |
0 | 199 0, |
200 4, | |
201 {0xFE, 0xC0, 0xF0, 0x04} | |
202 }; | |
203 /***************************************************************************/ | |
204 /* 初期化データ定義(ISDB-T) */ | |
205 /***************************************************************************/ | |
206 // ISDB-T初期化値1 | |
207 WBLOCK isdb_t_init1 ={ | |
208 0, | |
209 2, | |
210 {0x03, 0x90} | |
211 }; | |
212 // ISDB-T初期化値2 | |
213 WBLOCK isdb_t_init2 ={ | |
214 0, | |
215 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
216 {0x14, 0x8F} //pt1 only |
0 | 217 }; |
218 // ISDB-T初期化値3 | |
219 WBLOCK isdb_t_init3 ={ | |
220 0, | |
221 2, | |
222 {0x1C, 0x2A} | |
223 }; | |
224 // ISDB-T初期化値4 | |
225 WBLOCK isdb_t_init4 ={ | |
226 0, | |
227 2, | |
228 {0x1D, 0xA8} | |
229 }; | |
230 // ISDB-T初期化値5 | |
231 WBLOCK isdb_t_init5 ={ | |
232 0, | |
233 2, | |
234 {0x1E, 0xA2} | |
235 }; | |
236 // ISDB-T初期化値6 | |
237 WBLOCK isdb_t_init6 ={ | |
238 0, | |
239 2, | |
240 {0x22, 0x83} | |
241 }; | |
242 // ISDB-T初期化値7 | |
243 WBLOCK isdb_t_init7 ={ | |
244 0, | |
245 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
246 {0x31, 0x0D} //pt1 |
0 | 247 }; |
248 // ISDB-T初期化値8 | |
249 WBLOCK isdb_t_init8 ={ | |
250 0, | |
251 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
252 {0x32, 0xE0} //pt1 |
0 | 253 }; |
254 // ISDB-T初期化値9 | |
255 WBLOCK isdb_t_init9 ={ | |
256 0, | |
257 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
258 {0x39, 0xD3} //pt1 |
0 | 259 }; |
260 // ISDB-T初期化値10 | |
261 WBLOCK isdb_t_init10 ={ | |
262 0, | |
263 2, | |
264 {0x3A, 0x00} | |
265 }; | |
266 // ISDB-T初期化値11 | |
267 WBLOCK isdb_t_init11 ={ | |
268 0, | |
269 2, | |
270 {0x5C, 0x40} | |
271 }; | |
272 // ISDB-T初期化値12 | |
273 WBLOCK isdb_t_init12 ={ | |
274 0, | |
275 2, | |
276 {0x5F, 0x80} | |
277 }; | |
278 // ISDB-T初期化値13 | |
279 WBLOCK isdb_t_init13 ={ | |
280 0, | |
281 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
282 {0x75, 0x0a} |
0 | 283 }; |
284 // ISDB-T初期化値14 | |
285 WBLOCK isdb_t_init14 ={ | |
286 0, | |
287 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
288 {0x76, 0x4c} |
0 | 289 }; |
290 // ISDB-T初期化値15 | |
291 WBLOCK isdb_t_init15 ={ | |
292 0, | |
293 2, | |
294 {0x77, 0x03} | |
295 }; | |
296 // ISDB-T初期化値16 | |
297 WBLOCK isdb_t_init16 ={ | |
298 0, | |
299 2, | |
300 {0xEF, 0x01} | |
301 }; | |
302 // ISDB-T初期化値17 | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
303 WBLOCK isdb_t_init17 ={ |
0 | 304 0, |
305 7, | |
306 {0xFE, 0xC2, 0x01, 0x8F, 0xC1, 0x80, 0x80} | |
307 }; | |
308 /***************************************************************************/ | |
309 /* 初期化データブロック定義(ISDB-S) */ | |
310 /***************************************************************************/ | |
77 | 311 WBLOCK *isdb_s_initial_pt1[PT1_MAX_ISDB_S_INIT] = |
0 | 312 { |
313 &isdb_s_init2, &isdb_s_init3, &isdb_s_init4, &isdb_s_init5, | |
314 &isdb_s_init6, &isdb_s_init7, &isdb_s_init8, &isdb_s_init9, | |
315 &isdb_s_init10, &isdb_s_init11, &isdb_s_init12, &isdb_s_init13, | |
316 &isdb_s_init14, &isdb_s_init15, &isdb_s_init16, &isdb_s_init17, | |
317 &isdb_s_init18, &isdb_s_init19, &isdb_s_init20 | |
318 }; | |
77 | 319 WBLOCK *isdb_s_initial_pt2[PT2_MAX_ISDB_S_INIT] = |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
320 { |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
321 &isdb_s_init2, &isdb_s_init4, &isdb_s_init5, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
322 &isdb_s_init6, &isdb_s_init7, &isdb_s_init8, &isdb_s_init9, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
323 &isdb_s_init10, &isdb_s_init11, &isdb_s_init12, &isdb_s_init13, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
324 &isdb_s_init14, &isdb_s_init15, &isdb_s_init16, &isdb_s_init17, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
325 &isdb_s_init18, &isdb_s_init19, &isdb_s_init20 |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
326 }; |
0 | 327 /***************************************************************************/ |
328 /* 初期化データブロック定義(ISDB-T) */ | |
329 /***************************************************************************/ | |
77 | 330 WBLOCK *isdb_t_initial_pt1[PT1_MAX_ISDB_T_INIT] = |
0 | 331 { |
332 &isdb_t_init1, &isdb_t_init2, &isdb_t_init3, &isdb_t_init4, | |
333 &isdb_t_init5, &isdb_t_init6, &isdb_t_init7, &isdb_t_init8, | |
334 &isdb_t_init9, &isdb_t_init10, &isdb_t_init11, &isdb_t_init12, | |
335 &isdb_t_init13, &isdb_t_init14, &isdb_t_init15, &isdb_t_init16 | |
336 }; | |
77 | 337 WBLOCK *isdb_t_initial_pt2[PT2_MAX_ISDB_T_INIT] = |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
338 { |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
339 &isdb_t_init1, &isdb_t_init3, &isdb_t_init4, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
340 &isdb_t_init5, &isdb_t_init6, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
341 &isdb_t_init10, &isdb_t_init11, &isdb_t_init12, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
342 &isdb_t_init13, &isdb_t_init14, &isdb_t_init15, &isdb_t_init16 |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
343 }; |
0 | 344 /***************************************************************************/ |
345 /* 地上デジタル用データ */ | |
346 /***************************************************************************/ | |
347 /***************************************************************************/ | |
348 /* 周波数設定基本テーブル */ | |
349 /* 0〜1: 固定 */ | |
350 /* 2〜3: 計算結果 */ | |
351 /* 4〜5: 追加計算結果 */ | |
352 /***************************************************************************/ | |
353 | |
354 WBLOCK isdb_t_pll_base = { | |
355 0, | |
356 2, | |
357 {0xFE, 0xC2, 0, 0, 0, 0, 0, 0} | |
358 }; | |
359 /***************************************************************************/ | |
360 /* 地デジ周波数ロックチェック */ | |
361 /***************************************************************************/ | |
362 WBLOCK isdb_t_pll_lock = { | |
363 0, | |
364 2, | |
365 {0xFE, 0xC3} | |
366 }; | |
367 | |
368 WBLOCK isdb_t_check_tune = { | |
369 0, | |
370 2, | |
371 {0x01, 0x40} | |
372 }; | |
373 | |
374 WBLOCK isdb_t_tune_read = { | |
375 0, | |
376 1, | |
377 {0x80} | |
378 }; | |
379 WBLOCK isdb_t_tmcc_read_1 = { | |
380 0, | |
381 1, | |
382 {0xB2} | |
383 }; | |
384 WBLOCK isdb_t_tmcc_read_2 = { | |
385 0, | |
386 1, | |
387 {0xB6} | |
388 }; | |
389 /***************************************************************************/ | |
390 /* 地デジ周波数ロックチェック */ | |
391 /***************************************************************************/ | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
392 WBLOCK isdb_t_signal1 = { |
0 | 393 0, |
394 1, | |
395 {0x8C} | |
396 }; | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
397 WBLOCK isdb_t_signal2 = { |
0 | 398 0, |
399 1, | |
400 {0x8D} | |
401 }; | |
402 WBLOCK isdb_t_agc2 = { | |
403 0, | |
404 1, | |
405 {0x82} | |
406 }; | |
407 WBLOCK isdb_t_lockedt1 = { | |
408 0, | |
409 1, | |
410 {0x96} | |
411 }; | |
412 WBLOCK isdb_t_lockedt2 = { | |
413 0, | |
414 1, | |
415 {0xB0} | |
416 }; | |
417 WBLOCK isdb_t_get_clock = { | |
418 0, | |
419 1, | |
420 {0x86} | |
421 }; | |
422 WBLOCK isdb_t_get_carrir = { | |
423 0, | |
424 1, | |
425 {0x84} | |
426 }; | |
427 | |
428 /***************************************************************************/ | |
429 /* 地デジ用データ */ | |
430 /***************************************************************************/ | |
431 | |
432 /***************************************************************************/ | |
433 /* BS用データ */ | |
434 /***************************************************************************/ | |
435 /***************************************************************************/ | |
436 /* BS周波数ロックチェック */ | |
437 /***************************************************************************/ | |
438 WBLOCK bs_pll_lock = { | |
439 0, | |
440 2, | |
441 {0xFE, 0xC1} | |
442 }; | |
443 /***************************************************************************/ | |
444 /* TMCC取得 */ | |
445 /***************************************************************************/ | |
446 WBLOCK bs_tmcc_get_1 = { | |
447 0, | |
448 2, | |
449 {0x03, 0x01} | |
450 }; | |
451 WBLOCK bs_tmcc_get_2 = { | |
452 0, | |
453 1, | |
454 {0xC3} | |
455 }; | |
456 /***************************************************************************/ | |
457 /* TMCC取得 */ | |
458 /***************************************************************************/ | |
459 WBLOCK bs_get_slot_ts_id_1 = { | |
460 0, | |
461 1, | |
462 {0xCE} | |
463 }; | |
464 WBLOCK bs_get_slot_ts_id_2 = { | |
465 0, | |
466 1, | |
467 {0xD2} | |
468 }; | |
469 WBLOCK bs_get_slot_ts_id_3 = { | |
470 0, | |
471 1, | |
472 {0xD6} | |
473 }; | |
474 WBLOCK bs_get_slot_ts_id_4 = { | |
475 0, | |
476 1, | |
477 {0xDA} | |
478 }; | |
479 /***************************************************************************/ | |
480 /* TS-IDロック */ | |
481 /***************************************************************************/ | |
482 WBLOCK bs_set_ts_lock = { | |
483 0, | |
484 3, | |
485 {0x8F, 0x00, 0x00} | |
486 }; | |
487 /***************************************************************************/ | |
488 /* TS-ID取得 */ | |
489 /***************************************************************************/ | |
490 WBLOCK bs_get_ts_lock = { | |
491 0, | |
492 1, | |
493 {0xE6} | |
494 }; | |
495 /***************************************************************************/ | |
496 /* スロット取得 */ | |
497 /***************************************************************************/ | |
498 WBLOCK bs_get_slot = { | |
499 0, | |
500 1, | |
501 {0xE8} | |
502 }; | |
503 /***************************************************************************/ | |
504 /* CN/AGC/MAXAGC取得 */ | |
505 /***************************************************************************/ | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
506 WBLOCK bs_get_signal1 = { |
0 | 507 0, |
508 1, | |
509 {0xBC} | |
510 }; | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
511 WBLOCK bs_get_signal2 = { |
0 | 512 0, |
513 1, | |
514 {0xBD} | |
515 }; | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
516 WBLOCK bs_get_agc = { |
0 | 517 0, |
518 1, | |
519 {0xBA} | |
520 }; | |
521 /***************************************************************************/ | |
522 /* クロック周波数誤差取得 */ | |
523 /***************************************************************************/ | |
524 WBLOCK bs_get_clock = { | |
525 0, | |
526 1, | |
527 {0xBE} | |
528 }; | |
529 /***************************************************************************/ | |
530 /* キャリア周波数誤差取得 */ | |
531 /***************************************************************************/ | |
532 WBLOCK bs_get_carrir = { | |
533 0, | |
534 1, | |
535 {0xBB} | |
536 }; | |
537 /***************************************************************************/ | |
538 /* 周波数設定テーブル */ | |
539 /* BSに関してのみ。とりあえずテーブルとしたが、計算で算出出来るなら */ | |
540 /* 計算で算出させる。 */ | |
541 /***************************************************************************/ | |
542 /***************************************************************************/ | |
543 /* BS共通テーブル */ | |
544 /***************************************************************************/ | |
545 WBLOCK bs_com_step2 = { | |
546 0, | |
547 3, | |
548 {0xFE, 0xC0, 0xE4} | |
549 }; | |
550 /***************************************************************************/ | |
551 /* BS-1 */ | |
552 /***************************************************************************/ | |
553 WBLOCK bs_1_step1 = { | |
554 0, | |
555 6, | |
556 {0xFE, 0xC0, 0x48, 0x29, 0xE0, 0xD2} | |
557 }; | |
558 WBLOCK bs_1_step3 = { | |
559 0, | |
560 4, | |
561 {0xFE, 0xC0, 0xF4, 0xD6} | |
562 }; | |
563 /***************************************************************************/ | |
564 /* BS-3 */ | |
565 /***************************************************************************/ | |
566 WBLOCK bs_3_step1 = { | |
567 0, | |
568 6, | |
569 {0xFE, 0xC0, 0x44, 0x40, 0xE0, 0xE2} | |
570 }; | |
571 WBLOCK bs_3_step3 = { | |
572 0, | |
573 4, | |
574 {0xFE, 0xC0, 0xF4, 0xE6} | |
575 }; | |
576 /***************************************************************************/ | |
577 /* BS-5 */ | |
578 /***************************************************************************/ | |
579 WBLOCK bs_5_step1 = { | |
580 0, | |
581 6, | |
582 {0xFE, 0xC0, 0x44, 0x66, 0xE0, 0xE2} | |
583 }; | |
584 WBLOCK bs_5_step3 = { | |
585 0, | |
586 4, | |
587 {0xFE, 0xC0, 0xF4, 0xE6} | |
588 }; | |
589 /***************************************************************************/ | |
590 /* BS-7 */ | |
591 /***************************************************************************/ | |
592 WBLOCK bs_7_step1 = { | |
593 0, | |
594 6, | |
595 {0xFE, 0xC0, 0x44, 0x8D, 0xE0, 0x20} | |
596 }; | |
597 WBLOCK bs_7_step3 = { | |
598 0, | |
599 4, | |
600 {0xFE, 0xC0, 0xF4, 0x24} | |
601 }; | |
602 /***************************************************************************/ | |
603 /* BS-9 */ | |
604 /***************************************************************************/ | |
605 WBLOCK bs_9_step1 = { | |
606 0, | |
607 6, | |
608 {0xFE, 0xC0, 0x44, 0xB3, 0xE0, 0x20} | |
609 }; | |
610 WBLOCK bs_9_step3 = { | |
611 0, | |
612 4, | |
613 {0xFE, 0xC0, 0xF4, 0x24} | |
614 }; | |
615 /***************************************************************************/ | |
616 /* BS-11 */ | |
617 /***************************************************************************/ | |
618 WBLOCK bs_11_step1 = { | |
619 0, | |
620 6, | |
621 {0xFE, 0xC0, 0x44, 0xD9, 0xE0, 0x20} | |
622 }; | |
623 WBLOCK bs_11_step3 = { | |
624 0, | |
625 4, | |
626 {0xFE, 0xC0, 0xF4, 0x24} | |
627 }; | |
628 /***************************************************************************/ | |
629 /* BS-13 */ | |
630 /***************************************************************************/ | |
631 WBLOCK bs_13_step1 = { | |
632 0, | |
633 6, | |
634 {0xFE, 0xC0, 0x45, 0x00, 0xE0, 0x20} | |
635 }; | |
636 WBLOCK bs_13_step3 = { | |
637 0, | |
638 4, | |
639 {0xFE, 0xC0, 0xF4, 0x24} | |
640 }; | |
641 /***************************************************************************/ | |
642 /* BS-15 */ | |
643 /***************************************************************************/ | |
644 WBLOCK bs_15_step1 = { | |
645 0, | |
646 6, | |
647 {0xFE, 0xC0, 0x45, 0x26, 0xE0, 0x40} | |
648 }; | |
649 WBLOCK bs_15_step3 = { | |
650 0, | |
651 4, | |
652 {0xFE, 0xC0, 0xF4, 0x44} | |
653 }; | |
654 /***************************************************************************/ | |
655 /* BS-17 */ | |
656 /***************************************************************************/ | |
657 WBLOCK bs_17_step1 = { | |
658 0, | |
659 6, | |
660 {0xFE, 0xC0, 0x45, 0x73, 0xE0, 0x40} | |
661 }; | |
662 WBLOCK bs_17_step3 = { | |
663 0, | |
664 4, | |
665 {0xFE, 0xC0, 0xF4, 0X44} | |
666 }; | |
667 /***************************************************************************/ | |
668 /* BS-19 */ | |
669 /***************************************************************************/ | |
670 WBLOCK bs_19_step1 = { | |
671 0, | |
672 6, | |
673 {0xFE, 0xC0, 0x45, 0x73, 0xE0, 0x40} | |
674 }; | |
675 WBLOCK bs_19_step3 = { | |
676 0, | |
677 4, | |
678 {0xFE, 0xC0, 0xF4, 0x44} | |
679 }; | |
680 /***************************************************************************/ | |
681 /* BS-21 */ | |
682 /***************************************************************************/ | |
683 WBLOCK bs_21_step1 = { | |
684 0, | |
685 6, | |
686 {0xFE, 0xC0, 0x45, 0x99, 0xE0, 0x40} | |
687 }; | |
688 WBLOCK bs_21_step3 = { | |
689 0, | |
690 4, | |
691 {0xFE, 0xC0, 0xF4, 0x44} | |
692 }; | |
693 /***************************************************************************/ | |
694 /* BS-23 */ | |
695 /***************************************************************************/ | |
696 WBLOCK bs_23_step1 = { | |
697 0, | |
698 6, | |
699 {0xFE, 0xC0, 0x45, 0xBF, 0xE0, 0x60} | |
700 }; | |
701 WBLOCK bs_23_step3 = { | |
702 0, | |
703 4, | |
704 {0xFE, 0xC0, 0xF4, 0x64} | |
705 }; | |
706 | |
707 /***************************************************************************/ | |
708 /* ND 2 */ | |
709 /***************************************************************************/ | |
710 WBLOCK nd_2_step1 = { | |
711 0, | |
712 6, | |
713 {0xFE, 0xC0, 0x46, 0x4D, 0xE0, 0x60} | |
714 }; | |
715 WBLOCK nd_2_step3 = { | |
716 0, | |
717 4, | |
718 {0xFE, 0xC0, 0xF4, 0x64} | |
719 }; | |
720 | |
721 /***************************************************************************/ | |
722 /* ND 4 */ | |
723 /***************************************************************************/ | |
724 WBLOCK nd_4_step1 = { | |
725 0, | |
726 6, | |
727 {0xFE, 0xC0, 0x46, 0x75, 0xE0, 0x80} | |
728 }; | |
729 WBLOCK nd_4_step3 = { | |
730 0, | |
731 4, | |
732 {0xFE, 0xC0, 0xF4, 0x84} | |
733 }; | |
734 | |
735 /***************************************************************************/ | |
736 /* ND 6 */ | |
737 /***************************************************************************/ | |
738 WBLOCK nd_6_step1 = { | |
739 0, | |
740 6, | |
741 {0xFE, 0xC0, 0x46, 0x9D, 0xE0, 0x80} | |
742 }; | |
743 WBLOCK nd_6_step3 = { | |
744 0, | |
745 4, | |
746 {0xFE, 0xC0, 0xF4, 0x84} | |
747 }; | |
748 | |
749 /***************************************************************************/ | |
750 /* ND 8 */ | |
751 /***************************************************************************/ | |
752 WBLOCK nd_8_step1 = { | |
753 0, | |
754 6, | |
755 {0xFE, 0xC0, 0x46, 0xC5, 0xE0, 0x80} | |
756 }; | |
757 WBLOCK nd_8_step3 = { | |
758 0, | |
759 4, | |
760 {0xFE, 0xC0, 0xF4, 0x84} | |
761 }; | |
762 | |
763 /***************************************************************************/ | |
764 /* ND 10 */ | |
765 /***************************************************************************/ | |
766 WBLOCK nd_10_step1 = { | |
767 0, | |
768 6, | |
769 {0xFE, 0xC0, 0x46, 0xED, 0xE0, 0x80} | |
770 }; | |
771 WBLOCK nd_10_step3 = { | |
772 0, | |
773 4, | |
774 {0xFE, 0xC0, 0xF4, 0x84} | |
775 }; | |
776 | |
777 /***************************************************************************/ | |
778 /* ND 12 */ | |
779 /***************************************************************************/ | |
780 WBLOCK nd_12_step1 = { | |
781 0, | |
782 6, | |
783 {0xFE, 0xC0, 0x47, 0x15, 0xE0, 0xA0} | |
784 }; | |
785 WBLOCK nd_12_step3 = { | |
786 0, | |
787 4, | |
788 {0xFE, 0xC0, 0xF4, 0xA4} | |
789 }; | |
790 | |
791 /***************************************************************************/ | |
792 /* ND 14 */ | |
793 /***************************************************************************/ | |
794 WBLOCK nd_14_step1 = { | |
795 0, | |
796 6, | |
797 {0xFE, 0xC0, 0x47, 0x3D, 0xE0, 0xA0} | |
798 }; | |
799 WBLOCK nd_14_step3 = { | |
800 0, | |
801 4, | |
802 {0xFE, 0xC0, 0xF4, 0xA4} | |
803 }; | |
804 | |
805 /***************************************************************************/ | |
806 /* ND 16 */ | |
807 /***************************************************************************/ | |
808 WBLOCK nd_16_step1 = { | |
809 0, | |
810 6, | |
811 {0xFE, 0xC0, 0x47, 0x65, 0xE0, 0xA0} | |
812 }; | |
813 WBLOCK nd_16_step3 = { | |
814 0, | |
815 4, | |
816 {0xFE, 0xC0, 0xF4, 0xA4} | |
817 }; | |
818 | |
819 /***************************************************************************/ | |
820 /* ND 18 */ | |
821 /***************************************************************************/ | |
822 WBLOCK nd_18_step1 = { | |
823 0, | |
824 6, | |
825 {0xFE, 0xC0, 0x47, 0x8D, 0xE0, 0xA0} | |
826 }; | |
827 WBLOCK nd_18_step3 = { | |
828 0, | |
829 4, | |
830 {0xFE, 0xC0, 0xF4, 0xA4} | |
831 }; | |
832 | |
833 /***************************************************************************/ | |
834 /* ND 20 */ | |
835 /***************************************************************************/ | |
836 WBLOCK nd_20_step1 = { | |
837 0, | |
838 6, | |
839 {0xFE, 0xC0, 0x47, 0xB5, 0xE0, 0xC0} | |
840 }; | |
841 WBLOCK nd_20_step3 = { | |
842 0, | |
843 4, | |
844 {0xFE, 0xC0, 0xF4, 0xC4} | |
845 }; | |
846 | |
847 /***************************************************************************/ | |
848 /* ND 22 */ | |
849 /***************************************************************************/ | |
850 WBLOCK nd_22_step1 = { | |
851 0, | |
852 6, | |
853 {0xFE, 0xC0, 0x47, 0xDD, 0xE0, 0xC0} | |
854 }; | |
855 WBLOCK nd_22_step3 = { | |
856 0, | |
857 4, | |
858 {0xFE, 0xC0, 0xF4, 0xC4} | |
859 }; | |
860 | |
861 /***************************************************************************/ | |
862 /* ND 24 */ | |
863 /***************************************************************************/ | |
864 WBLOCK nd_24_step1 = { | |
865 0, | |
866 6, | |
867 {0xFE, 0xC0, 0x48, 0x05, 0xE0, 0xC0} | |
868 }; | |
869 WBLOCK nd_24_step3 = { | |
870 0, | |
871 4, | |
872 {0xFE, 0xC0, 0xF4, 0xC4} | |
873 }; | |
874 | |
875 /***************************************************************************/ | |
876 /* ND 1 */ | |
877 /***************************************************************************/ | |
878 WBLOCK nd_1_step1 = { | |
879 0, | |
880 6, | |
881 {0xFE, 0xC0, 0x46, 0x39, 0xE0, 0x60} | |
882 }; | |
883 WBLOCK nd_1_step3 = { | |
884 0, | |
885 4, | |
886 {0xFE, 0xC0, 0xF4, 0x64} | |
887 }; | |
888 | |
889 /***************************************************************************/ | |
890 /* ND 3 */ | |
891 /***************************************************************************/ | |
892 WBLOCK nd_3_step1 = { | |
893 0, | |
894 6, | |
895 {0xFE, 0xC0, 0x46, 0x61, 0xE0, 0x80} | |
896 }; | |
897 WBLOCK nd_3_step3 = { | |
898 0, | |
899 4, | |
900 {0xFE, 0xC0, 0xF4, 0x84} | |
901 }; | |
902 | |
903 /***************************************************************************/ | |
904 /* ND 5 */ | |
905 /***************************************************************************/ | |
906 WBLOCK nd_5_step1 = { | |
907 0, | |
908 6, | |
909 {0xFE, 0xC0, 0x46, 0x89, 0xE0, 0x80} | |
910 }; | |
911 WBLOCK nd_5_step3 = { | |
912 0, | |
913 4, | |
914 {0xFE, 0xC0, 0xF4, 0x84} | |
915 }; | |
916 | |
917 /***************************************************************************/ | |
918 /* ND 7 */ | |
919 /***************************************************************************/ | |
920 WBLOCK nd_7_step1 = { | |
921 0, | |
922 6, | |
923 {0xFE, 0xC0, 0x46, 0xB1, 0xE0, 0x80} | |
924 }; | |
925 WBLOCK nd_7_step3 = { | |
926 0, | |
927 4, | |
928 {0xFE, 0xC0, 0xF4, 0x84} | |
929 }; | |
930 | |
931 /***************************************************************************/ | |
932 /* ND 9 */ | |
933 /***************************************************************************/ | |
934 WBLOCK nd_9_step1 = { | |
935 0, | |
936 6, | |
937 {0xFE, 0xC0, 0x46, 0xD9, 0xE0, 0x80} | |
938 }; | |
939 WBLOCK nd_9_step3 = { | |
940 0, | |
941 4, | |
942 {0xFE, 0xC0, 0xF4, 0x84} | |
943 }; | |
944 | |
945 /***************************************************************************/ | |
946 /* ND 11 */ | |
947 /***************************************************************************/ | |
948 WBLOCK nd_11_step1 = { | |
949 0, | |
950 6, | |
951 {0xFE, 0xC0, 0x47, 0x01, 0xE0, 0xA0} | |
952 }; | |
953 WBLOCK nd_11_step3 = { | |
954 0, | |
955 4, | |
956 {0xFE, 0xC0, 0xF4, 0xA4} | |
957 }; | |
958 | |
959 /***************************************************************************/ | |
960 /* ND 13 */ | |
961 /***************************************************************************/ | |
962 WBLOCK nd_13_step1 = { | |
963 0, | |
964 6, | |
965 {0xFE, 0xC0, 0x47, 0x29, 0xE0, 0xA0} | |
966 }; | |
967 WBLOCK nd_13_step3 = { | |
968 0, | |
969 4, | |
970 {0xFE, 0xC0, 0xF4, 0xA4} | |
971 }; | |
972 | |
973 /***************************************************************************/ | |
974 /* ND 15 */ | |
975 /***************************************************************************/ | |
976 WBLOCK nd_15_step1 = { | |
977 0, | |
978 6, | |
979 {0xFE, 0xC0, 0x47, 0x51, 0xE0, 0xA0} | |
980 }; | |
981 WBLOCK nd_15_step3 = { | |
982 0, | |
983 4, | |
984 {0xFE, 0xC0, 0xF4, 0xA4} | |
985 }; | |
986 | |
987 /***************************************************************************/ | |
988 /* ND 17 */ | |
989 /***************************************************************************/ | |
990 WBLOCK nd_17_step1 = { | |
991 0, | |
992 6, | |
993 {0xFE, 0xC0, 0x47, 0x79, 0xE0, 0xA0} | |
994 }; | |
995 WBLOCK nd_17_step3 = { | |
996 0, | |
997 4, | |
998 {0xFE, 0xC0, 0xF4, 0xA4} | |
999 }; | |
1000 | |
1001 /***************************************************************************/ | |
1002 /* ND 19 */ | |
1003 /***************************************************************************/ | |
1004 WBLOCK nd_19_step1 = { | |
1005 0, | |
1006 6, | |
1007 {0xFE, 0xC0, 0x47, 0xA1, 0xE0, 0xA0} | |
1008 }; | |
1009 WBLOCK nd_19_step3 = { | |
1010 0, | |
1011 4, | |
1012 {0xFE, 0xC0, 0xF4, 0xA4} | |
1013 }; | |
1014 | |
1015 /***************************************************************************/ | |
1016 /* ND 21 */ | |
1017 /***************************************************************************/ | |
1018 WBLOCK nd_21_step1 = { | |
1019 0, | |
1020 6, | |
1021 {0xFE, 0xC0, 0x47, 0xC9, 0xE0, 0xC0} | |
1022 }; | |
1023 WBLOCK nd_21_step3 = { | |
1024 0, | |
1025 4, | |
1026 {0xFE, 0xC0, 0xF4, 0xC4} | |
1027 }; | |
1028 | |
1029 /***************************************************************************/ | |
1030 /* ND 23 */ | |
1031 /***************************************************************************/ | |
1032 WBLOCK nd_23_step1 = { | |
1033 0, | |
1034 6, | |
1035 {0xFE, 0xC0, 0x47, 0xF1, 0xE0, 0xC0} | |
1036 }; | |
1037 WBLOCK nd_23_step3 = { | |
1038 0, | |
1039 4, | |
1040 {0xFE, 0xC0, 0xF4, 0xC4} | |
1041 }; | |
1042 | |
1043 /***************************************************************************/ | |
1044 /* BS-周波数テーブル */ | |
1045 /***************************************************************************/ | |
1046 WBLOCK_BS_PLL bs_pll[MAX_BS_CHANNEL] = { | |
36 | 1047 {{&bs_1_step1, &bs_com_step2, &bs_1_step3}}, |
1048 {{&bs_3_step1, &bs_com_step2, &bs_3_step3}}, | |
1049 {{&bs_5_step1, &bs_com_step2, &bs_5_step3}}, | |
1050 {{&bs_7_step1, &bs_com_step2, &bs_7_step3}}, | |
1051 {{&bs_9_step1, &bs_com_step2, &bs_9_step3}}, | |
1052 {{&bs_11_step1, &bs_com_step2, &bs_11_step3}}, | |
1053 {{&bs_13_step1, &bs_com_step2, &bs_13_step3}}, | |
1054 {{&bs_15_step1, &bs_com_step2, &bs_15_step3}}, | |
1055 {{&bs_17_step1, &bs_com_step2, &bs_17_step3}}, | |
1056 {{&bs_19_step1, &bs_com_step2, &bs_19_step3}}, | |
1057 {{&bs_21_step1, &bs_com_step2, &bs_21_step3}}, | |
1058 {{&bs_23_step1, &bs_com_step2, &bs_21_step3}}, | |
1059 {{&nd_2_step1, &bs_com_step2, &nd_2_step3}}, | |
1060 {{&nd_4_step1, &bs_com_step2, &nd_4_step3}}, | |
1061 {{&nd_6_step1, &bs_com_step2, &nd_6_step3}}, | |
1062 {{&nd_8_step1, &bs_com_step2, &nd_8_step3}}, | |
1063 {{&nd_10_step1, &bs_com_step2, &nd_10_step3}}, | |
1064 {{&nd_12_step1, &bs_com_step2, &nd_12_step3}}, | |
1065 {{&nd_14_step1, &bs_com_step2, &nd_14_step3}}, | |
1066 {{&nd_16_step1, &bs_com_step2, &nd_16_step3}}, | |
1067 {{&nd_18_step1, &bs_com_step2, &nd_18_step3}}, | |
1068 {{&nd_20_step1, &bs_com_step2, &nd_20_step3}}, | |
1069 {{&nd_22_step1, &bs_com_step2, &nd_22_step3}}, | |
1070 {{&nd_24_step1, &bs_com_step2, &nd_24_step3}}, | |
1071 {{&nd_1_step1, &bs_com_step2, &nd_1_step3}}, | |
1072 {{&nd_3_step1, &bs_com_step2, &nd_3_step3}}, | |
1073 {{&nd_5_step1, &bs_com_step2, &nd_5_step3}}, | |
1074 {{&nd_7_step1, &bs_com_step2, &nd_7_step3}}, | |
1075 {{&nd_9_step1, &bs_com_step2, &nd_9_step3}}, | |
1076 {{&nd_11_step1, &bs_com_step2, &nd_11_step3}}, | |
1077 {{&nd_13_step1, &bs_com_step2, &nd_13_step3}}, | |
1078 {{&nd_15_step1, &bs_com_step2, &nd_15_step3}}, | |
1079 {{&nd_17_step1, &bs_com_step2, &nd_17_step3}}, | |
1080 {{&nd_19_step1, &bs_com_step2, &nd_19_step3}}, | |
1081 {{&nd_21_step1, &bs_com_step2, &nd_21_step3}}, | |
1082 {{&nd_23_step1, &bs_com_step2, &nd_23_step3}} | |
0 | 1083 }; |
1084 WBLOCK *bs_get_ts_id[(MAX_BS_TS_ID / 2)] = { | |
1085 &bs_get_slot_ts_id_1, | |
1086 &bs_get_slot_ts_id_2, | |
1087 &bs_get_slot_ts_id_3, | |
1088 &bs_get_slot_ts_id_4 | |
1089 }; |