Mercurial > pt1.oyama
annotate driver/pt1_pci.c @ 40:8f30a05cded2
imported patch dmactlalloc
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Tue, 28 Apr 2009 17:16:48 +0900 |
parents | c359e7adf700 |
children | 51a006a8d843 |
rev | line source |
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0 | 1 /* pt1-pci.c: A PT1 on PCI bus driver for Linux. */ |
2 #define DRV_NAME "pt1-pci" | |
3 #define DRV_VERSION "1.00" | |
4 #define DRV_RELDATE "11/28/2008" | |
5 | |
6 | |
7 #include <linux/module.h> | |
8 #include <linux/kernel.h> | |
9 #include <linux/errno.h> | |
10 #include <linux/pci.h> | |
11 #include <linux/init.h> | |
12 #include <linux/interrupt.h> | |
13 | |
14 #include <asm/system.h> | |
15 #include <asm/io.h> | |
16 #include <asm/irq.h> | |
17 #include <asm/uaccess.h> | |
18 #include <linux/version.h> | |
19 #include <linux/mutex.h> | |
36 | 20 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23) |
0 | 21 #include <linux/freezer.h> |
22 #else | |
23 #define set_freezable() | |
36 | 24 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) |
0 | 25 typedef struct pm_message { |
26 int event; | |
27 } pm_message_t; | |
28 #endif | |
29 #endif | |
30 #include <linux/kthread.h> | |
31 #include <linux/dma-mapping.h> | |
32 | |
33 #include <linux/fs.h> | |
34 #include <linux/cdev.h> | |
35 | |
36 #include <linux/ioctl.h> | |
37 | |
38 #include "pt1_com.h" | |
39 #include "pt1_pci.h" | |
40 #include "pt1_tuner.h" | |
41 #include "pt1_i2c.h" | |
42 #include "pt1_tuner_data.h" | |
43 #include "pt1_ioctl.h" | |
44 | |
45 /* These identify the driver base version and may not be removed. */ | |
46 static char version[] __devinitdata = | |
47 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " \n"; | |
48 | |
49 MODULE_AUTHOR("Tomoaki Ishikawa tomy@users.sourceforge.jp"); | |
50 #define DRIVER_DESC "PCI earthsoft PT1 driver" | |
51 MODULE_DESCRIPTION(DRIVER_DESC); | |
52 MODULE_LICENSE("GPL"); | |
53 | |
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54 static int debug = 7; /* 1 normal messages, 0 quiet .. 7 verbose. */ |
0 | 55 static int lnb = 0; /* LNB OFF:0 +11V:1 +15V:2 */ |
56 | |
57 module_param(debug, int, 0); | |
58 module_param(lnb, int, 0); | |
59 MODULE_PARM_DESC(debug, "debug level (1-2)"); | |
60 MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)"); | |
61 | |
62 static struct pci_device_id pt1_pci_tbl[] = { | |
63 { 0x10ee, 0x211a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | |
64 { 0, } | |
65 }; | |
66 MODULE_DEVICE_TABLE(pci, pt1_pci_tbl); | |
67 #define DEV_NAME "pt1video" | |
68 | |
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69 #define PACKET_SIZE 188 // 1パケット長 |
0 | 70 #define MAX_READ_BLOCK 4 // 1度に読み出す最大DMAバッファ数 |
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71 #define MAX_PCI_DEVICE 128 // 最大64枚 |
0 | 72 #define DMA_SIZE 4096 // DMAバッファサイズ |
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73 #define DMA_RING_SIZE 128 // RINGサイズ |
0 | 74 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで) |
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75 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22) |
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76 #define CHANEL_DMA_SIZE (2*1024*1024) // 地デジ用(16Mbps) |
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77 #define BS_CHANEL_DMA_SIZE (4*1024*1024) // BS用(32Mbps) |
0 | 78 #else |
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79 #define CHANEL_DMA_SIZE (1*128*1024) // 地デジ用(1Mbps) |
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80 #define BS_CHANEL_DMA_SIZE (1*128*1024) // BS用(1Mbps) |
0 | 81 #endif |
82 | |
83 typedef struct _DMA_CONTROL{ | |
84 dma_addr_t ring_dma[DMA_RING_MAX] ; // DMA情報 | |
85 __u32 *data[DMA_RING_MAX]; | |
86 }DMA_CONTROL; | |
87 | |
88 typedef struct _PT1_CHANNEL PT1_CHANNEL; | |
89 | |
90 typedef struct _pt1_device{ | |
91 unsigned long mmio_start ; | |
92 __u32 mmio_len ; | |
93 void __iomem *regs; | |
94 struct mutex lock ; | |
95 dma_addr_t ring_dma[DMA_RING_SIZE] ; // DMA情報 | |
96 void *dmaptr[DMA_RING_SIZE] ; | |
97 struct task_struct *kthread; | |
98 dev_t dev ; | |
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99 int card_number; |
0 | 100 __u32 base_minor ; |
101 struct cdev cdev[MAX_CHANNEL]; | |
102 wait_queue_head_t dma_wait_q ;// for poll on reading | |
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103 DMA_CONTROL *dmactl[DMA_RING_SIZE]; |
0 | 104 PT1_CHANNEL *channel[MAX_CHANNEL]; |
105 }PT1_DEVICE; | |
106 | |
107 typedef struct _MICRO_PACKET{ | |
108 char data[3]; | |
109 char head ; | |
110 }MICRO_PACKET; | |
111 | |
112 struct _PT1_CHANNEL{ | |
113 __u32 valid ; // 使用中フラグ | |
114 __u32 address ; // I2Cアドレス | |
115 __u32 channel ; // チャネル番号 | |
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116 int type ; // チャネルタイプ |
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117 __u32 packet_size ; // パケットサイズ |
0 | 118 __u32 drop ; // パケットドロップ数 |
119 struct mutex lock ; // CH別mutex_lock用 | |
120 __u32 size ; // DMAされたサイズ | |
121 __u32 maxsize ; // DMA用バッファサイズ | |
122 __u32 bufsize ; // チャネルに割り振られたサイズ | |
123 __u32 overflow ; // オーバーフローエラー発生 | |
124 __u32 counetererr ; // 転送カウンタ1エラー | |
125 __u32 transerr ; // 転送エラー | |
126 __u32 minor ; // マイナー番号 | |
127 __u8 *buf; // CH別受信メモリ | |
128 __u8 req_dma ; // 溢れたチャネル | |
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129 __u8 packet_buf[PACKET_SIZE] ; // 溢れたチャネル |
0 | 130 PT1_DEVICE *ptr ; // カード別情報 |
131 wait_queue_head_t wait_q ; // for poll on reading | |
132 }; | |
133 | |
134 // I2Cアドレス(video0, 1 = ISDB-S) (video2, 3 = ISDB-T) | |
135 int i2c_address[MAX_CHANNEL] = {T0_ISDB_S, T1_ISDB_S, T0_ISDB_T, T1_ISDB_T}; | |
136 int real_chanel[MAX_CHANNEL] = {0, 2, 1, 3}; | |
137 int channeltype[MAX_CHANNEL] = {CHANNEL_TYPE_ISDB_S, CHANNEL_TYPE_ISDB_S, | |
138 CHANNEL_TYPE_ISDB_T, CHANNEL_TYPE_ISDB_T}; | |
139 | |
140 static PT1_DEVICE *device[MAX_PCI_DEVICE]; | |
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141 static struct class *pt1video_class; |
0 | 142 |
143 #define PT1MAJOR 251 | |
144 #define DRIVERNAME "pt1video" | |
145 | |
146 static void reset_dma(PT1_DEVICE *dev_conf) | |
147 { | |
148 | |
149 int lp ; | |
150 __u32 addr ; | |
151 int ring_pos = 0; | |
152 int data_pos = 0 ; | |
153 __u32 *dataptr ; | |
154 | |
155 // データ初期化 | |
156 for(ring_pos = 0 ; ring_pos < DMA_RING_SIZE ; ring_pos++){ | |
157 for(data_pos = 0 ; data_pos < DMA_RING_MAX ; data_pos++){ | |
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158 dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos]; |
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159 dataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; |
0 | 160 } |
161 } | |
162 // 転送カウンタをリセット | |
163 writel(0x00000010, dev_conf->regs); | |
164 // 転送カウンタをインクリメント | |
165 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
166 writel(0x00000020, dev_conf->regs); | |
167 } | |
168 | |
169 addr = (int)dev_conf->ring_dma[0] ; | |
170 addr >>= 12 ; | |
171 // DMAバッファ設定 | |
172 writel(addr, dev_conf->regs + DMA_ADDR); | |
173 // DMA開始 | |
174 writel(0x0c000040, dev_conf->regs); | |
175 | |
176 } | |
177 static int pt1_thread(void *data) | |
178 { | |
179 PT1_DEVICE *dev_conf = data ; | |
180 PT1_CHANNEL *channel ; | |
181 int ring_pos = 0; | |
182 int data_pos = 0 ; | |
183 int lp ; | |
184 int chno ; | |
185 int lp2 ; | |
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186 int dma_channel ; |
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187 int packet_pos ; |
0 | 188 __u32 *dataptr ; |
189 __u32 *curdataptr ; | |
190 __u32 val ; | |
191 union mpacket{ | |
192 __u32 val ; | |
193 MICRO_PACKET packet ; | |
194 }micro; | |
195 | |
196 set_freezable(); | |
197 reset_dma(dev_conf); | |
198 printk(KERN_INFO "pt1_thread run\n"); | |
199 | |
200 for(;;){ | |
201 if(kthread_should_stop()){ | |
202 break ; | |
203 } | |
204 | |
205 for(;;){ | |
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206 dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos]; |
0 | 207 // データあり? |
208 if(dataptr[(DMA_SIZE / sizeof(__u32)) - 2] == 0){ | |
209 break ; | |
210 } | |
211 micro.val = *dataptr ; | |
212 curdataptr = dataptr ; | |
213 data_pos += 1 ; | |
214 for(lp = 0 ; lp < (DMA_SIZE / sizeof(__u32)) ; lp++, dataptr++){ | |
215 micro.val = *dataptr ; | |
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216 dma_channel = ((micro.packet.head >> 5) & 0x07); |
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217 //チャネル情報不正 |
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218 if(dma_channel > MAX_CHANNEL){ |
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219 printk(KERN_ERR "DMA Channel Number Error(%d)\n", dma_channel); |
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220 continue ; |
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221 } |
0 | 222 chno = real_chanel[(((micro.packet.head >> 5) & 0x07) - 1)]; |
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223 packet_pos = ((micro.packet.head >> 2) & 0x07); |
0 | 224 channel = dev_conf->channel[chno] ; |
225 // エラーチェック | |
226 if((micro.packet.head & MICROPACKET_ERROR)){ | |
227 val = readl(dev_conf->regs); | |
228 if((val & BIT_RAM_OVERFLOW)){ | |
229 channel->overflow += 1 ; | |
230 } | |
231 if((val & BIT_INITIATOR_ERROR)){ | |
232 channel->counetererr += 1 ; | |
233 } | |
234 if((val & BIT_INITIATOR_WARNING)){ | |
235 channel->transerr += 1 ; | |
236 } | |
237 // 初期化して先頭から | |
238 reset_dma(dev_conf); | |
239 ring_pos = data_pos = 0 ; | |
240 break ; | |
241 } | |
242 // 未使用チャネルは捨てる | |
243 if(channel->valid == FALSE){ | |
244 continue ; | |
245 } | |
246 mutex_lock(&channel->lock); | |
247 // あふれたら読み出すまで待つ | |
248 while(1){ | |
249 if(channel->size >= (channel->maxsize - 4)){ | |
250 // 該当チャンネルのDMA読みだし待ちにする | |
251 wake_up(&channel->wait_q); | |
252 channel->req_dma = TRUE ; | |
253 mutex_unlock(&channel->lock); | |
254 // タスクに時間を渡す為中断 | |
255 wait_event_timeout(dev_conf->dma_wait_q, (channel->req_dma == FALSE), | |
256 msecs_to_jiffies(500)); | |
257 mutex_lock(&channel->lock); | |
258 channel->drop += 1 ; | |
259 }else{ | |
260 break ; | |
261 } | |
262 } | |
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263 // 先頭で、一時バッファに残っている場合 |
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264 if((micro.packet.head & 0x02) && (channel->packet_size != 0)){ |
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265 channel->packet_size = 0 ; |
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266 } |
0 | 267 // データコピー |
268 for(lp2 = 2 ; lp2 >= 0 ; lp2--){ | |
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269 channel->packet_buf[channel->packet_size] = micro.packet.data[lp2] ; |
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270 channel->packet_size += 1 ; |
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271 } |
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272 |
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273 // パケットが出来たらコピーする |
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274 if(channel->packet_size >= PACKET_SIZE){ |
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275 memcpy(&channel->buf[channel->size], |
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276 channel->packet_buf, PACKET_SIZE); |
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277 channel->size += PACKET_SIZE ; |
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278 channel->packet_size = 0 ; |
0 | 279 } |
280 mutex_unlock(&channel->lock); | |
281 } | |
282 curdataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; | |
283 | |
284 if(data_pos >= DMA_RING_MAX){ | |
285 data_pos = 0; | |
286 ring_pos += 1 ; | |
287 // DMAリングが変わった場合はインクリメント | |
288 writel(0x00000020, dev_conf->regs); | |
289 if(ring_pos >= DMA_RING_SIZE){ | |
290 ring_pos = 0 ; | |
291 } | |
292 } | |
293 | |
294 // 頻度を落す(4Kで起動させる) | |
295 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
296 channel = dev_conf->channel[real_chanel[lp]] ; | |
297 if((channel->size >= DMA_SIZE) && (channel->valid == TRUE)){ | |
298 wake_up(&channel->wait_q); | |
299 } | |
300 } | |
301 } | |
302 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
303 } | |
304 return 0 ; | |
305 } | |
306 static int pt1_open(struct inode *inode, struct file *file) | |
307 { | |
308 | |
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309 int major = imajor(inode); |
0 | 310 int minor = iminor(inode); |
311 int lp ; | |
312 int lp2 ; | |
313 PT1_CHANNEL *channel ; | |
314 | |
315 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
316 if(device[lp] == NULL){ | |
317 return -EIO ; | |
318 } | |
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319 |
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320 if(MAJOR(device[lp]->dev) == major && |
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321 device[lp]->base_minor <= minor && |
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322 device[lp]->base_minor + MAX_CHANNEL > minor) { |
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323 |
0 | 324 mutex_lock(&device[lp]->lock); |
325 for(lp2 = 0 ; lp2 < MAX_CHANNEL ; lp2++){ | |
326 channel = device[lp]->channel[lp2] ; | |
327 if(channel->minor == minor){ | |
328 if(channel->valid == TRUE){ | |
329 mutex_unlock(&device[lp]->lock); | |
330 return -EIO ; | |
331 } | |
332 channel->drop = 0 ; | |
333 channel->valid = TRUE ; | |
334 channel->overflow = 0 ; | |
335 channel->counetererr = 0 ; | |
336 channel->transerr = 0 ; | |
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337 channel->packet_size = 0 ; |
0 | 338 file->private_data = channel; |
339 mutex_lock(&channel->lock); | |
340 // データ初期化 | |
341 channel->size = 0 ; | |
342 mutex_unlock(&channel->lock); | |
343 mutex_unlock(&device[lp]->lock); | |
344 return 0 ; | |
345 } | |
346 } | |
347 } | |
348 } | |
349 return -EIO; | |
350 } | |
351 static int pt1_release(struct inode *inode, struct file *file) | |
352 { | |
353 PT1_CHANNEL *channel = file->private_data; | |
354 | |
355 mutex_lock(&channel->ptr->lock); | |
356 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
357 channel->valid = FALSE ; | |
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358 printk(KERN_INFO "(%d:%d)Drop=%08d:%08d:%08d:%08d\n", imajor(inode), iminor(inode), channel->drop, |
0 | 359 channel->overflow, channel->counetererr, channel->transerr); |
360 channel->overflow = 0 ; | |
361 channel->counetererr = 0 ; | |
362 channel->transerr = 0 ; | |
363 channel->drop = 0 ; | |
364 // 停止している場合は起こす | |
365 if(channel->req_dma == TRUE){ | |
366 channel->req_dma = FALSE ; | |
367 wake_up(&channel->ptr->dma_wait_q); | |
368 } | |
369 mutex_unlock(&channel->ptr->lock); | |
370 return 0; | |
371 } | |
372 | |
373 static ssize_t pt1_read(struct file *file, char __user *buf, size_t cnt, loff_t * ppos) | |
374 { | |
375 PT1_CHANNEL *channel = file->private_data; | |
376 __u32 size ; | |
36 | 377 unsigned long dummy; |
0 | 378 |
379 // 4K単位で起こされるのを待つ(CPU負荷対策) | |
380 if(channel->size < DMA_SIZE){ | |
381 wait_event_timeout(channel->wait_q, (channel->size >= DMA_SIZE), | |
382 msecs_to_jiffies(500)); | |
383 } | |
384 mutex_lock(&channel->lock); | |
385 if(!channel->size){ | |
386 size = 0 ; | |
387 }else{ | |
388 if(cnt < channel->size){ | |
389 // バッファが足りない場合は残りを移動する | |
390 size = cnt ; | |
36 | 391 dummy = copy_to_user(buf, channel->buf, cnt); |
0 | 392 memmove(channel->buf, &channel->buf[cnt], (channel->size - cnt)); |
393 channel->size -= cnt ; | |
394 }else{ | |
395 size = channel->size ; | |
36 | 396 dummy = copy_to_user(buf, channel->buf, size); |
0 | 397 channel->size = 0 ; |
398 } | |
399 } | |
400 // 読み終わったかつ使用しているのがが4K以下 | |
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diff
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401 if(channel->req_dma == TRUE){ |
0 | 402 channel->req_dma = FALSE ; |
403 wake_up(&channel->ptr->dma_wait_q); | |
404 } | |
405 mutex_unlock(&channel->lock); | |
406 return size ; | |
407 } | |
408 static int SetFreq(PT1_CHANNEL *channel, FREQUENCY *freq) | |
409 { | |
410 | |
411 switch(channel->type){ | |
412 case CHANNEL_TYPE_ISDB_S: | |
413 { | |
414 ISDB_S_TMCC tmcc ; | |
415 if(bs_tune(channel->ptr->regs, | |
416 &channel->ptr->lock, | |
417 channel->address, | |
418 freq->frequencyno, | |
419 &tmcc) < 0){ | |
420 return -EIO ; | |
421 } | |
422 | |
423 #if 0 | |
424 printk(KERN_INFO "clockmargin = (%x)\n", (tmcc.clockmargin & 0xFF)); | |
425 printk(KERN_INFO "carriermargin = (%x)\n", (tmcc.carriermargin & 0xFF)); | |
426 | |
427 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++){ | |
428 if(tmcc.ts_id[lp].ts_id == 0xFFFF){ | |
429 continue ; | |
430 } | |
431 printk(KERN_INFO "Slot(%d:%x)\n", lp, tmcc.ts_id[lp].ts_id); | |
432 printk(KERN_INFO "mode (low/high) = (%x:%x)\n", | |
433 tmcc.ts_id[lp].low_mode, tmcc.ts_id[lp].high_mode); | |
434 printk(KERN_INFO "slot (low/high) = (%x:%x)\n", | |
435 tmcc.ts_id[lp].low_slot, | |
436 tmcc.ts_id[lp].high_slot); | |
437 } | |
438 #endif | |
439 ts_lock(channel->ptr->regs, | |
440 &channel->ptr->lock, | |
441 channel->address, | |
442 tmcc.ts_id[freq->slot].ts_id); | |
443 } | |
444 break ; | |
445 case CHANNEL_TYPE_ISDB_T: | |
446 { | |
447 if(isdb_t_frequency(channel->ptr->regs, | |
448 &channel->ptr->lock, | |
449 channel->address, | |
450 freq->frequencyno, freq->slot) < 0){ | |
451 return -EINVAL ; | |
452 } | |
453 } | |
454 } | |
455 return 0 ; | |
456 } | |
36 | 457 static int pt1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg0) |
0 | 458 { |
459 PT1_CHANNEL *channel = file->private_data; | |
36 | 460 int signal ; |
461 unsigned long dummy; | |
462 void *arg = (void *)arg0; | |
0 | 463 |
464 switch(cmd){ | |
465 case SET_CHANNEL: | |
466 { | |
467 FREQUENCY freq ; | |
36 | 468 dummy = copy_from_user(&freq, arg, sizeof(FREQUENCY)); |
0 | 469 return SetFreq(channel, &freq); |
470 } | |
471 case START_REC: | |
472 SetStream(channel->ptr->regs, channel->channel, TRUE); | |
473 return 0 ; | |
474 case STOP_REC: | |
475 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
476 return 0 ; | |
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477 case GET_SIGNAL_STRENGTH: |
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478 switch(channel->type){ |
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479 case CHANNEL_TYPE_ISDB_S: |
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480 { |
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481 signal = isdb_s_read_signal_strength(channel->ptr->regs, |
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482 &channel->ptr->lock, |
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483 channel->address); |
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484 } |
07b2fc07ff48
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|
485 break ; |
07b2fc07ff48
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diff
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|
486 case CHANNEL_TYPE_ISDB_T: |
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diff
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487 // calc C/N |
36 | 488 signal = isdb_t_read_signal_strength(channel->ptr->regs, |
9
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489 &channel->ptr->lock, channel->address); |
07b2fc07ff48
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490 break ; |
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491 } |
36 | 492 dummy = copy_to_user(arg, &signal, sizeof(int)); |
9
07b2fc07ff48
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493 return 0 ; |
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494 case LNB_ENABLE: |
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|
495 if(lnb){ |
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496 settuner_reset(channel->ptr->regs, lnb, TUNER_POWER_ON_RESET_DISABLE); |
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497 } |
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498 return 0 ; |
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499 case LNB_DISABLE: |
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500 if(lnb){ |
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501 settuner_reset(channel->ptr->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
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502 } |
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503 return 0 ; |
0 | 504 } |
505 return -EINVAL; | |
506 } | |
507 | |
508 /* | |
509 */ | |
510 static const struct file_operations pt1_fops = { | |
511 .owner = THIS_MODULE, | |
512 .open = pt1_open, | |
513 .release = pt1_release, | |
514 .read = pt1_read, | |
515 .ioctl = pt1_ioctl, | |
516 .llseek = no_llseek, | |
517 }; | |
518 | |
519 int pt1_makering(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
520 { | |
521 int lp ; | |
522 int lp2 ; | |
523 DMA_CONTROL *dmactl; | |
524 __u32 *dmaptr ; | |
525 __u32 addr ; | |
526 __u32 *ptr ; | |
527 | |
528 //DMAリング作成 | |
529 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
530 ptr = dev_conf->dmaptr[lp]; | |
531 if(lp == (DMA_RING_SIZE - 1)){ | |
532 addr = (__u32)dev_conf->ring_dma[0]; | |
533 }else{ | |
534 addr = (__u32)dev_conf->ring_dma[(lp + 1)]; | |
535 } | |
536 addr >>= 12 ; | |
537 memcpy(ptr, &addr, sizeof(__u32)); | |
538 ptr += 1 ; | |
539 | |
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diff
changeset
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540 dmactl = dev_conf->dmactl[lp]; |
0 | 541 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ |
542 dmaptr = pci_alloc_consistent(pdev, DMA_SIZE, &dmactl->ring_dma[lp2]); | |
543 if(dmaptr == NULL){ | |
544 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
545 return -1 ; | |
546 } | |
547 dmactl->data[lp2] = dmaptr ; | |
548 // DMAデータエリア初期化 | |
549 dmaptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0 ; | |
550 addr = (__u32)dmactl->ring_dma[lp2]; | |
551 addr >>= 12 ; | |
552 memcpy(ptr, &addr, sizeof(__u32)); | |
553 ptr += 1 ; | |
554 } | |
555 } | |
556 return 0 ; | |
557 } | |
558 int pt1_dma_init(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
559 { | |
560 int lp ; | |
561 void *ptr ; | |
562 | |
563 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
564 ptr = pci_alloc_consistent(pdev, DMA_SIZE, &dev_conf->ring_dma[lp]); | |
565 if(ptr == NULL){ | |
566 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
567 return -1 ; | |
568 } | |
569 dev_conf->dmaptr[lp] = ptr ; | |
570 } | |
571 | |
572 return pt1_makering(pdev, dev_conf); | |
573 } | |
574 int pt1_dma_free(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
575 { | |
576 | |
577 int lp ; | |
578 int lp2 ; | |
579 | |
580 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
581 if(dev_conf->dmaptr[lp] != NULL){ | |
582 pci_free_consistent(pdev, DMA_SIZE, | |
583 dev_conf->dmaptr[lp], dev_conf->ring_dma[lp]); | |
584 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ | |
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8f30a05cded2
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parents:
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diff
changeset
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585 if((dev_conf->dmactl[lp])->data[lp2] != NULL){ |
0 | 586 pci_free_consistent(pdev, DMA_SIZE, |
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diff
changeset
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587 (dev_conf->dmactl[lp])->data[lp2], |
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diff
changeset
|
588 (dev_conf->dmactl[lp])->ring_dma[lp2]); |
0 | 589 } |
590 } | |
591 } | |
592 } | |
593 return 0 ; | |
594 } | |
595 static int __devinit pt1_pci_init_one (struct pci_dev *pdev, | |
596 const struct pci_device_id *ent) | |
597 { | |
598 int rc ; | |
599 int lp ; | |
600 int minor ; | |
601 u16 cmd ; | |
602 PT1_DEVICE *dev_conf ; | |
603 PT1_CHANNEL *channel ; | |
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diff
changeset
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604 int i; |
36 | 605 struct resource *dummy; |
0 | 606 |
607 rc = pci_enable_device(pdev); | |
608 if (rc) | |
609 return rc; | |
610 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
611 if (rc) { | |
612 printk(KERN_ERR "PT1:DMA MASK ERROR"); | |
613 return rc; | |
614 } | |
615 | |
616 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
617 if (!(cmd & PCI_COMMAND_MASTER)) { | |
618 printk(KERN_INFO "Attempting to enable Bus Mastering\n"); | |
619 pci_set_master(pdev); | |
620 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
621 if (!(cmd & PCI_COMMAND_MASTER)) { | |
622 printk(KERN_ERR "Bus Mastering is not enabled\n"); | |
623 return -EIO; | |
624 } | |
625 } | |
626 printk(KERN_INFO "Bus Mastering Enabled.\n"); | |
627 | |
628 dev_conf = kzalloc(sizeof(PT1_DEVICE), GFP_KERNEL); | |
629 if(!dev_conf){ | |
630 printk(KERN_ERR "PT1:out of memory !"); | |
631 return -ENOMEM ; | |
632 } | |
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8f30a05cded2
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parents:
37
diff
changeset
|
633 for (i = 0; i < DMA_RING_SIZE; i++) { |
8f30a05cded2
imported patch dmactlalloc
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parents:
37
diff
changeset
|
634 dev_conf->dmactl[i] = kzalloc(sizeof(DMA_CONTROL), GFP_KERNEL); |
8f30a05cded2
imported patch dmactlalloc
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parents:
37
diff
changeset
|
635 if(!dev_conf->dmactl[i]){ |
8f30a05cded2
imported patch dmactlalloc
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parents:
37
diff
changeset
|
636 int j; |
8f30a05cded2
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parents:
37
diff
changeset
|
637 for (j = 0; j < i; j++) { |
8f30a05cded2
imported patch dmactlalloc
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parents:
37
diff
changeset
|
638 kfree(dev_conf->dmactl[j]); |
8f30a05cded2
imported patch dmactlalloc
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parents:
37
diff
changeset
|
639 } |
8f30a05cded2
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37
diff
changeset
|
640 kfree(dev_conf); |
8f30a05cded2
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parents:
37
diff
changeset
|
641 printk(KERN_ERR "PT1:out of memory !"); |
8f30a05cded2
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parents:
37
diff
changeset
|
642 return -ENOMEM ; |
8f30a05cded2
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diff
changeset
|
643 } |
8f30a05cded2
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diff
changeset
|
644 } |
0 | 645 // PCIアドレスをマップする |
646 dev_conf->mmio_start = pci_resource_start(pdev, 0); | |
647 dev_conf->mmio_len = pci_resource_len(pdev, 0); | |
36 | 648 dummy = request_mem_region(dev_conf->mmio_start, dev_conf->mmio_len, DEV_NAME); |
649 if (!dummy) { | |
0 | 650 printk(KERN_ERR "PT1: cannot request iomem (0x%llx).\n", (unsigned long long) dev_conf->mmio_start); |
651 goto out_err_regbase; | |
652 } | |
653 | |
654 dev_conf->regs = ioremap(dev_conf->mmio_start, dev_conf->mmio_len); | |
655 if (!dev_conf->regs){ | |
656 printk(KERN_ERR "pt1: Can't remap register area.\n"); | |
657 goto out_err_regbase; | |
658 } | |
659 // 初期化処理 | |
660 if(xc3s_init(dev_conf->regs)){ | |
661 printk(KERN_ERR "Error xc3s_init\n"); | |
662 goto out_err_fpga; | |
663 } | |
664 // チューナリセット | |
665 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE); | |
666 schedule_timeout_interruptible(msecs_to_jiffies(50)); | |
667 | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
668 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
0 | 669 schedule_timeout_interruptible(msecs_to_jiffies(10)); |
670 mutex_init(&dev_conf->lock); | |
671 | |
672 // Tuner 初期化処理 | |
673 for(lp = 0 ; lp < MAX_TUNER ; lp++){ | |
674 rc = tuner_init(dev_conf->regs, &dev_conf->lock, lp); | |
675 if(rc < 0){ | |
676 printk(KERN_ERR "Error tuner_init\n"); | |
677 goto out_err_fpga; | |
678 } | |
679 } | |
680 // 初期化完了 | |
681 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
36 | 682 set_sleepmode(dev_conf->regs, &dev_conf->lock, |
0 | 683 i2c_address[lp], channeltype[lp], TYPE_SLEEP); |
36 | 684 |
0 | 685 schedule_timeout_interruptible(msecs_to_jiffies(50)); |
686 } | |
687 rc = alloc_chrdev_region(&dev_conf->dev, 0, MAX_CHANNEL, DEV_NAME); | |
688 if(rc < 0){ | |
689 goto out_err_fpga; | |
690 } | |
691 | |
692 // 初期化 | |
693 init_waitqueue_head(&dev_conf->dma_wait_q); | |
694 | |
695 minor = MINOR(dev_conf->dev) ; | |
696 dev_conf->base_minor = minor ; | |
697 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
31
289794dc265f
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
30
diff
changeset
|
698 printk(KERN_INFO "PT1: device[%d]=%p\n", lp, device[lp]); |
0 | 699 if(device[lp] == NULL){ |
700 device[lp] = dev_conf ; | |
31
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diff
changeset
|
701 dev_conf->card_number = lp; |
0 | 702 break ; |
703 } | |
704 } | |
705 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
706 cdev_init(&dev_conf->cdev[lp], &pt1_fops); | |
30
eb694d8e4c7e
setup owner in initialization
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9
diff
changeset
|
707 dev_conf->cdev[lp].owner = THIS_MODULE; |
31
289794dc265f
adapted to use of multiple number of pt1:
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30
diff
changeset
|
708 cdev_add(&dev_conf->cdev[lp], |
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30
diff
changeset
|
709 MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp)), 1); |
0 | 710 channel = kzalloc(sizeof(PT1_CHANNEL), GFP_KERNEL); |
711 if(!channel){ | |
712 printk(KERN_ERR "PT1:out of memory !"); | |
713 return -ENOMEM ; | |
714 } | |
715 | |
716 // 共通情報 | |
717 mutex_init(&channel->lock); | |
718 // 待ち状態を解除 | |
719 channel->req_dma = FALSE ; | |
720 // マイナー番号設定 | |
721 channel->minor = MINOR(dev_conf->dev) + lp ; | |
722 // 対象のI2Cデバイス | |
723 channel->address = i2c_address[lp] ; | |
724 channel->type = channeltype[lp] ; | |
725 // 実際のチューナ番号 | |
726 channel->channel = real_chanel[lp] ; | |
727 channel->ptr = dev_conf ; | |
728 channel->size = 0 ; | |
729 dev_conf->channel[lp] = channel ; | |
730 | |
731 init_waitqueue_head(&channel->wait_q); | |
732 | |
733 switch(channel->type){ | |
734 case CHANNEL_TYPE_ISDB_T: | |
735 channel->maxsize = CHANEL_DMA_SIZE ; | |
736 channel->buf = kzalloc(CHANEL_DMA_SIZE, GFP_KERNEL); | |
737 break ; | |
738 case CHANNEL_TYPE_ISDB_S: | |
739 channel->maxsize = BS_CHANEL_DMA_SIZE ; | |
740 channel->buf = kzalloc(BS_CHANEL_DMA_SIZE, GFP_KERNEL); | |
741 break ; | |
742 } | |
743 if(channel->buf == NULL){ | |
744 goto out_err_v4l; | |
745 } | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
746 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) |
31
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747 printk(KERN_INFO "PT1: card_number = %d\n", |
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748 dev_conf->card_number); |
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749 device_create(pt1video_class, |
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750 NULL, |
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751 MKDEV(MAJOR(dev_conf->dev), |
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752 (MINOR(dev_conf->dev) + lp)), |
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753 NULL, |
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754 "pt1video%u", |
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755 MINOR(dev_conf->dev) + lp + |
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756 dev_conf->card_number * MAX_CHANNEL); |
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757 #else |
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758 device_create(pt1video_class, |
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759 NULL, |
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760 MKDEV(MAJOR(dev_conf->dev), |
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761 (MINOR(dev_conf->dev) + lp)), |
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762 "pt1video%u", |
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763 MINOR(dev_conf->dev) + lp + |
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764 dev_conf->card_number * MAX_CHANNEL); |
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765 #endif |
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766 |
0 | 767 #if 0 |
768 dev_conf->vdev[lp] = video_device_alloc(); | |
769 memcpy(dev_conf->vdev[lp], &pt1_template, sizeof(pt1_template)); | |
770 video_set_drvdata(dev_conf->vdev[lp], channel); | |
771 video_register_device(dev_conf->vdev[lp], VFL_TYPE_GRABBER, -1); | |
772 #endif | |
773 } | |
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774 |
0 | 775 if(pt1_dma_init(pdev, dev_conf) < 0){ |
776 goto out_err_dma; | |
777 } | |
778 dev_conf->kthread = kthread_run(pt1_thread, dev_conf, "pt1"); | |
779 pci_set_drvdata(pdev, dev_conf); | |
780 return 0; | |
781 | |
782 out_err_dma: | |
783 pt1_dma_free(pdev, dev_conf); | |
784 out_err_v4l: | |
785 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
786 if(dev_conf->channel[lp] != NULL){ | |
787 if(dev_conf->channel[lp]->buf != NULL){ | |
788 kfree(dev_conf->channel[lp]->buf); | |
789 } | |
790 kfree(dev_conf->channel[lp]); | |
791 } | |
792 } | |
793 out_err_fpga: | |
794 writel(0xb0b0000, dev_conf->regs); | |
795 writel(0, dev_conf->regs + 4); | |
796 iounmap(dev_conf->regs); | |
797 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
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798 for (i = 0; i < DMA_RING_SIZE; i++) { |
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799 kfree(dev_conf->dmactl[i]); |
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800 } |
0 | 801 kfree(dev_conf); |
802 out_err_regbase: | |
803 return -EIO; | |
804 | |
805 } | |
806 | |
807 static void __devexit pt1_pci_remove_one(struct pci_dev *pdev) | |
808 { | |
809 | |
810 int lp ; | |
811 __u32 val ; | |
812 PT1_DEVICE *dev_conf = (PT1_DEVICE *)pci_get_drvdata(pdev); | |
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813 int i; |
0 | 814 |
815 if(dev_conf){ | |
816 if(dev_conf->kthread) { | |
817 kthread_stop(dev_conf->kthread); | |
818 dev_conf->kthread = NULL; | |
819 } | |
820 | |
821 // DMA終了 | |
822 writel(0x08080000, dev_conf->regs); | |
823 for(lp = 0 ; lp < 10 ; lp++){ | |
824 val = readl(dev_conf->regs); | |
825 if(!(val & (1 << 6))){ | |
826 break ; | |
827 } | |
828 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
829 } | |
830 pt1_dma_free(pdev, dev_conf); | |
831 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
832 if(dev_conf->channel[lp] != NULL){ | |
833 cdev_del(&dev_conf->cdev[lp]); | |
834 kfree(dev_conf->channel[lp]->buf); | |
835 kfree(dev_conf->channel[lp]); | |
836 } | |
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837 device_destroy(pt1video_class, |
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838 MKDEV(MAJOR(dev_conf->dev), |
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839 (MINOR(dev_conf->dev) + lp))); |
0 | 840 } |
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841 |
0 | 842 unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL); |
843 writel(0xb0b0000, dev_conf->regs); | |
844 writel(0, dev_conf->regs + 4); | |
845 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_OFF); | |
846 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
847 iounmap(dev_conf->regs); | |
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848 for (i = 0; i < DMA_RING_SIZE; i++) { |
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849 kfree(dev_conf->dmactl[i]); |
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850 } |
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851 device[dev_conf->card_number] = NULL; |
0 | 852 kfree(dev_conf); |
853 } | |
854 pci_set_drvdata(pdev, NULL); | |
855 } | |
856 #ifdef CONFIG_PM | |
857 | |
858 static int pt1_pci_suspend (struct pci_dev *pdev, pm_message_t state) | |
859 { | |
860 return 0; | |
861 } | |
862 | |
863 static int pt1_pci_resume (struct pci_dev *pdev) | |
864 { | |
865 return 0; | |
866 } | |
867 | |
868 #endif /* CONFIG_PM */ | |
869 | |
870 | |
871 static struct pci_driver pt1_driver = { | |
872 .name = DRV_NAME, | |
873 .probe = pt1_pci_init_one, | |
874 .remove = __devexit_p(pt1_pci_remove_one), | |
875 .id_table = pt1_pci_tbl, | |
876 #ifdef CONFIG_PM | |
877 .suspend = pt1_pci_suspend, | |
878 .resume = pt1_pci_resume, | |
879 #endif /* CONFIG_PM */ | |
880 | |
881 }; | |
882 | |
883 | |
884 static int __init pt1_pci_init(void) | |
885 { | |
36 | 886 printk(version); |
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887 pt1video_class = class_create(THIS_MODULE, DRIVERNAME); |
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888 if (IS_ERR(pt1video_class)) |
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889 return PTR_ERR(pt1video_class); |
0 | 890 return pci_register_driver(&pt1_driver); |
891 } | |
892 | |
893 | |
894 static void __exit pt1_pci_cleanup(void) | |
895 { | |
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896 class_destroy(pt1video_class); |
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897 pci_unregister_driver(&pt1_driver); |
0 | 898 } |
899 | |
900 module_init(pt1_pci_init); | |
901 module_exit(pt1_pci_cleanup); |