Mercurial > pt1.oyama
annotate driver/pt1_i2c.c @ 124:9c7bc6c0327e
Add DLNA server function test. (from uShare project)
author | naoyan@johnstown.minaminoshima.org |
---|---|
date | Wed, 29 Sep 2010 23:18:55 +0900 |
parents | b8032e8099de |
children | 4303bbfd5d37 |
rev | line source |
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0 | 1 /***************************************************************************/ |
2 /* I2C情報作成 */ | |
3 /***************************************************************************/ | |
4 #include <linux/module.h> | |
5 #include <linux/kernel.h> | |
6 #include <linux/errno.h> | |
7 #include <linux/pci.h> | |
8 #include <linux/init.h> | |
9 #include <linux/interrupt.h> | |
10 #include <linux/mutex.h> | |
83
b8032e8099de
include linux/sched.h explicitly. that file might be missing on some distributions.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
11 #include <linux/sched.h> |
0 | 12 |
13 #include <asm/system.h> | |
14 #include <asm/io.h> | |
15 #include <asm/irq.h> | |
16 #include <asm/uaccess.h> | |
17 | |
18 #include "pt1_com.h" | |
19 #include "pt1_i2c.h" | |
20 #include "pt1_pci.h" | |
79 | 21 #include "pt1_tuner.h" |
0 | 22 |
23 #define PROGRAM_ADDRESS 1024 | |
24 static int state = STATE_STOP ; | |
25 static int i2c_lock(void __iomem *, __u32, __u32, __u32); | |
26 static int i2c_lock_one(void __iomem *, __u32, __u32); | |
27 static int i2c_unlock(void __iomem *, int); | |
28 static void writebits(void __iomem *, __u32 *, __u32, __u32); | |
29 static void begin_i2c(void __iomem *, __u32 *, __u32 *); | |
30 static void start_i2c(void __iomem *, __u32 *, __u32 *, __u32); | |
31 static void stop_i2c(void __iomem *, __u32 *, __u32 *, __u32, __u32); | |
32 | |
33 | |
34 // PCIに書き込むI2Cデータ生成 | |
35 void makei2c(void __iomem *regs, __u32 base_addr, __u32 i2caddr, __u32 writemode, __u32 data_en, __u32 clock, __u32 busy) | |
36 { | |
37 | |
38 __u32 val ; | |
39 val = ((base_addr << I2C_DATA) | (writemode << I2C_WRIET_MODE) | | |
77 | 40 ( data_en << I2C_DATA_EN) | |
0 | 41 (clock << I2C_CLOCK) | (busy << I2C_BUSY) | i2caddr) ; |
42 writel(val, regs + FIFO_ADDR); | |
43 } | |
44 | |
79 | 45 int xc3s_init(void __iomem *regs, int cardtype) |
0 | 46 { |
47 | |
48 __u32 val ; | |
49 int lp ; | |
50 int rc ; | |
79 | 51 int phase = XC3S_PCI_CLOCK; |
0 | 52 |
53 /* | |
54 val = (1 << 19) | (1 << 27) | (1 << 16) | (1 << 24) | (1 << 17) | (1 << 25); | |
55 writel(WRITE_PULSE, regs); | |
56 BIT 19, 19+8 ON | |
57 BIT 16, 16+8 ON | |
58 BIT 17, 17+8 ON | |
59 */ | |
60 // XC3S初期化 | |
61 for(lp = 0 ; lp < PROGRAM_ADDRESS ; lp++){ | |
62 makei2c(regs, lp, 0, READ_EN, DATA_DIS, CLOCK_DIS, BUSY_DIS); | |
77 | 63 } |
0 | 64 // XC3S 初期化待ち (512 PCI Clocks) |
65 for(lp = 0 ; lp < XC3S_PCI_CLOCK ; lp++){ | |
66 makei2c(regs, 0, 0, READ_EN, DATA_DIS, CLOCK_DIS, BUSY_DIS); | |
67 } | |
68 // プロテクト解除 | |
69 // これは何を意図しているんだろう? | |
70 // 元コードが良く判らない | |
71 for(lp = 0 ; lp < 57 ; lp++){ | |
72 val = readl(regs); | |
73 if(val & I2C_READ_SYNC){ | |
74 break ; | |
75 } | |
76 writel(WRITE_PULSE, regs); | |
77 } | |
78 | |
79 for(lp = 0 ; lp < 57 ; lp++){ | |
80 val = readl(regs); | |
81 if(val & READ_DATA){ | |
82 break ; | |
83 } | |
84 writel(WRITE_PULSE, regs); | |
85 } | |
86 | |
87 // UNLOCK | |
88 rc = i2c_unlock(regs, READ_UNLOCK); | |
89 if(rc < 0){ | |
90 return rc ; | |
91 } | |
92 | |
93 // Enable PCI | |
94 rc =i2c_lock(regs, (WRITE_PCI_RESET | WRITE_PCI_RESET_), WRITE_PCI_RESET_, PCI_LOCKED); | |
95 if(rc < 0){ | |
96 return -EIO ; | |
97 } | |
98 | |
99 // Enable RAM | |
100 rc =i2c_lock(regs, (WRITE_RAM_RESET | WRITE_RAM_RESET_), WRITE_RAM_RESET_, RAM_LOCKED); | |
101 if(rc){ | |
102 return -EIO ; | |
103 } | |
79 | 104 switch(cardtype) { |
105 case PT1: | |
106 phase = XC3S_PCI_CLOCK; | |
107 break; | |
108 case PT2: | |
109 phase = XC3S_PCI_CLOCK_PT2; | |
110 break; | |
111 } | |
112 for(lp = 0; lp < phase; lp++){ | |
0 | 113 rc = i2c_lock_one(regs, WRITE_RAM_ENABLE, RAM_SHIFT); |
114 if(rc < 0){ | |
115 printk(KERN_ERR "PT1:LOCK FALUT\n"); | |
116 return rc ; | |
117 } | |
118 } | |
119 | |
120 // ストリームごとの転送制御(OFF) | |
121 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
122 SetStream(regs, lp, 0); | |
123 SetStream(regs, lp, 0); | |
124 } | |
125 return 0 ; | |
126 } | |
127 // | |
128 // | |
129 //BIT 0. 1 : Tuner番号 (Enable/Disable) | |
130 //BIT 8. 9 : Tuner番号 | |
131 // | |
132 // | |
133 void SetStream(void __iomem *regs, __u32 channel, __u32 enable) | |
134 { | |
135 __u32 val ; | |
136 | |
137 val = (1 << (8 + channel)); | |
138 if(enable){ | |
139 val |= (1 << channel); | |
140 } | |
141 writel(val, regs + TS_TEST_ENABLE_ADDR); | |
142 } | |
143 | |
144 static int i2c_lock(void __iomem *regs, __u32 firstval, __u32 secondval, __u32 lockval) | |
145 { | |
146 | |
147 __u32 val ; | |
148 int lp ; | |
149 | |
150 writel(firstval, regs); | |
151 writel(secondval, regs); | |
152 | |
153 // RAMがロックされた? | |
154 for(lp = 0 ; lp < XC3S_PCI_CLOCK ; lp++){ | |
155 val = readl(regs); | |
156 if((val & lockval)){ | |
157 return 0 ; | |
158 } | |
159 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
160 } | |
161 return -EIO ; | |
162 } | |
163 | |
164 static int i2c_lock_one(void __iomem *regs, __u32 firstval, __u32 lockval) | |
165 { | |
166 | |
167 __u32 val ; | |
168 __u32 val2 ; | |
169 int lp ; | |
170 | |
171 val = (readl(regs) & lockval); | |
172 writel(firstval, regs); | |
173 | |
174 // RAMがロックされた? | |
175 for(lp = 0 ; lp < 10 ; lp++){ | |
176 for(lp = 0 ; lp < 1024 ; lp++){ | |
177 val2 = readl(regs); | |
178 // 最初に取得したデータと逆になればOK | |
179 if(((val2 & lockval) != val)){ | |
180 return 0 ; | |
181 } | |
182 } | |
183 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
184 } | |
185 printk(KERN_INFO "PT1:Lock Fault(%x:%x)\n", val, val2); | |
186 return -EIO ; | |
187 } | |
188 static int i2c_unlock(void __iomem *regs, int lockval) | |
189 { | |
190 int lp ; | |
191 __u32 val ; | |
192 | |
193 writel(WRITE_PULSE, regs); | |
194 | |
195 for(lp = 0 ; lp < 3 ; lp++){ | |
196 val = readl(regs); | |
197 if((val &lockval)){ | |
198 return 0 ; | |
199 } | |
200 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
201 } | |
202 return -EIO ; | |
203 } | |
204 void blockwrite(void __iomem *regs, WBLOCK *wblock) | |
205 { | |
206 int lp ; | |
207 int bitpos ; | |
208 __u32 bits ; | |
209 __u32 old_bits = 1 ; | |
210 __u32 address = 0; | |
211 __u32 clock = 0; | |
212 | |
213 begin_i2c(regs, &address, &clock); | |
214 if(state == STATE_STOP){ | |
215 start_i2c(regs, &address, &clock, old_bits); | |
216 old_bits = 0 ; | |
217 stop_i2c(regs, &address, &clock, old_bits, FALSE); | |
218 state = STATE_START ; | |
219 } | |
220 old_bits = 1 ; | |
221 start_i2c(regs, &address, &clock, old_bits); | |
222 old_bits = 0 ; | |
223 | |
224 // まずアドレスを書く | |
225 for(bitpos = 0 ; bitpos < 7 ; bitpos++){ | |
226 bits = ((wblock->addr >> (6 - bitpos)) & 1); | |
227 writebits(regs, &address, old_bits, bits); | |
228 old_bits = bits ; | |
229 } | |
230 // タイプ:WRT | |
231 writebits(regs, &address, old_bits, 0); | |
232 // ACK/NACK用(必ず1) | |
233 writebits(regs, &address, 0, 1); | |
234 | |
235 old_bits = 1 ; | |
236 // 実際のデータを書く | |
237 for (lp = 0 ; lp < wblock->count ; lp++){ | |
238 for(bitpos = 0 ; bitpos < 8 ; bitpos++){ | |
239 bits = ((wblock->value[lp] >> (7 - bitpos)) & 1); | |
240 writebits(regs, &address, old_bits, bits); | |
241 old_bits = bits ; | |
242 } | |
243 // ACK/NACK用(必ず1) | |
244 writebits(regs, &address, old_bits, 1); | |
245 old_bits = 1 ; | |
246 } | |
247 | |
248 // Clock negedge | |
249 makei2c(regs, address, address + 1, 0, (old_bits ^ 1), 1, 1); | |
250 clock = TRUE ; | |
251 address += 1 ; | |
252 stop_i2c(regs, &address, &clock, old_bits, TRUE); | |
253 | |
254 } | |
255 | |
256 void blockread(void __iomem *regs, WBLOCK *wblock, int count) | |
257 { | |
258 int lp ; | |
259 int bitpos ; | |
260 __u32 bits ; | |
261 __u32 old_bits = 1 ; | |
262 __u32 address = 0; | |
263 __u32 clock = 0; | |
264 | |
265 begin_i2c(regs, &address, &clock); | |
266 if(state == STATE_STOP){ | |
267 start_i2c(regs, &address, &clock, old_bits); | |
268 old_bits = 0 ; | |
269 stop_i2c(regs, &address, &clock, old_bits, FALSE); | |
270 state = STATE_START ; | |
271 } | |
272 old_bits = 1 ; | |
273 start_i2c(regs, &address, &clock, old_bits); | |
274 old_bits = 0 ; | |
275 | |
276 // まずアドレスを書く | |
277 for(bitpos = 0 ; bitpos < 7 ; bitpos++){ | |
278 bits = ((wblock->addr >> (6 - bitpos)) & 1); | |
279 writebits(regs, &address, old_bits, bits); | |
280 old_bits = bits ; | |
281 } | |
282 // タイプ:WRT | |
283 writebits(regs, &address, old_bits, 0); | |
284 // ACK/NACK用(必ず1) | |
285 writebits(regs, &address, 0, 1); | |
286 | |
287 old_bits = 1 ; | |
288 // 実際のデータを書く | |
289 for (lp = 0 ; lp < wblock->count ; lp++){ | |
290 for(bitpos = 0 ; bitpos < 8 ; bitpos++){ | |
291 bits = ((wblock->value[lp] >> (7 - bitpos)) & 1); | |
292 writebits(regs, &address, old_bits, bits); | |
293 old_bits = bits ; | |
294 } | |
295 // ACK/NACK用(必ず1) | |
296 writebits(regs, &address, old_bits, 1); | |
297 old_bits = 1 ; | |
298 } | |
299 | |
300 // Clock negedge | |
301 makei2c(regs, address, address + 1, 0, (old_bits ^ 1), 1, 1); | |
302 clock = TRUE ; | |
303 address += 1 ; | |
304 | |
77 | 305 // ここから Read |
0 | 306 start_i2c(regs, &address, &clock, old_bits); |
307 old_bits = 0 ; | |
308 // まずアドレスを書く | |
309 for(bitpos = 0 ; bitpos < 7 ; bitpos++){ | |
310 bits = ((wblock->addr >> (6 - bitpos)) & 1); | |
311 writebits(regs, &address, old_bits, bits); | |
312 old_bits = bits ; | |
313 } | |
314 // タイプ:RD | |
315 writebits(regs, &address, old_bits, 1); | |
316 // ACK/NACK用(必ず1) | |
317 writebits(regs, &address, 1, 1); | |
318 | |
319 old_bits = 1 ; | |
320 // 実際のデータを書く | |
321 for (lp = 0 ; lp < count ; lp++){ | |
322 for(bitpos = 0 ; bitpos < 8 ; bitpos++){ | |
323 writebits(regs, &address, old_bits, 1); | |
324 // Read Mode Set | |
325 makei2c(regs, address, address + 1, 1, 0, 0, 1); | |
326 address += 1 ; | |
327 old_bits = 1 ; | |
328 } | |
329 if(lp >= (count - 1)){ | |
330 // ACK/NACK用(必ず1) | |
331 writebits(regs, &address, old_bits, 1); | |
332 old_bits = 0 ; | |
333 }else{ | |
334 // ACK/NACK用(必ず1) | |
335 writebits(regs, &address, old_bits, 0); | |
336 old_bits = 1 ; | |
337 } | |
338 } | |
339 | |
340 // Clock negedge | |
341 makei2c(regs, address, address + 1, 0, 0, 1, 1); | |
342 clock = TRUE ; | |
343 address += 1 ; | |
344 old_bits = 1 ; | |
345 stop_i2c(regs, &address, &clock, old_bits, TRUE); | |
346 | |
347 } | |
348 static void writebits(void __iomem *regs, __u32 *address, __u32 old_bits, __u32 bits) | |
349 { | |
350 // CLOCK UP | |
351 makei2c(regs, *address, *address + 1, 0, (old_bits ^ 1), 1, 1); | |
352 *address += 1 ; | |
353 | |
354 // CLOCK UP | |
355 makei2c(regs, *address, *address + 1, 0, (bits ^ 1), 1, 1); | |
356 *address += 1 ; | |
357 | |
358 // CLOCK DOWN | |
359 makei2c(regs, *address, *address + 1, 0, (bits ^ 1), 0, 1); | |
360 *address += 1 ; | |
361 | |
362 } | |
363 static void begin_i2c(void __iomem *regs, __u32 *address, __u32 *clock) | |
364 { | |
365 // bus FREE | |
366 makei2c(regs, *address, *address, 0, 0, 0, 0); | |
367 *address += 1 ; | |
368 | |
369 // bus busy | |
370 makei2c(regs, *address, *address + 1, 0, 0, 0, 1); | |
371 *address += 1 ; | |
372 *clock = FALSE ; | |
373 } | |
374 | |
375 static void start_i2c(void __iomem *regs, __u32 *address, __u32 *clock, __u32 data) | |
376 { | |
377 // データが残っていなければデータを下げる | |
378 if(!data){ | |
379 // CLOCKがあればCLOCKを下げる | |
380 if(*clock != TRUE){ | |
381 *clock = TRUE ; | |
382 makei2c(regs, *address, *address + 1, 0, 1, 1, 1); | |
383 *address += 1 ; | |
384 } | |
385 makei2c(regs, *address, *address + 1, 0, 0, 1, 1); | |
386 *address += 1 ; | |
387 } | |
388 | |
389 if(*clock != FALSE){ | |
390 *clock = FALSE ; | |
391 makei2c(regs, *address, *address + 1, 0, 0, 0, 1); | |
392 *address += 1; | |
393 } | |
394 makei2c(regs, *address, *address + 1, 0, 1, 0, 1); | |
395 *address += 1; | |
396 *clock = FALSE ; | |
397 } | |
398 | |
399 static void stop_i2c(void __iomem *regs, __u32 *address, __u32 *clock, __u32 data, __u32 end) | |
400 { | |
401 // データが残っていて | |
402 if(data){ | |
403 // クロックがあれば | |
404 if(*clock != TRUE){ | |
405 *clock = TRUE ; | |
406 makei2c(regs, *address, *address + 1, 0, 0, 1, 1); | |
407 *address += 1; | |
408 } | |
409 makei2c(regs, *address, *address + 1, 0, 1, 1, 1); | |
410 *address += 1 ; | |
411 } | |
412 // クロックが落ちていれば | |
413 if(*clock){ | |
414 *clock = FALSE ; | |
415 makei2c(regs, *address, *address + 1, 0, 1, 0, 1); | |
416 *address += 1 ; | |
417 } | |
418 | |
419 if(end){ | |
420 makei2c(regs, *address, 0, 0, 0, 0, 1); | |
421 }else{ | |
422 makei2c(regs, *address, *address + 1, 0, 0, 0, 1); | |
423 *address += 1 ; | |
424 } | |
425 } | |
426 | |
427 void i2c_write(void __iomem *regs, struct mutex *lock, WBLOCK *wblock) | |
428 { | |
429 | |
430 int lp; | |
431 __u32 val ; | |
432 | |
433 // ロックする | |
434 mutex_lock(lock); | |
435 #if 0 | |
436 printk(KERN_INFO "Addr=%x(%d)\n", wblock->addr, wblock->count); | |
437 for(lp = 0 ; lp < wblock->count ; lp++){ | |
438 printk(KERN_INFO "%x\n", wblock->value[lp]); | |
439 } | |
440 printk(KERN_INFO "\n"); | |
441 #endif | |
442 | |
443 blockwrite(regs, wblock); | |
444 writel(FIFO_GO, regs + FIFO_GO_ADDR); | |
445 //とりあえずロックしないように。 | |
446 for(lp = 0 ; lp < 100 ; lp++){ | |
447 val = readl(regs + FIFO_RESULT_ADDR); | |
448 if(!(val & FIFO_DONE)){ | |
449 break ; | |
450 } | |
451 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
452 } | |
453 mutex_unlock(lock); | |
454 } | |
455 | |
456 __u32 i2c_read(void __iomem *regs, struct mutex *lock, WBLOCK *wblock, int size) | |
457 { | |
458 | |
459 int lp; | |
460 __u32 val ; | |
461 | |
462 // ロックする | |
463 mutex_lock(lock); | |
464 #if 0 | |
465 printk(KERN_INFO "Addr=%x:%d:%d\n", wblock->addr, wblock->count, size); | |
466 for(lp = 0 ; lp < wblock->count ; lp++){ | |
467 printk(KERN_INFO "%x\n", wblock->value[lp]); | |
468 } | |
469 printk(KERN_INFO "\n"); | |
470 #endif | |
471 blockread(regs, wblock, size); | |
472 | |
473 writel(FIFO_GO, regs + FIFO_GO_ADDR); | |
474 | |
475 for(lp = 0 ; lp < 100 ; lp++){ | |
476 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
477 val = readl(regs + FIFO_RESULT_ADDR); | |
478 if(!(val & FIFO_DONE)){ | |
479 break ; | |
480 } | |
481 } | |
482 | |
483 val = readl(regs + I2C_RESULT_ADDR); | |
484 mutex_unlock(lock); | |
485 return val ; | |
486 } |