Mercurial > pt1.oyama
annotate driver/pt1_pci.c @ 39:b03685d25fee
recpt1 now shows error explanation when write() fails.
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Fri, 17 Apr 2009 22:52:35 +0900 |
parents | c359e7adf700 |
children | 8f30a05cded2 |
rev | line source |
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0 | 1 /* pt1-pci.c: A PT1 on PCI bus driver for Linux. */ |
2 #define DRV_NAME "pt1-pci" | |
3 #define DRV_VERSION "1.00" | |
4 #define DRV_RELDATE "11/28/2008" | |
5 | |
6 | |
7 #include <linux/module.h> | |
8 #include <linux/kernel.h> | |
9 #include <linux/errno.h> | |
10 #include <linux/pci.h> | |
11 #include <linux/init.h> | |
12 #include <linux/interrupt.h> | |
13 | |
14 #include <asm/system.h> | |
15 #include <asm/io.h> | |
16 #include <asm/irq.h> | |
17 #include <asm/uaccess.h> | |
18 #include <linux/version.h> | |
19 #include <linux/mutex.h> | |
36 | 20 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23) |
0 | 21 #include <linux/freezer.h> |
22 #else | |
23 #define set_freezable() | |
36 | 24 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) |
0 | 25 typedef struct pm_message { |
26 int event; | |
27 } pm_message_t; | |
28 #endif | |
29 #endif | |
30 #include <linux/kthread.h> | |
31 #include <linux/dma-mapping.h> | |
32 | |
33 #include <linux/fs.h> | |
34 #include <linux/cdev.h> | |
35 | |
36 #include <linux/ioctl.h> | |
37 | |
38 #include "pt1_com.h" | |
39 #include "pt1_pci.h" | |
40 #include "pt1_tuner.h" | |
41 #include "pt1_i2c.h" | |
42 #include "pt1_tuner_data.h" | |
43 #include "pt1_ioctl.h" | |
44 | |
45 /* These identify the driver base version and may not be removed. */ | |
46 static char version[] __devinitdata = | |
47 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " \n"; | |
48 | |
49 MODULE_AUTHOR("Tomoaki Ishikawa tomy@users.sourceforge.jp"); | |
50 #define DRIVER_DESC "PCI earthsoft PT1 driver" | |
51 MODULE_DESCRIPTION(DRIVER_DESC); | |
52 MODULE_LICENSE("GPL"); | |
53 | |
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54 static int debug = 7; /* 1 normal messages, 0 quiet .. 7 verbose. */ |
0 | 55 static int lnb = 0; /* LNB OFF:0 +11V:1 +15V:2 */ |
56 | |
57 module_param(debug, int, 0); | |
58 module_param(lnb, int, 0); | |
59 MODULE_PARM_DESC(debug, "debug level (1-2)"); | |
60 MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)"); | |
61 | |
62 static struct pci_device_id pt1_pci_tbl[] = { | |
63 { 0x10ee, 0x211a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | |
64 { 0, } | |
65 }; | |
66 MODULE_DEVICE_TABLE(pci, pt1_pci_tbl); | |
67 #define DEV_NAME "pt1video" | |
68 | |
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69 #define PACKET_SIZE 188 // 1パケット長 |
0 | 70 #define MAX_READ_BLOCK 4 // 1度に読み出す最大DMAバッファ数 |
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71 #define MAX_PCI_DEVICE 128 // 最大64枚 |
0 | 72 #define DMA_SIZE 4096 // DMAバッファサイズ |
36 | 73 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22) |
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74 #define DMA_RING_SIZE 128 // RINGサイズ |
0 | 75 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで) |
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76 #define CHANEL_DMA_SIZE (2*1024*1024) // 地デジ用(16Mbps) |
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77 #define BS_CHANEL_DMA_SIZE (4*1024*1024) // BS用(32Mbps) |
0 | 78 #else |
79 #define DMA_RING_SIZE 28 // RINGサイズ | |
80 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで) | |
81 #define CHANEL_DMA_SIZE (1*128*1024) // 地デジ用(16Mbps) | |
82 #define BS_CHANEL_DMA_SIZE (1*128*1024) // BS用(32Mbps) | |
83 #endif | |
84 | |
85 typedef struct _DMA_CONTROL{ | |
86 dma_addr_t ring_dma[DMA_RING_MAX] ; // DMA情報 | |
87 __u32 *data[DMA_RING_MAX]; | |
88 }DMA_CONTROL; | |
89 | |
90 typedef struct _PT1_CHANNEL PT1_CHANNEL; | |
91 | |
92 typedef struct _pt1_device{ | |
93 unsigned long mmio_start ; | |
94 __u32 mmio_len ; | |
95 void __iomem *regs; | |
96 struct mutex lock ; | |
97 dma_addr_t ring_dma[DMA_RING_SIZE] ; // DMA情報 | |
98 void *dmaptr[DMA_RING_SIZE] ; | |
99 struct task_struct *kthread; | |
100 dev_t dev ; | |
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101 int card_number; |
0 | 102 __u32 base_minor ; |
103 struct cdev cdev[MAX_CHANNEL]; | |
104 wait_queue_head_t dma_wait_q ;// for poll on reading | |
105 DMA_CONTROL dmactl[DMA_RING_SIZE]; | |
106 PT1_CHANNEL *channel[MAX_CHANNEL]; | |
107 }PT1_DEVICE; | |
108 | |
109 typedef struct _MICRO_PACKET{ | |
110 char data[3]; | |
111 char head ; | |
112 }MICRO_PACKET; | |
113 | |
114 struct _PT1_CHANNEL{ | |
115 __u32 valid ; // 使用中フラグ | |
116 __u32 address ; // I2Cアドレス | |
117 __u32 channel ; // チャネル番号 | |
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118 int type ; // チャネルタイプ |
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119 __u32 packet_size ; // パケットサイズ |
0 | 120 __u32 drop ; // パケットドロップ数 |
121 struct mutex lock ; // CH別mutex_lock用 | |
122 __u32 size ; // DMAされたサイズ | |
123 __u32 maxsize ; // DMA用バッファサイズ | |
124 __u32 bufsize ; // チャネルに割り振られたサイズ | |
125 __u32 overflow ; // オーバーフローエラー発生 | |
126 __u32 counetererr ; // 転送カウンタ1エラー | |
127 __u32 transerr ; // 転送エラー | |
128 __u32 minor ; // マイナー番号 | |
129 __u8 *buf; // CH別受信メモリ | |
130 __u8 req_dma ; // 溢れたチャネル | |
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131 __u8 packet_buf[PACKET_SIZE] ; // 溢れたチャネル |
0 | 132 PT1_DEVICE *ptr ; // カード別情報 |
133 wait_queue_head_t wait_q ; // for poll on reading | |
134 }; | |
135 | |
136 // I2Cアドレス(video0, 1 = ISDB-S) (video2, 3 = ISDB-T) | |
137 int i2c_address[MAX_CHANNEL] = {T0_ISDB_S, T1_ISDB_S, T0_ISDB_T, T1_ISDB_T}; | |
138 int real_chanel[MAX_CHANNEL] = {0, 2, 1, 3}; | |
139 int channeltype[MAX_CHANNEL] = {CHANNEL_TYPE_ISDB_S, CHANNEL_TYPE_ISDB_S, | |
140 CHANNEL_TYPE_ISDB_T, CHANNEL_TYPE_ISDB_T}; | |
141 | |
142 static PT1_DEVICE *device[MAX_PCI_DEVICE]; | |
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143 static struct class *pt1video_class; |
0 | 144 |
145 #define PT1MAJOR 251 | |
146 #define DRIVERNAME "pt1video" | |
147 | |
148 static void reset_dma(PT1_DEVICE *dev_conf) | |
149 { | |
150 | |
151 int lp ; | |
152 __u32 addr ; | |
153 int ring_pos = 0; | |
154 int data_pos = 0 ; | |
155 __u32 *dataptr ; | |
156 | |
157 // データ初期化 | |
158 for(ring_pos = 0 ; ring_pos < DMA_RING_SIZE ; ring_pos++){ | |
159 for(data_pos = 0 ; data_pos < DMA_RING_MAX ; data_pos++){ | |
160 dataptr = dev_conf->dmactl[ring_pos].data[data_pos]; | |
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161 dataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; |
0 | 162 } |
163 } | |
164 // 転送カウンタをリセット | |
165 writel(0x00000010, dev_conf->regs); | |
166 // 転送カウンタをインクリメント | |
167 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
168 writel(0x00000020, dev_conf->regs); | |
169 } | |
170 | |
171 addr = (int)dev_conf->ring_dma[0] ; | |
172 addr >>= 12 ; | |
173 // DMAバッファ設定 | |
174 writel(addr, dev_conf->regs + DMA_ADDR); | |
175 // DMA開始 | |
176 writel(0x0c000040, dev_conf->regs); | |
177 | |
178 } | |
179 static int pt1_thread(void *data) | |
180 { | |
181 PT1_DEVICE *dev_conf = data ; | |
182 PT1_CHANNEL *channel ; | |
183 int ring_pos = 0; | |
184 int data_pos = 0 ; | |
185 int lp ; | |
186 int chno ; | |
187 int lp2 ; | |
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188 int dma_channel ; |
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189 int packet_pos ; |
0 | 190 __u32 *dataptr ; |
191 __u32 *curdataptr ; | |
192 __u32 val ; | |
193 union mpacket{ | |
194 __u32 val ; | |
195 MICRO_PACKET packet ; | |
196 }micro; | |
197 | |
198 set_freezable(); | |
199 reset_dma(dev_conf); | |
200 printk(KERN_INFO "pt1_thread run\n"); | |
201 | |
202 for(;;){ | |
203 if(kthread_should_stop()){ | |
204 break ; | |
205 } | |
206 | |
207 for(;;){ | |
208 dataptr = dev_conf->dmactl[ring_pos].data[data_pos]; | |
209 // データあり? | |
210 if(dataptr[(DMA_SIZE / sizeof(__u32)) - 2] == 0){ | |
211 break ; | |
212 } | |
213 micro.val = *dataptr ; | |
214 curdataptr = dataptr ; | |
215 data_pos += 1 ; | |
216 for(lp = 0 ; lp < (DMA_SIZE / sizeof(__u32)) ; lp++, dataptr++){ | |
217 micro.val = *dataptr ; | |
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218 dma_channel = ((micro.packet.head >> 5) & 0x07); |
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219 //チャネル情報不正 |
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220 if(dma_channel > MAX_CHANNEL){ |
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221 printk(KERN_ERR "DMA Channel Number Error(%d)\n", dma_channel); |
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222 continue ; |
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223 } |
0 | 224 chno = real_chanel[(((micro.packet.head >> 5) & 0x07) - 1)]; |
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225 packet_pos = ((micro.packet.head >> 2) & 0x07); |
0 | 226 channel = dev_conf->channel[chno] ; |
227 // エラーチェック | |
228 if((micro.packet.head & MICROPACKET_ERROR)){ | |
229 val = readl(dev_conf->regs); | |
230 if((val & BIT_RAM_OVERFLOW)){ | |
231 channel->overflow += 1 ; | |
232 } | |
233 if((val & BIT_INITIATOR_ERROR)){ | |
234 channel->counetererr += 1 ; | |
235 } | |
236 if((val & BIT_INITIATOR_WARNING)){ | |
237 channel->transerr += 1 ; | |
238 } | |
239 // 初期化して先頭から | |
240 reset_dma(dev_conf); | |
241 ring_pos = data_pos = 0 ; | |
242 break ; | |
243 } | |
244 // 未使用チャネルは捨てる | |
245 if(channel->valid == FALSE){ | |
246 continue ; | |
247 } | |
248 mutex_lock(&channel->lock); | |
249 // あふれたら読み出すまで待つ | |
250 while(1){ | |
251 if(channel->size >= (channel->maxsize - 4)){ | |
252 // 該当チャンネルのDMA読みだし待ちにする | |
253 wake_up(&channel->wait_q); | |
254 channel->req_dma = TRUE ; | |
255 mutex_unlock(&channel->lock); | |
256 // タスクに時間を渡す為中断 | |
257 wait_event_timeout(dev_conf->dma_wait_q, (channel->req_dma == FALSE), | |
258 msecs_to_jiffies(500)); | |
259 mutex_lock(&channel->lock); | |
260 channel->drop += 1 ; | |
261 }else{ | |
262 break ; | |
263 } | |
264 } | |
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265 // 先頭で、一時バッファに残っている場合 |
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266 if((micro.packet.head & 0x02) && (channel->packet_size != 0)){ |
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267 channel->packet_size = 0 ; |
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268 } |
0 | 269 // データコピー |
270 for(lp2 = 2 ; lp2 >= 0 ; lp2--){ | |
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271 channel->packet_buf[channel->packet_size] = micro.packet.data[lp2] ; |
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272 channel->packet_size += 1 ; |
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273 } |
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274 |
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275 // パケットが出来たらコピーする |
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276 if(channel->packet_size >= PACKET_SIZE){ |
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277 memcpy(&channel->buf[channel->size], |
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278 channel->packet_buf, PACKET_SIZE); |
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279 channel->size += PACKET_SIZE ; |
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280 channel->packet_size = 0 ; |
0 | 281 } |
282 mutex_unlock(&channel->lock); | |
283 } | |
284 curdataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; | |
285 | |
286 if(data_pos >= DMA_RING_MAX){ | |
287 data_pos = 0; | |
288 ring_pos += 1 ; | |
289 // DMAリングが変わった場合はインクリメント | |
290 writel(0x00000020, dev_conf->regs); | |
291 if(ring_pos >= DMA_RING_SIZE){ | |
292 ring_pos = 0 ; | |
293 } | |
294 } | |
295 | |
296 // 頻度を落す(4Kで起動させる) | |
297 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
298 channel = dev_conf->channel[real_chanel[lp]] ; | |
299 if((channel->size >= DMA_SIZE) && (channel->valid == TRUE)){ | |
300 wake_up(&channel->wait_q); | |
301 } | |
302 } | |
303 } | |
304 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
305 } | |
306 return 0 ; | |
307 } | |
308 static int pt1_open(struct inode *inode, struct file *file) | |
309 { | |
310 | |
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311 int major = imajor(inode); |
0 | 312 int minor = iminor(inode); |
313 int lp ; | |
314 int lp2 ; | |
315 PT1_CHANNEL *channel ; | |
316 | |
317 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
318 if(device[lp] == NULL){ | |
319 return -EIO ; | |
320 } | |
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321 |
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322 if(MAJOR(device[lp]->dev) == major && |
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323 device[lp]->base_minor <= minor && |
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324 device[lp]->base_minor + MAX_CHANNEL > minor) { |
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325 |
0 | 326 mutex_lock(&device[lp]->lock); |
327 for(lp2 = 0 ; lp2 < MAX_CHANNEL ; lp2++){ | |
328 channel = device[lp]->channel[lp2] ; | |
329 if(channel->minor == minor){ | |
330 if(channel->valid == TRUE){ | |
331 mutex_unlock(&device[lp]->lock); | |
332 return -EIO ; | |
333 } | |
334 channel->drop = 0 ; | |
335 channel->valid = TRUE ; | |
336 channel->overflow = 0 ; | |
337 channel->counetererr = 0 ; | |
338 channel->transerr = 0 ; | |
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339 channel->packet_size = 0 ; |
0 | 340 file->private_data = channel; |
341 mutex_lock(&channel->lock); | |
342 // データ初期化 | |
343 channel->size = 0 ; | |
344 mutex_unlock(&channel->lock); | |
345 mutex_unlock(&device[lp]->lock); | |
346 return 0 ; | |
347 } | |
348 } | |
349 } | |
350 } | |
351 return -EIO; | |
352 } | |
353 static int pt1_release(struct inode *inode, struct file *file) | |
354 { | |
355 PT1_CHANNEL *channel = file->private_data; | |
356 | |
357 mutex_lock(&channel->ptr->lock); | |
358 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
359 channel->valid = FALSE ; | |
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360 printk(KERN_INFO "(%d:%d)Drop=%08d:%08d:%08d:%08d\n", imajor(inode), iminor(inode), channel->drop, |
0 | 361 channel->overflow, channel->counetererr, channel->transerr); |
362 channel->overflow = 0 ; | |
363 channel->counetererr = 0 ; | |
364 channel->transerr = 0 ; | |
365 channel->drop = 0 ; | |
366 // 停止している場合は起こす | |
367 if(channel->req_dma == TRUE){ | |
368 channel->req_dma = FALSE ; | |
369 wake_up(&channel->ptr->dma_wait_q); | |
370 } | |
371 mutex_unlock(&channel->ptr->lock); | |
372 return 0; | |
373 } | |
374 | |
375 static ssize_t pt1_read(struct file *file, char __user *buf, size_t cnt, loff_t * ppos) | |
376 { | |
377 PT1_CHANNEL *channel = file->private_data; | |
378 __u32 size ; | |
36 | 379 unsigned long dummy; |
0 | 380 |
381 // 4K単位で起こされるのを待つ(CPU負荷対策) | |
382 if(channel->size < DMA_SIZE){ | |
383 wait_event_timeout(channel->wait_q, (channel->size >= DMA_SIZE), | |
384 msecs_to_jiffies(500)); | |
385 } | |
386 mutex_lock(&channel->lock); | |
387 if(!channel->size){ | |
388 size = 0 ; | |
389 }else{ | |
390 if(cnt < channel->size){ | |
391 // バッファが足りない場合は残りを移動する | |
392 size = cnt ; | |
36 | 393 dummy = copy_to_user(buf, channel->buf, cnt); |
0 | 394 memmove(channel->buf, &channel->buf[cnt], (channel->size - cnt)); |
395 channel->size -= cnt ; | |
396 }else{ | |
397 size = channel->size ; | |
36 | 398 dummy = copy_to_user(buf, channel->buf, size); |
0 | 399 channel->size = 0 ; |
400 } | |
401 } | |
402 // 読み終わったかつ使用しているのがが4K以下 | |
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diff
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|
403 if(channel->req_dma == TRUE){ |
0 | 404 channel->req_dma = FALSE ; |
405 wake_up(&channel->ptr->dma_wait_q); | |
406 } | |
407 mutex_unlock(&channel->lock); | |
408 return size ; | |
409 } | |
410 static int SetFreq(PT1_CHANNEL *channel, FREQUENCY *freq) | |
411 { | |
412 | |
413 switch(channel->type){ | |
414 case CHANNEL_TYPE_ISDB_S: | |
415 { | |
416 ISDB_S_TMCC tmcc ; | |
417 if(bs_tune(channel->ptr->regs, | |
418 &channel->ptr->lock, | |
419 channel->address, | |
420 freq->frequencyno, | |
421 &tmcc) < 0){ | |
422 return -EIO ; | |
423 } | |
424 | |
425 #if 0 | |
426 printk(KERN_INFO "clockmargin = (%x)\n", (tmcc.clockmargin & 0xFF)); | |
427 printk(KERN_INFO "carriermargin = (%x)\n", (tmcc.carriermargin & 0xFF)); | |
428 | |
429 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++){ | |
430 if(tmcc.ts_id[lp].ts_id == 0xFFFF){ | |
431 continue ; | |
432 } | |
433 printk(KERN_INFO "Slot(%d:%x)\n", lp, tmcc.ts_id[lp].ts_id); | |
434 printk(KERN_INFO "mode (low/high) = (%x:%x)\n", | |
435 tmcc.ts_id[lp].low_mode, tmcc.ts_id[lp].high_mode); | |
436 printk(KERN_INFO "slot (low/high) = (%x:%x)\n", | |
437 tmcc.ts_id[lp].low_slot, | |
438 tmcc.ts_id[lp].high_slot); | |
439 } | |
440 #endif | |
441 ts_lock(channel->ptr->regs, | |
442 &channel->ptr->lock, | |
443 channel->address, | |
444 tmcc.ts_id[freq->slot].ts_id); | |
445 } | |
446 break ; | |
447 case CHANNEL_TYPE_ISDB_T: | |
448 { | |
449 if(isdb_t_frequency(channel->ptr->regs, | |
450 &channel->ptr->lock, | |
451 channel->address, | |
452 freq->frequencyno, freq->slot) < 0){ | |
453 return -EINVAL ; | |
454 } | |
455 } | |
456 } | |
457 return 0 ; | |
458 } | |
36 | 459 static int pt1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg0) |
0 | 460 { |
461 PT1_CHANNEL *channel = file->private_data; | |
36 | 462 int signal ; |
463 unsigned long dummy; | |
464 void *arg = (void *)arg0; | |
0 | 465 |
466 switch(cmd){ | |
467 case SET_CHANNEL: | |
468 { | |
469 FREQUENCY freq ; | |
36 | 470 dummy = copy_from_user(&freq, arg, sizeof(FREQUENCY)); |
0 | 471 return SetFreq(channel, &freq); |
472 } | |
473 case START_REC: | |
474 SetStream(channel->ptr->regs, channel->channel, TRUE); | |
475 return 0 ; | |
476 case STOP_REC: | |
477 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
478 return 0 ; | |
9
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479 case GET_SIGNAL_STRENGTH: |
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|
480 switch(channel->type){ |
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481 case CHANNEL_TYPE_ISDB_S: |
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482 { |
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483 signal = isdb_s_read_signal_strength(channel->ptr->regs, |
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484 &channel->ptr->lock, |
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485 channel->address); |
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|
486 } |
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|
487 break ; |
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488 case CHANNEL_TYPE_ISDB_T: |
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489 // calc C/N |
36 | 490 signal = isdb_t_read_signal_strength(channel->ptr->regs, |
9
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491 &channel->ptr->lock, channel->address); |
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492 break ; |
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493 } |
36 | 494 dummy = copy_to_user(arg, &signal, sizeof(int)); |
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495 return 0 ; |
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496 case LNB_ENABLE: |
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497 if(lnb){ |
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498 settuner_reset(channel->ptr->regs, lnb, TUNER_POWER_ON_RESET_DISABLE); |
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499 } |
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500 return 0 ; |
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501 case LNB_DISABLE: |
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502 if(lnb){ |
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503 settuner_reset(channel->ptr->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
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504 } |
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505 return 0 ; |
0 | 506 } |
507 return -EINVAL; | |
508 } | |
509 | |
510 /* | |
511 */ | |
512 static const struct file_operations pt1_fops = { | |
513 .owner = THIS_MODULE, | |
514 .open = pt1_open, | |
515 .release = pt1_release, | |
516 .read = pt1_read, | |
517 .ioctl = pt1_ioctl, | |
518 .llseek = no_llseek, | |
519 }; | |
520 | |
521 int pt1_makering(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
522 { | |
523 int lp ; | |
524 int lp2 ; | |
525 DMA_CONTROL *dmactl; | |
526 __u32 *dmaptr ; | |
527 __u32 addr ; | |
528 __u32 *ptr ; | |
529 | |
530 //DMAリング作成 | |
531 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
532 ptr = dev_conf->dmaptr[lp]; | |
533 if(lp == (DMA_RING_SIZE - 1)){ | |
534 addr = (__u32)dev_conf->ring_dma[0]; | |
535 }else{ | |
536 addr = (__u32)dev_conf->ring_dma[(lp + 1)]; | |
537 } | |
538 addr >>= 12 ; | |
539 memcpy(ptr, &addr, sizeof(__u32)); | |
540 ptr += 1 ; | |
541 | |
542 dmactl = &dev_conf->dmactl[lp]; | |
543 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ | |
544 dmaptr = pci_alloc_consistent(pdev, DMA_SIZE, &dmactl->ring_dma[lp2]); | |
545 if(dmaptr == NULL){ | |
546 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
547 return -1 ; | |
548 } | |
549 dmactl->data[lp2] = dmaptr ; | |
550 // DMAデータエリア初期化 | |
551 dmaptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0 ; | |
552 addr = (__u32)dmactl->ring_dma[lp2]; | |
553 addr >>= 12 ; | |
554 memcpy(ptr, &addr, sizeof(__u32)); | |
555 ptr += 1 ; | |
556 } | |
557 } | |
558 return 0 ; | |
559 } | |
560 int pt1_dma_init(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
561 { | |
562 int lp ; | |
563 void *ptr ; | |
564 | |
565 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
566 ptr = pci_alloc_consistent(pdev, DMA_SIZE, &dev_conf->ring_dma[lp]); | |
567 if(ptr == NULL){ | |
568 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
569 return -1 ; | |
570 } | |
571 dev_conf->dmaptr[lp] = ptr ; | |
572 } | |
573 | |
574 return pt1_makering(pdev, dev_conf); | |
575 } | |
576 int pt1_dma_free(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
577 { | |
578 | |
579 int lp ; | |
580 int lp2 ; | |
581 | |
582 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
583 if(dev_conf->dmaptr[lp] != NULL){ | |
584 pci_free_consistent(pdev, DMA_SIZE, | |
585 dev_conf->dmaptr[lp], dev_conf->ring_dma[lp]); | |
586 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ | |
587 if(dev_conf->dmactl[lp].data[lp2] != NULL){ | |
588 pci_free_consistent(pdev, DMA_SIZE, | |
589 dev_conf->dmactl[lp].data[lp2], | |
590 dev_conf->dmactl[lp].ring_dma[lp2]); | |
591 } | |
592 } | |
593 } | |
594 } | |
595 return 0 ; | |
596 } | |
597 static int __devinit pt1_pci_init_one (struct pci_dev *pdev, | |
598 const struct pci_device_id *ent) | |
599 { | |
600 int rc ; | |
601 int lp ; | |
602 int minor ; | |
603 u16 cmd ; | |
604 PT1_DEVICE *dev_conf ; | |
605 PT1_CHANNEL *channel ; | |
36 | 606 struct resource *dummy; |
0 | 607 |
608 rc = pci_enable_device(pdev); | |
609 if (rc) | |
610 return rc; | |
611 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
612 if (rc) { | |
613 printk(KERN_ERR "PT1:DMA MASK ERROR"); | |
614 return rc; | |
615 } | |
616 | |
617 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
618 if (!(cmd & PCI_COMMAND_MASTER)) { | |
619 printk(KERN_INFO "Attempting to enable Bus Mastering\n"); | |
620 pci_set_master(pdev); | |
621 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
622 if (!(cmd & PCI_COMMAND_MASTER)) { | |
623 printk(KERN_ERR "Bus Mastering is not enabled\n"); | |
624 return -EIO; | |
625 } | |
626 } | |
627 printk(KERN_INFO "Bus Mastering Enabled.\n"); | |
628 | |
629 dev_conf = kzalloc(sizeof(PT1_DEVICE), GFP_KERNEL); | |
630 if(!dev_conf){ | |
631 printk(KERN_ERR "PT1:out of memory !"); | |
632 return -ENOMEM ; | |
633 } | |
634 // PCIアドレスをマップする | |
635 dev_conf->mmio_start = pci_resource_start(pdev, 0); | |
636 dev_conf->mmio_len = pci_resource_len(pdev, 0); | |
36 | 637 dummy = request_mem_region(dev_conf->mmio_start, dev_conf->mmio_len, DEV_NAME); |
638 if (!dummy) { | |
0 | 639 printk(KERN_ERR "PT1: cannot request iomem (0x%llx).\n", (unsigned long long) dev_conf->mmio_start); |
640 goto out_err_regbase; | |
641 } | |
642 | |
643 dev_conf->regs = ioremap(dev_conf->mmio_start, dev_conf->mmio_len); | |
644 if (!dev_conf->regs){ | |
645 printk(KERN_ERR "pt1: Can't remap register area.\n"); | |
646 goto out_err_regbase; | |
647 } | |
648 // 初期化処理 | |
649 if(xc3s_init(dev_conf->regs)){ | |
650 printk(KERN_ERR "Error xc3s_init\n"); | |
651 goto out_err_fpga; | |
652 } | |
653 // チューナリセット | |
654 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE); | |
655 schedule_timeout_interruptible(msecs_to_jiffies(50)); | |
656 | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
657 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
0 | 658 schedule_timeout_interruptible(msecs_to_jiffies(10)); |
659 mutex_init(&dev_conf->lock); | |
660 | |
661 // Tuner 初期化処理 | |
662 for(lp = 0 ; lp < MAX_TUNER ; lp++){ | |
663 rc = tuner_init(dev_conf->regs, &dev_conf->lock, lp); | |
664 if(rc < 0){ | |
665 printk(KERN_ERR "Error tuner_init\n"); | |
666 goto out_err_fpga; | |
667 } | |
668 } | |
669 // 初期化完了 | |
670 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
36 | 671 set_sleepmode(dev_conf->regs, &dev_conf->lock, |
0 | 672 i2c_address[lp], channeltype[lp], TYPE_SLEEP); |
36 | 673 |
0 | 674 schedule_timeout_interruptible(msecs_to_jiffies(50)); |
675 } | |
676 rc = alloc_chrdev_region(&dev_conf->dev, 0, MAX_CHANNEL, DEV_NAME); | |
677 if(rc < 0){ | |
678 goto out_err_fpga; | |
679 } | |
680 | |
681 // 初期化 | |
682 init_waitqueue_head(&dev_conf->dma_wait_q); | |
683 | |
684 minor = MINOR(dev_conf->dev) ; | |
685 dev_conf->base_minor = minor ; | |
686 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
31
289794dc265f
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
30
diff
changeset
|
687 printk(KERN_INFO "PT1: device[%d]=%p\n", lp, device[lp]); |
0 | 688 if(device[lp] == NULL){ |
689 device[lp] = dev_conf ; | |
31
289794dc265f
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parents:
30
diff
changeset
|
690 dev_conf->card_number = lp; |
0 | 691 break ; |
692 } | |
693 } | |
694 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
695 cdev_init(&dev_conf->cdev[lp], &pt1_fops); | |
30
eb694d8e4c7e
setup owner in initialization
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
|
696 dev_conf->cdev[lp].owner = THIS_MODULE; |
31
289794dc265f
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parents:
30
diff
changeset
|
697 cdev_add(&dev_conf->cdev[lp], |
289794dc265f
adapted to use of multiple number of pt1:
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parents:
30
diff
changeset
|
698 MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp)), 1); |
0 | 699 channel = kzalloc(sizeof(PT1_CHANNEL), GFP_KERNEL); |
700 if(!channel){ | |
701 printk(KERN_ERR "PT1:out of memory !"); | |
702 return -ENOMEM ; | |
703 } | |
704 | |
705 // 共通情報 | |
706 mutex_init(&channel->lock); | |
707 // 待ち状態を解除 | |
708 channel->req_dma = FALSE ; | |
709 // マイナー番号設定 | |
710 channel->minor = MINOR(dev_conf->dev) + lp ; | |
711 // 対象のI2Cデバイス | |
712 channel->address = i2c_address[lp] ; | |
713 channel->type = channeltype[lp] ; | |
714 // 実際のチューナ番号 | |
715 channel->channel = real_chanel[lp] ; | |
716 channel->ptr = dev_conf ; | |
717 channel->size = 0 ; | |
718 dev_conf->channel[lp] = channel ; | |
719 | |
720 init_waitqueue_head(&channel->wait_q); | |
721 | |
722 switch(channel->type){ | |
723 case CHANNEL_TYPE_ISDB_T: | |
724 channel->maxsize = CHANEL_DMA_SIZE ; | |
725 channel->buf = kzalloc(CHANEL_DMA_SIZE, GFP_KERNEL); | |
726 break ; | |
727 case CHANNEL_TYPE_ISDB_S: | |
728 channel->maxsize = BS_CHANEL_DMA_SIZE ; | |
729 channel->buf = kzalloc(BS_CHANEL_DMA_SIZE, GFP_KERNEL); | |
730 break ; | |
731 } | |
732 if(channel->buf == NULL){ | |
733 goto out_err_v4l; | |
734 } | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
735 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) |
31
289794dc265f
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
30
diff
changeset
|
736 printk(KERN_INFO "PT1: card_number = %d\n", |
289794dc265f
adapted to use of multiple number of pt1:
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parents:
30
diff
changeset
|
737 dev_conf->card_number); |
289794dc265f
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Yoshiki Yazawa <yaz@honeyplanet.jp>
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30
diff
changeset
|
738 device_create(pt1video_class, |
289794dc265f
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Yoshiki Yazawa <yaz@honeyplanet.jp>
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30
diff
changeset
|
739 NULL, |
289794dc265f
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30
diff
changeset
|
740 MKDEV(MAJOR(dev_conf->dev), |
289794dc265f
adapted to use of multiple number of pt1:
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parents:
30
diff
changeset
|
741 (MINOR(dev_conf->dev) + lp)), |
289794dc265f
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parents:
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diff
changeset
|
742 NULL, |
289794dc265f
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parents:
30
diff
changeset
|
743 "pt1video%u", |
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diff
changeset
|
744 MINOR(dev_conf->dev) + lp + |
289794dc265f
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diff
changeset
|
745 dev_conf->card_number * MAX_CHANNEL); |
9
07b2fc07ff48
updated to current driver to support signal strength.
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parents:
0
diff
changeset
|
746 #else |
31
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diff
changeset
|
747 device_create(pt1video_class, |
289794dc265f
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parents:
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diff
changeset
|
748 NULL, |
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diff
changeset
|
749 MKDEV(MAJOR(dev_conf->dev), |
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diff
changeset
|
750 (MINOR(dev_conf->dev) + lp)), |
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diff
changeset
|
751 "pt1video%u", |
289794dc265f
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diff
changeset
|
752 MINOR(dev_conf->dev) + lp + |
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30
diff
changeset
|
753 dev_conf->card_number * MAX_CHANNEL); |
9
07b2fc07ff48
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
754 #endif |
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parents:
0
diff
changeset
|
755 |
0 | 756 #if 0 |
757 dev_conf->vdev[lp] = video_device_alloc(); | |
758 memcpy(dev_conf->vdev[lp], &pt1_template, sizeof(pt1_template)); | |
759 video_set_drvdata(dev_conf->vdev[lp], channel); | |
760 video_register_device(dev_conf->vdev[lp], VFL_TYPE_GRABBER, -1); | |
761 #endif | |
762 } | |
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763 |
0 | 764 if(pt1_dma_init(pdev, dev_conf) < 0){ |
765 goto out_err_dma; | |
766 } | |
767 dev_conf->kthread = kthread_run(pt1_thread, dev_conf, "pt1"); | |
768 pci_set_drvdata(pdev, dev_conf); | |
769 return 0; | |
770 | |
771 out_err_dma: | |
772 pt1_dma_free(pdev, dev_conf); | |
773 out_err_v4l: | |
774 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
775 if(dev_conf->channel[lp] != NULL){ | |
776 if(dev_conf->channel[lp]->buf != NULL){ | |
777 kfree(dev_conf->channel[lp]->buf); | |
778 } | |
779 kfree(dev_conf->channel[lp]); | |
780 } | |
781 } | |
782 out_err_fpga: | |
783 writel(0xb0b0000, dev_conf->regs); | |
784 writel(0, dev_conf->regs + 4); | |
785 iounmap(dev_conf->regs); | |
786 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
787 kfree(dev_conf); | |
788 out_err_regbase: | |
789 return -EIO; | |
790 | |
791 } | |
792 | |
793 static void __devexit pt1_pci_remove_one(struct pci_dev *pdev) | |
794 { | |
795 | |
796 int lp ; | |
797 __u32 val ; | |
798 PT1_DEVICE *dev_conf = (PT1_DEVICE *)pci_get_drvdata(pdev); | |
799 | |
800 if(dev_conf){ | |
801 if(dev_conf->kthread) { | |
802 kthread_stop(dev_conf->kthread); | |
803 dev_conf->kthread = NULL; | |
804 } | |
805 | |
806 // DMA終了 | |
807 writel(0x08080000, dev_conf->regs); | |
808 for(lp = 0 ; lp < 10 ; lp++){ | |
809 val = readl(dev_conf->regs); | |
810 if(!(val & (1 << 6))){ | |
811 break ; | |
812 } | |
813 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
814 } | |
815 pt1_dma_free(pdev, dev_conf); | |
816 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
817 if(dev_conf->channel[lp] != NULL){ | |
818 cdev_del(&dev_conf->cdev[lp]); | |
819 kfree(dev_conf->channel[lp]->buf); | |
820 kfree(dev_conf->channel[lp]); | |
821 } | |
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822 device_destroy(pt1video_class, |
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823 MKDEV(MAJOR(dev_conf->dev), |
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824 (MINOR(dev_conf->dev) + lp))); |
0 | 825 } |
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826 |
0 | 827 unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL); |
828 writel(0xb0b0000, dev_conf->regs); | |
829 writel(0, dev_conf->regs + 4); | |
830 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_OFF); | |
831 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
832 iounmap(dev_conf->regs); | |
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833 device[dev_conf->card_number] = NULL; |
0 | 834 kfree(dev_conf); |
835 } | |
836 pci_set_drvdata(pdev, NULL); | |
837 } | |
838 #ifdef CONFIG_PM | |
839 | |
840 static int pt1_pci_suspend (struct pci_dev *pdev, pm_message_t state) | |
841 { | |
842 return 0; | |
843 } | |
844 | |
845 static int pt1_pci_resume (struct pci_dev *pdev) | |
846 { | |
847 return 0; | |
848 } | |
849 | |
850 #endif /* CONFIG_PM */ | |
851 | |
852 | |
853 static struct pci_driver pt1_driver = { | |
854 .name = DRV_NAME, | |
855 .probe = pt1_pci_init_one, | |
856 .remove = __devexit_p(pt1_pci_remove_one), | |
857 .id_table = pt1_pci_tbl, | |
858 #ifdef CONFIG_PM | |
859 .suspend = pt1_pci_suspend, | |
860 .resume = pt1_pci_resume, | |
861 #endif /* CONFIG_PM */ | |
862 | |
863 }; | |
864 | |
865 | |
866 static int __init pt1_pci_init(void) | |
867 { | |
36 | 868 printk(version); |
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869 pt1video_class = class_create(THIS_MODULE, DRIVERNAME); |
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870 if (IS_ERR(pt1video_class)) |
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871 return PTR_ERR(pt1video_class); |
0 | 872 return pci_register_driver(&pt1_driver); |
873 } | |
874 | |
875 | |
876 static void __exit pt1_pci_cleanup(void) | |
877 { | |
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878 class_destroy(pt1video_class); |
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879 pci_unregister_driver(&pt1_driver); |
0 | 880 } |
881 | |
882 module_init(pt1_pci_init); | |
883 module_exit(pt1_pci_cleanup); |