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comparison driver/pt1_i2c.c @ 79:3c2123189edf

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improve PT2 support. - update read check in initialization - PT2 specific RAM phase initialization
author Yoshiki Yazawa <yaz@honeyplanet.jp>
date Mon, 07 Dec 2009 15:01:57 +0900
parents 517e61637f7b
children b8032e8099de
comparison
equal deleted inserted replaced
78:5a0126d8af17 79:3c2123189edf
15 #include <asm/uaccess.h> 15 #include <asm/uaccess.h>
16 16
17 #include "pt1_com.h" 17 #include "pt1_com.h"
18 #include "pt1_i2c.h" 18 #include "pt1_i2c.h"
19 #include "pt1_pci.h" 19 #include "pt1_pci.h"
20 #include "pt1_tuner.h"
20 21
21 #define PROGRAM_ADDRESS 1024 22 #define PROGRAM_ADDRESS 1024
22 static int state = STATE_STOP ; 23 static int state = STATE_STOP ;
23 static int i2c_lock(void __iomem *, __u32, __u32, __u32); 24 static int i2c_lock(void __iomem *, __u32, __u32, __u32);
24 static int i2c_lock_one(void __iomem *, __u32, __u32); 25 static int i2c_lock_one(void __iomem *, __u32, __u32);
38 ( data_en << I2C_DATA_EN) | 39 ( data_en << I2C_DATA_EN) |
39 (clock << I2C_CLOCK) | (busy << I2C_BUSY) | i2caddr) ; 40 (clock << I2C_CLOCK) | (busy << I2C_BUSY) | i2caddr) ;
40 writel(val, regs + FIFO_ADDR); 41 writel(val, regs + FIFO_ADDR);
41 } 42 }
42 43
43 int xc3s_init(void __iomem *regs) 44 int xc3s_init(void __iomem *regs, int cardtype)
44 { 45 {
45 46
46 __u32 val ; 47 __u32 val ;
47 int lp ; 48 int lp ;
48 int rc ; 49 int rc ;
50 int phase = XC3S_PCI_CLOCK;
49 51
50 /* 52 /*
51 val = (1 << 19) | (1 << 27) | (1 << 16) | (1 << 24) | (1 << 17) | (1 << 25); 53 val = (1 << 19) | (1 << 27) | (1 << 16) | (1 << 24) | (1 << 17) | (1 << 25);
52 writel(WRITE_PULSE, regs); 54 writel(WRITE_PULSE, regs);
53 BIT 19, 19+8 ON 55 BIT 19, 19+8 ON
96 // Enable RAM 98 // Enable RAM
97 rc =i2c_lock(regs, (WRITE_RAM_RESET | WRITE_RAM_RESET_), WRITE_RAM_RESET_, RAM_LOCKED); 99 rc =i2c_lock(regs, (WRITE_RAM_RESET | WRITE_RAM_RESET_), WRITE_RAM_RESET_, RAM_LOCKED);
98 if(rc){ 100 if(rc){
99 return -EIO ; 101 return -EIO ;
100 } 102 }
101 for(lp = 0 ; lp < XC3S_PCI_CLOCK ; lp++){ 103 switch(cardtype) {
104 case PT1:
105 phase = XC3S_PCI_CLOCK;
106 break;
107 case PT2:
108 phase = XC3S_PCI_CLOCK_PT2;
109 break;
110 }
111 for(lp = 0; lp < phase; lp++){
102 rc = i2c_lock_one(regs, WRITE_RAM_ENABLE, RAM_SHIFT); 112 rc = i2c_lock_one(regs, WRITE_RAM_ENABLE, RAM_SHIFT);
103 if(rc < 0){ 113 if(rc < 0){
104 printk(KERN_ERR "PT1:LOCK FALUT\n"); 114 printk(KERN_ERR "PT1:LOCK FALUT\n");
105 return rc ; 115 return rc ;
106 } 116 }