Mercurial > pt1.oyama
comparison driver/pt1_tuner.c @ 64:98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
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date | Thu, 22 Oct 2009 02:18:12 +0900 |
parents | 07b2fc07ff48 |
children | c701bbc532b4 |
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63:ca419e61f7f2 | 64:98a92ce5382e |
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33 __u16 pos ; // Äɲ乤ë¥Á¥ã¥ó¥Í¥ë¥Ý¥¸¥·¥ç¥ó | 33 __u16 pos ; // Äɲ乤ë¥Á¥ã¥ó¥Í¥ë¥Ý¥¸¥·¥ç¥ó |
34 __u16 add_freq ; // Äɲ乤ëÃÍ | 34 __u16 add_freq ; // Äɲ乤ëÃÍ |
35 }isdb_t_freq_add_table; | 35 }isdb_t_freq_add_table; |
36 | 36 |
37 isdb_t_freq_add_table isdb_t_freq_add[10] = { | 37 isdb_t_freq_add_table isdb_t_freq_add[10] = { |
38 { 7, 0x8081}, // 0¡Á7Ëø | 38 { 7, 0x8081}, // 0¡Á7Ëø |
39 { 12, 0x80A1}, // 8¡Á12Ëø | 39 { 12, 0x80A1}, // 8¡Á12Ëø |
40 { 21, 0x8062}, // 13¡Á21Ëø | 40 { 21, 0x8062}, // 13¡Á21Ëø |
41 { 39, 0x80A2}, // 22¡Á39Ëø | 41 { 39, 0x80A2}, // 22¡Á39Ëø |
42 { 51, 0x80E2}, // 40¡Á51Ëø | 42 { 51, 0x80E2}, // 40¡Á51Ëø |
43 { 59, 0x8064}, // 52¡Á59Ëø | 43 { 59, 0x8064}, // 52¡Á59Ëø |
45 { 84, 0x80a4}, // 76¡Á84Ëø | 45 { 84, 0x80a4}, // 76¡Á84Ëø |
46 {100, 0x80C4}, // 85¡Á100Ëø | 46 {100, 0x80C4}, // 85¡Á100Ëø |
47 {112, 0x80E4} // 101¡Á112Ëø | 47 {112, 0x80E4} // 101¡Á112Ëø |
48 }; | 48 }; |
49 | 49 |
50 void settuner_reset(void __iomem *regs, __u32 lnb, __u32 tuner) | 50 void settuner_reset(void __iomem *regs, int cardtype, __u32 lnb, __u32 tuner) |
51 { | 51 { |
52 __u32 val = 0; | 52 __u32 val = 0; |
53 switch(lnb){ | 53 switch(lnb){ |
54 case LNB_11V: val = (1 << BIT_LNB_DOWN); break ; | 54 case LNB_11V: |
55 case LNB_15V: val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN) ; break ; | 55 val = (1 << BIT_LNB_DOWN); |
56 } | 56 break ; |
57 | 57 case LNB_15V: |
58 switch(tuner){ | 58 val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN); |
59 case TUNER_POWER_ON_RESET_ENABLE: val |= (1 << BIT_TUNER) ; break ; | 59 break ; |
60 case TUNER_POWER_ON_RESET_DISABLE: val |= (1 << BIT_TUNER) | (1 << BIT_RESET) ; break ; | 60 } |
61 } | 61 |
62 | 62 if(cardtype == PT1) { |
63 writel(val, (regs + 4)); | 63 switch(tuner){ |
64 case TUNER_POWER_ON_RESET_ENABLE: | |
65 val |= (1 << BIT_TUNER); | |
66 break; | |
67 case TUNER_POWER_ON_RESET_DISABLE: | |
68 val |= (1 << BIT_TUNER) | (1 << BIT_RESET); | |
69 break ; | |
70 } | |
71 } | |
72 else if(cardtype == PT2) { | |
73 switch(tuner){ | |
74 case TUNER_POWER_ON_RESET_ENABLE: | |
75 val |= (1 << BIT_TUNER) | (1 << BIT_FRONTEND); | |
76 break; | |
77 case TUNER_POWER_ON_RESET_DISABLE: | |
78 val |= (1 << BIT_TUNER) | (1 << BIT_FRONTEND) | (1 << BIT_RESET); | |
79 break ; | |
80 } | |
81 } | |
82 writel(val, (regs + CFG_REGS_ADDR)); | |
64 } | 83 } |
65 static int init_isdb_s(void __iomem *regs, struct mutex *lock, __u32 addr) | 84 static int init_isdb_s(void __iomem *regs, struct mutex *lock, __u32 addr) |
66 { | 85 { |
67 | 86 |
68 WBLOCK wk; | 87 WBLOCK wk; |
137 { | 156 { |
138 WBLOCK wk; | 157 WBLOCK wk; |
139 | 158 |
140 if(type == TYPE_WAKEUP){ | 159 if(type == TYPE_WAKEUP){ |
141 switch(tuner_type){ | 160 switch(tuner_type){ |
142 case CHANNEL_TYPE_ISDB_S:memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK));break ; | 161 case CHANNEL_TYPE_ISDB_S: |
143 case CHANNEL_TYPE_ISDB_T:memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK));break ; | 162 memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK)); |
163 break ; | |
164 case CHANNEL_TYPE_ISDB_T: | |
165 memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK)); | |
166 break ; | |
144 } | 167 } |
145 wk.addr = address ; | 168 wk.addr = address ; |
146 i2c_write(regs, lock, &wk); | 169 i2c_write(regs, lock, &wk); |
147 } | 170 } |
148 switch(tuner_type){ | 171 switch(tuner_type){ |